1*284ad706SBen Skeggs /* SPDX-License-Identifier: MIT 2*284ad706SBen Skeggs * 3*284ad706SBen Skeggs * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. 4*284ad706SBen Skeggs */ 5*284ad706SBen Skeggs #include "priv.h" 6*284ad706SBen Skeggs 7*284ad706SBen Skeggs #include <nvhw/drf.h> 8*284ad706SBen Skeggs #include <nvhw/ref/gb202/dev_ce.h> 9*284ad706SBen Skeggs 10*284ad706SBen Skeggs u32 11*284ad706SBen Skeggs gb202_ce_grce_mask(struct nvkm_device *device) 12*284ad706SBen Skeggs { 13*284ad706SBen Skeggs u32 data = nvkm_rd32(device, NV_CE_GRCE_MASK); 14*284ad706SBen Skeggs 15*284ad706SBen Skeggs return NVVAL_GET(data, NV_CE, GRCE_MASK, VALUE); 16*284ad706SBen Skeggs } 17