xref: /linux/drivers/gpu/drm/nouveau/nvkm/engine/ce/ga100.c (revision 9f2c9170934eace462499ba0bfe042cc72900173)
1 /*
2  * Copyright 2021 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 #include "priv.h"
23 
24 #include <subdev/vfn.h>
25 
26 #include <nvif/class.h>
27 
28 static irqreturn_t
29 ga100_ce_intr(struct nvkm_inth *inth)
30 {
31 	struct nvkm_subdev *subdev = container_of(inth, typeof(*subdev), inth);
32 
33 	/*TODO*/
34 	nvkm_error(subdev, "intr\n");
35 	return IRQ_NONE;
36 }
37 
38 int
39 ga100_ce_fini(struct nvkm_engine *engine, bool suspend)
40 {
41 	nvkm_inth_block(&engine->subdev.inth);
42 	return 0;
43 }
44 
45 int
46 ga100_ce_init(struct nvkm_engine *engine)
47 {
48 	nvkm_inth_allow(&engine->subdev.inth);
49 	return 0;
50 }
51 
52 int
53 ga100_ce_oneinit(struct nvkm_engine *engine)
54 {
55 	struct nvkm_subdev *subdev = &engine->subdev;
56 	struct nvkm_device *device = subdev->device;
57 	u32 vector;
58 
59 	vector = nvkm_rd32(device, 0x10442c + (subdev->inst * 0x80)) & 0x00000fff;
60 
61 	return nvkm_inth_add(&device->vfn->intr, vector, NVKM_INTR_PRIO_NORMAL,
62 			     subdev, ga100_ce_intr, &subdev->inth);
63 }
64 
65 static const struct nvkm_engine_func
66 ga100_ce = {
67 	.oneinit = ga100_ce_oneinit,
68 	.init = ga100_ce_init,
69 	.fini = ga100_ce_fini,
70 	.cclass = &gv100_ce_cclass,
71 	.sclass = {
72 		{ -1, -1, AMPERE_DMA_COPY_A },
73 		{}
74 	}
75 };
76 
77 int
78 ga100_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
79 	     struct nvkm_engine **pengine)
80 {
81 	return nvkm_engine_new_(&ga100_ce, device, type, inst, true, pengine);
82 }
83