xref: /linux/drivers/gpu/drm/nouveau/nvkm/engine/ce/ga100.c (revision 6e7fd890f1d6ac83805409e9c346240de2705584)
1 /*
2  * Copyright 2021 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 #include "priv.h"
23 
24 #include <subdev/gsp.h>
25 #include <subdev/vfn.h>
26 
27 #include <nvif/class.h>
28 
29 static irqreturn_t
30 ga100_ce_intr(struct nvkm_inth *inth)
31 {
32 	struct nvkm_subdev *subdev = container_of(inth, typeof(*subdev), inth);
33 
34 	/*TODO*/
35 	nvkm_error(subdev, "intr\n");
36 	return IRQ_NONE;
37 }
38 
39 int
40 ga100_ce_nonstall(struct nvkm_engine *engine)
41 {
42 	struct nvkm_subdev *subdev = &engine->subdev;
43 	struct nvkm_device *device = subdev->device;
44 
45 	return nvkm_rd32(device, 0x104424 + (subdev->inst * 0x80)) & 0x00000fff;
46 }
47 
48 int
49 ga100_ce_fini(struct nvkm_engine *engine, bool suspend)
50 {
51 	nvkm_inth_block(&engine->subdev.inth);
52 	return 0;
53 }
54 
55 int
56 ga100_ce_init(struct nvkm_engine *engine)
57 {
58 	nvkm_inth_allow(&engine->subdev.inth);
59 	return 0;
60 }
61 
62 int
63 ga100_ce_oneinit(struct nvkm_engine *engine)
64 {
65 	struct nvkm_subdev *subdev = &engine->subdev;
66 	struct nvkm_device *device = subdev->device;
67 	u32 vector;
68 
69 	vector = nvkm_rd32(device, 0x10442c + (subdev->inst * 0x80)) & 0x00000fff;
70 
71 	return nvkm_inth_add(&device->vfn->intr, vector, NVKM_INTR_PRIO_NORMAL,
72 			     subdev, ga100_ce_intr, &subdev->inth);
73 }
74 
75 static const struct nvkm_engine_func
76 ga100_ce = {
77 	.oneinit = ga100_ce_oneinit,
78 	.init = ga100_ce_init,
79 	.fini = ga100_ce_fini,
80 	.nonstall = ga100_ce_nonstall,
81 	.cclass = &gv100_ce_cclass,
82 	.sclass = {
83 		{ -1, -1, AMPERE_DMA_COPY_A },
84 		{}
85 	}
86 };
87 
88 int
89 ga100_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
90 	     struct nvkm_engine **pengine)
91 {
92 	if (nvkm_gsp_rm(device->gsp))
93 		return r535_ce_new(&ga100_ce, device, type, inst, pengine);
94 
95 	return nvkm_engine_new_(&ga100_ce, device, type, inst, true, pengine);
96 }
97