1 /* 2 * Copyright (C) 2008 Maarten Maathuis. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 * 25 */ 26 27 #ifndef __NV50_DISPLAY_H__ 28 #define __NV50_DISPLAY_H__ 29 30 #include "drmP.h" 31 #include "drm.h" 32 #include "nouveau_drv.h" 33 #include "nouveau_dma.h" 34 #include "nouveau_reg.h" 35 #include "nouveau_crtc.h" 36 #include "nouveau_software.h" 37 #include "nv50_evo.h" 38 39 struct nv50_display_crtc { 40 struct nouveau_channel *sync; 41 struct { 42 struct nouveau_bo *bo; 43 u32 offset; 44 u16 value; 45 } sem; 46 }; 47 48 struct nv50_display { 49 struct nouveau_channel *master; 50 struct nouveau_gpuobj *ntfy; 51 52 struct nv50_display_crtc crtc[2]; 53 54 struct tasklet_struct tasklet; 55 struct { 56 struct dcb_entry *dcb; 57 u16 script; 58 u32 pclk; 59 } irq; 60 }; 61 62 static inline struct nv50_display * 63 nv50_display(struct drm_device *dev) 64 { 65 struct drm_nouveau_private *dev_priv = dev->dev_private; 66 return dev_priv->engine.display.priv; 67 } 68 69 int nv50_display_early_init(struct drm_device *dev); 70 void nv50_display_late_takedown(struct drm_device *dev); 71 int nv50_display_create(struct drm_device *dev); 72 int nv50_display_init(struct drm_device *dev); 73 void nv50_display_fini(struct drm_device *dev); 74 void nv50_display_destroy(struct drm_device *dev); 75 int nv50_crtc_blank(struct nouveau_crtc *, bool blank); 76 int nv50_crtc_set_clock(struct drm_device *, int head, int pclk); 77 78 u32 nv50_display_active_crtcs(struct drm_device *); 79 80 int nv50_display_sync(struct drm_device *); 81 int nv50_display_flip_next(struct drm_crtc *, struct drm_framebuffer *, 82 struct nouveau_channel *chan); 83 void nv50_display_flip_stop(struct drm_crtc *); 84 85 int nv50_evo_create(struct drm_device *dev); 86 void nv50_evo_destroy(struct drm_device *dev); 87 int nv50_evo_init(struct drm_device *dev); 88 void nv50_evo_fini(struct drm_device *dev); 89 void nv50_evo_dmaobj_init(struct nouveau_gpuobj *, u32 memtype, u64 base, 90 u64 size); 91 int nv50_evo_dmaobj_new(struct nouveau_channel *, u32 handle, u32 memtype, 92 u64 base, u64 size, struct nouveau_gpuobj **); 93 94 #endif /* __NV50_DISPLAY_H__ */ 95