xref: /linux/drivers/gpu/drm/nouveau/nouveau_drv.h (revision 6de298ff13a807d12300bd616c6d3039987e6e87)
1 /* SPDX-License-Identifier: MIT */
2 #ifndef __NOUVEAU_DRV_H__
3 #define __NOUVEAU_DRV_H__
4 
5 #define DRIVER_AUTHOR		"Nouveau Project"
6 #define DRIVER_EMAIL		"nouveau@lists.freedesktop.org"
7 
8 #define DRIVER_NAME		"nouveau"
9 #define DRIVER_DESC		"nVidia Riva/TNT/GeForce/Quadro/Tesla/Tegra K1+"
10 #define DRIVER_DATE		"20120801"
11 
12 #define DRIVER_MAJOR		1
13 #define DRIVER_MINOR		3
14 #define DRIVER_PATCHLEVEL	1
15 
16 /*
17  * 1.1.1:
18  * 	- added support for tiled system memory buffer objects
19  *      - added support for NOUVEAU_GETPARAM_GRAPH_UNITS on [nvc0,nve0].
20  *      - added support for compressed memory storage types on [nvc0,nve0].
21  *      - added support for software methods 0x600,0x644,0x6ac on nvc0
22  *        to control registers on the MPs to enable performance counters,
23  *        and to control the warp error enable mask (OpenGL requires out of
24  *        bounds access to local memory to be silently ignored / return 0).
25  * 1.1.2:
26  *      - fixes multiple bugs in flip completion events and timestamping
27  * 1.2.0:
28  * 	- object api exposed to userspace
29  * 	- fermi,kepler,maxwell zbc
30  * 1.2.1:
31  *      - allow concurrent access to bo's mapped read/write.
32  * 1.2.2:
33  *      - add NOUVEAU_GEM_DOMAIN_COHERENT flag
34  * 1.3.0:
35  *      - NVIF ABI modified, safe because only (current) users are test
36  *        programs that get directly linked with NVKM.
37  * 1.3.1:
38  *      - implemented limited ABI16/NVIF interop
39  */
40 
41 #include <linux/notifier.h>
42 
43 #include <nvif/client.h>
44 #include <nvif/device.h>
45 #include <nvif/ioctl.h>
46 #include <nvif/mmu.h>
47 #include <nvif/vmm.h>
48 
49 #include <drm/drm_connector.h>
50 #include <drm/drm_device.h>
51 #include <drm/drm_drv.h>
52 #include <drm/drm_file.h>
53 
54 #include <drm/ttm/ttm_bo.h>
55 #include <drm/ttm/ttm_placement.h>
56 
57 #include <drm/drm_audio_component.h>
58 
59 #include "uapi/drm/nouveau_drm.h"
60 
61 struct nouveau_channel;
62 struct platform_device;
63 
64 #include "nouveau_fence.h"
65 #include "nouveau_bios.h"
66 #include "nouveau_vmm.h"
67 
68 struct nouveau_drm_tile {
69 	struct nouveau_fence *fence;
70 	bool used;
71 };
72 
73 enum nouveau_drm_object_route {
74 	NVDRM_OBJECT_NVIF = NVIF_IOCTL_V0_OWNER_NVIF,
75 	NVDRM_OBJECT_USIF,
76 	NVDRM_OBJECT_ABI16,
77 	NVDRM_OBJECT_ANY = NVIF_IOCTL_V0_OWNER_ANY,
78 };
79 
80 enum nouveau_drm_handle {
81 	NVDRM_CHAN    = 0xcccc0000, /* |= client chid */
82 	NVDRM_NVSW    = 0x55550000,
83 };
84 
85 struct nouveau_cli {
86 	struct nvif_client base;
87 	struct nouveau_drm *drm;
88 	struct mutex mutex;
89 
90 	struct nvif_device device;
91 	struct nvif_mmu mmu;
92 	struct nouveau_vmm vmm;
93 	struct nouveau_vmm svm;
94 	const struct nvif_mclass *mem;
95 
96 	struct list_head head;
97 	void *abi16;
98 	struct list_head objects;
99 	char name[32];
100 
101 	struct work_struct work;
102 	struct list_head worker;
103 	struct mutex lock;
104 };
105 
106 struct nouveau_cli_work {
107 	void (*func)(struct nouveau_cli_work *);
108 	struct nouveau_cli *cli;
109 	struct list_head head;
110 
111 	struct dma_fence *fence;
112 	struct dma_fence_cb cb;
113 };
114 
115 void nouveau_cli_work_queue(struct nouveau_cli *, struct dma_fence *,
116 			    struct nouveau_cli_work *);
117 
118 static inline struct nouveau_cli *
119 nouveau_cli(struct drm_file *fpriv)
120 {
121 	return fpriv ? fpriv->driver_priv : NULL;
122 }
123 
124 #include <nvif/object.h>
125 #include <nvif/parent.h>
126 
127 struct nouveau_drm {
128 	struct nvif_parent parent;
129 	struct nouveau_cli master;
130 	struct nouveau_cli client;
131 	struct drm_device *dev;
132 
133 	struct list_head clients;
134 
135 	/**
136 	 * @clients_lock: Protects access to the @clients list of &struct nouveau_cli.
137 	 */
138 	struct mutex clients_lock;
139 
140 	u8 old_pm_cap;
141 
142 	struct {
143 		struct agp_bridge_data *bridge;
144 		u32 base;
145 		u32 size;
146 		bool cma;
147 	} agp;
148 
149 	/* TTM interface support */
150 	struct {
151 		struct ttm_device bdev;
152 		atomic_t validate_sequence;
153 		int (*move)(struct nouveau_channel *,
154 			    struct ttm_buffer_object *,
155 			    struct ttm_resource *, struct ttm_resource *);
156 		struct nouveau_channel *chan;
157 		struct nvif_object copy;
158 		int mtrr;
159 		int type_vram;
160 		int type_host[2];
161 		int type_ncoh[2];
162 		struct mutex io_reserve_mutex;
163 		struct list_head io_reserve_lru;
164 	} ttm;
165 
166 	/* GEM interface support */
167 	struct {
168 		u64 vram_available;
169 		u64 gart_available;
170 	} gem;
171 
172 	/* synchronisation */
173 	void *fence;
174 
175 	/* Global channel management. */
176 	int chan_total; /* Number of channels across all runlists. */
177 	int chan_nr;	/* 0 if per-runlist CHIDs. */
178 	int runl_nr;
179 	struct {
180 		int chan_nr;
181 		int chan_id_base;
182 		u64 context_base;
183 	} *runl;
184 
185 	/* context for accelerated drm-internal operations */
186 	struct nouveau_channel *cechan;
187 	struct nouveau_channel *channel;
188 	struct nvkm_gpuobj *notify;
189 	struct nvif_object ntfy;
190 
191 	/* nv10-nv40 tiling regions */
192 	struct {
193 		struct nouveau_drm_tile reg[15];
194 		spinlock_t lock;
195 	} tile;
196 
197 	/* modesetting */
198 	struct nvbios vbios;
199 	struct nouveau_display *display;
200 	struct work_struct hpd_work;
201 	spinlock_t hpd_lock;
202 	u32 hpd_pending;
203 #ifdef CONFIG_ACPI
204 	struct notifier_block acpi_nb;
205 #endif
206 
207 	/* power management */
208 	struct nouveau_hwmon *hwmon;
209 	struct nouveau_debugfs *debugfs;
210 
211 	/* led management */
212 	struct nouveau_led *led;
213 
214 	struct dev_pm_domain vga_pm_domain;
215 
216 	struct nouveau_svm *svm;
217 
218 	struct nouveau_dmem *dmem;
219 
220 	struct {
221 		struct drm_audio_component *component;
222 		struct mutex lock;
223 		bool component_registered;
224 	} audio;
225 };
226 
227 static inline struct nouveau_drm *
228 nouveau_drm(struct drm_device *dev)
229 {
230 	return dev->dev_private;
231 }
232 
233 static inline bool
234 nouveau_drm_use_coherent_gpu_mapping(struct nouveau_drm *drm)
235 {
236 	struct nvif_mmu *mmu = &drm->client.mmu;
237 	return !(mmu->type[drm->ttm.type_host[0]].type & NVIF_MEM_UNCACHED);
238 }
239 
240 int nouveau_pmops_suspend(struct device *);
241 int nouveau_pmops_resume(struct device *);
242 bool nouveau_pmops_runtime(void);
243 
244 #include <nvkm/core/tegra.h>
245 
246 struct drm_device *
247 nouveau_platform_device_create(const struct nvkm_device_tegra_func *,
248 			       struct platform_device *, struct nvkm_device **);
249 void nouveau_drm_device_remove(struct drm_device *dev);
250 
251 #define NV_PRINTK(l,c,f,a...) do {                                             \
252 	struct nouveau_cli *_cli = (c);                                        \
253 	dev_##l(_cli->drm->dev->dev, "%s: "f, _cli->name, ##a);                \
254 } while(0)
255 
256 #define NV_FATAL(drm,f,a...) NV_PRINTK(crit, &(drm)->client, f, ##a)
257 #define NV_ERROR(drm,f,a...) NV_PRINTK(err, &(drm)->client, f, ##a)
258 #define NV_WARN(drm,f,a...) NV_PRINTK(warn, &(drm)->client, f, ##a)
259 #define NV_INFO(drm,f,a...) NV_PRINTK(info, &(drm)->client, f, ##a)
260 
261 #define NV_DEBUG(drm,f,a...) do {                                              \
262 	if (drm_debug_enabled(DRM_UT_DRIVER))                                  \
263 		NV_PRINTK(info, &(drm)->client, f, ##a);                       \
264 } while(0)
265 #define NV_ATOMIC(drm,f,a...) do {                                             \
266 	if (drm_debug_enabled(DRM_UT_ATOMIC))                                  \
267 		NV_PRINTK(info, &(drm)->client, f, ##a);                       \
268 } while(0)
269 
270 #define NV_PRINTK_ONCE(l,c,f,a...) NV_PRINTK(l##_once,c,f, ##a)
271 
272 #define NV_ERROR_ONCE(drm,f,a...) NV_PRINTK_ONCE(err, &(drm)->client, f, ##a)
273 #define NV_WARN_ONCE(drm,f,a...) NV_PRINTK_ONCE(warn, &(drm)->client, f, ##a)
274 #define NV_INFO_ONCE(drm,f,a...) NV_PRINTK_ONCE(info, &(drm)->client, f, ##a)
275 
276 extern int nouveau_modeset;
277 
278 #endif
279