1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 25 #include <linux/console.h> 26 #include <linux/delay.h> 27 #include <linux/module.h> 28 #include <linux/pci.h> 29 #include <linux/pm_runtime.h> 30 #include <linux/vga_switcheroo.h> 31 32 #include <drm/drmP.h> 33 #include <drm/drm_crtc_helper.h> 34 35 #include <core/gpuobj.h> 36 #include <core/option.h> 37 #include <core/pci.h> 38 #include <core/tegra.h> 39 40 #include <nvif/driver.h> 41 #include <nvif/fifo.h> 42 #include <nvif/user.h> 43 44 #include <nvif/class.h> 45 #include <nvif/cl0002.h> 46 #include <nvif/cla06f.h> 47 #include <nvif/if0004.h> 48 49 #include "nouveau_drv.h" 50 #include "nouveau_dma.h" 51 #include "nouveau_ttm.h" 52 #include "nouveau_gem.h" 53 #include "nouveau_vga.h" 54 #include "nouveau_led.h" 55 #include "nouveau_hwmon.h" 56 #include "nouveau_acpi.h" 57 #include "nouveau_bios.h" 58 #include "nouveau_ioctl.h" 59 #include "nouveau_abi16.h" 60 #include "nouveau_fbcon.h" 61 #include "nouveau_fence.h" 62 #include "nouveau_debugfs.h" 63 #include "nouveau_usif.h" 64 #include "nouveau_connector.h" 65 #include "nouveau_platform.h" 66 67 MODULE_PARM_DESC(config, "option string to pass to driver core"); 68 static char *nouveau_config; 69 module_param_named(config, nouveau_config, charp, 0400); 70 71 MODULE_PARM_DESC(debug, "debug string to pass to driver core"); 72 static char *nouveau_debug; 73 module_param_named(debug, nouveau_debug, charp, 0400); 74 75 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); 76 static int nouveau_noaccel = 0; 77 module_param_named(noaccel, nouveau_noaccel, int, 0400); 78 79 MODULE_PARM_DESC(modeset, "enable driver (default: auto, " 80 "0 = disabled, 1 = enabled, 2 = headless)"); 81 int nouveau_modeset = -1; 82 module_param_named(modeset, nouveau_modeset, int, 0400); 83 84 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)"); 85 static int nouveau_atomic = 0; 86 module_param_named(atomic, nouveau_atomic, int, 0400); 87 88 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); 89 static int nouveau_runtime_pm = -1; 90 module_param_named(runpm, nouveau_runtime_pm, int, 0400); 91 92 static struct drm_driver driver_stub; 93 static struct drm_driver driver_pci; 94 static struct drm_driver driver_platform; 95 96 static u64 97 nouveau_pci_name(struct pci_dev *pdev) 98 { 99 u64 name = (u64)pci_domain_nr(pdev->bus) << 32; 100 name |= pdev->bus->number << 16; 101 name |= PCI_SLOT(pdev->devfn) << 8; 102 return name | PCI_FUNC(pdev->devfn); 103 } 104 105 static u64 106 nouveau_platform_name(struct platform_device *platformdev) 107 { 108 return platformdev->id; 109 } 110 111 static u64 112 nouveau_name(struct drm_device *dev) 113 { 114 if (dev->pdev) 115 return nouveau_pci_name(dev->pdev); 116 else 117 return nouveau_platform_name(to_platform_device(dev->dev)); 118 } 119 120 static inline bool 121 nouveau_cli_work_ready(struct dma_fence *fence) 122 { 123 if (!dma_fence_is_signaled(fence)) 124 return false; 125 dma_fence_put(fence); 126 return true; 127 } 128 129 static void 130 nouveau_cli_work(struct work_struct *w) 131 { 132 struct nouveau_cli *cli = container_of(w, typeof(*cli), work); 133 struct nouveau_cli_work *work, *wtmp; 134 mutex_lock(&cli->lock); 135 list_for_each_entry_safe(work, wtmp, &cli->worker, head) { 136 if (!work->fence || nouveau_cli_work_ready(work->fence)) { 137 list_del(&work->head); 138 work->func(work); 139 } 140 } 141 mutex_unlock(&cli->lock); 142 } 143 144 static void 145 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb) 146 { 147 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb); 148 schedule_work(&work->cli->work); 149 } 150 151 void 152 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence, 153 struct nouveau_cli_work *work) 154 { 155 work->fence = dma_fence_get(fence); 156 work->cli = cli; 157 mutex_lock(&cli->lock); 158 list_add_tail(&work->head, &cli->worker); 159 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence)) 160 nouveau_cli_work_fence(fence, &work->cb); 161 mutex_unlock(&cli->lock); 162 } 163 164 static void 165 nouveau_cli_fini(struct nouveau_cli *cli) 166 { 167 /* All our channels are dead now, which means all the fences they 168 * own are signalled, and all callback functions have been called. 169 * 170 * So, after flushing the workqueue, there should be nothing left. 171 */ 172 flush_work(&cli->work); 173 WARN_ON(!list_empty(&cli->worker)); 174 175 usif_client_fini(cli); 176 nouveau_vmm_fini(&cli->vmm); 177 nvif_mmu_fini(&cli->mmu); 178 nvif_device_fini(&cli->device); 179 mutex_lock(&cli->drm->master.lock); 180 nvif_client_fini(&cli->base); 181 mutex_unlock(&cli->drm->master.lock); 182 } 183 184 static int 185 nouveau_cli_init(struct nouveau_drm *drm, const char *sname, 186 struct nouveau_cli *cli) 187 { 188 static const struct nvif_mclass 189 mems[] = { 190 { NVIF_CLASS_MEM_GF100, -1 }, 191 { NVIF_CLASS_MEM_NV50 , -1 }, 192 { NVIF_CLASS_MEM_NV04 , -1 }, 193 {} 194 }; 195 static const struct nvif_mclass 196 mmus[] = { 197 { NVIF_CLASS_MMU_GF100, -1 }, 198 { NVIF_CLASS_MMU_NV50 , -1 }, 199 { NVIF_CLASS_MMU_NV04 , -1 }, 200 {} 201 }; 202 static const struct nvif_mclass 203 vmms[] = { 204 { NVIF_CLASS_VMM_GP100, -1 }, 205 { NVIF_CLASS_VMM_GM200, -1 }, 206 { NVIF_CLASS_VMM_GF100, -1 }, 207 { NVIF_CLASS_VMM_NV50 , -1 }, 208 { NVIF_CLASS_VMM_NV04 , -1 }, 209 {} 210 }; 211 u64 device = nouveau_name(drm->dev); 212 int ret; 213 214 snprintf(cli->name, sizeof(cli->name), "%s", sname); 215 cli->drm = drm; 216 mutex_init(&cli->mutex); 217 usif_client_init(cli); 218 219 INIT_WORK(&cli->work, nouveau_cli_work); 220 INIT_LIST_HEAD(&cli->worker); 221 mutex_init(&cli->lock); 222 223 if (cli == &drm->master) { 224 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug, 225 cli->name, device, &cli->base); 226 } else { 227 mutex_lock(&drm->master.lock); 228 ret = nvif_client_init(&drm->master.base, cli->name, device, 229 &cli->base); 230 mutex_unlock(&drm->master.lock); 231 } 232 if (ret) { 233 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret); 234 goto done; 235 } 236 237 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE, 238 &(struct nv_device_v0) { 239 .device = ~0, 240 }, sizeof(struct nv_device_v0), 241 &cli->device); 242 if (ret) { 243 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret); 244 goto done; 245 } 246 247 ret = nvif_mclass(&cli->device.object, mmus); 248 if (ret < 0) { 249 NV_PRINTK(err, cli, "No supported MMU class\n"); 250 goto done; 251 } 252 253 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu); 254 if (ret) { 255 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret); 256 goto done; 257 } 258 259 ret = nvif_mclass(&cli->mmu.object, vmms); 260 if (ret < 0) { 261 NV_PRINTK(err, cli, "No supported VMM class\n"); 262 goto done; 263 } 264 265 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm); 266 if (ret) { 267 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret); 268 goto done; 269 } 270 271 ret = nvif_mclass(&cli->mmu.object, mems); 272 if (ret < 0) { 273 NV_PRINTK(err, cli, "No supported MEM class\n"); 274 goto done; 275 } 276 277 cli->mem = &mems[ret]; 278 return 0; 279 done: 280 if (ret) 281 nouveau_cli_fini(cli); 282 return ret; 283 } 284 285 static void 286 nouveau_accel_fini(struct nouveau_drm *drm) 287 { 288 nouveau_channel_idle(drm->channel); 289 nvif_object_fini(&drm->ntfy); 290 nvkm_gpuobj_del(&drm->notify); 291 nvif_notify_fini(&drm->flip); 292 nvif_object_fini(&drm->nvsw); 293 nouveau_channel_del(&drm->channel); 294 295 nouveau_channel_idle(drm->cechan); 296 nvif_object_fini(&drm->ttm.copy); 297 nouveau_channel_del(&drm->cechan); 298 299 if (drm->fence) 300 nouveau_fence(drm)->dtor(drm); 301 } 302 303 static void 304 nouveau_accel_init(struct nouveau_drm *drm) 305 { 306 struct nvif_device *device = &drm->client.device; 307 struct nvif_sclass *sclass; 308 u32 arg0, arg1; 309 int ret, i, n; 310 311 if (nouveau_noaccel) 312 return; 313 314 ret = nouveau_channels_init(drm); 315 if (ret) 316 return; 317 318 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) { 319 ret = nvif_user_init(device); 320 if (ret) 321 return; 322 } 323 324 /* initialise synchronisation routines */ 325 /*XXX: this is crap, but the fence/channel stuff is a little 326 * backwards in some places. this will be fixed. 327 */ 328 ret = n = nvif_object_sclass_get(&device->object, &sclass); 329 if (ret < 0) 330 return; 331 332 for (ret = -ENOSYS, i = 0; i < n; i++) { 333 switch (sclass[i].oclass) { 334 case NV03_CHANNEL_DMA: 335 ret = nv04_fence_create(drm); 336 break; 337 case NV10_CHANNEL_DMA: 338 ret = nv10_fence_create(drm); 339 break; 340 case NV17_CHANNEL_DMA: 341 case NV40_CHANNEL_DMA: 342 ret = nv17_fence_create(drm); 343 break; 344 case NV50_CHANNEL_GPFIFO: 345 ret = nv50_fence_create(drm); 346 break; 347 case G82_CHANNEL_GPFIFO: 348 ret = nv84_fence_create(drm); 349 break; 350 case FERMI_CHANNEL_GPFIFO: 351 case KEPLER_CHANNEL_GPFIFO_A: 352 case KEPLER_CHANNEL_GPFIFO_B: 353 case MAXWELL_CHANNEL_GPFIFO_A: 354 case PASCAL_CHANNEL_GPFIFO_A: 355 case VOLTA_CHANNEL_GPFIFO_A: 356 case TURING_CHANNEL_GPFIFO_A: 357 ret = nvc0_fence_create(drm); 358 break; 359 default: 360 break; 361 } 362 } 363 364 nvif_object_sclass_put(&sclass); 365 if (ret) { 366 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); 367 nouveau_accel_fini(drm); 368 return; 369 } 370 371 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { 372 ret = nouveau_channel_new(drm, &drm->client.device, 373 nvif_fifo_runlist_ce(device), 0, 374 true, &drm->cechan); 375 if (ret) 376 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 377 378 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR); 379 arg1 = 1; 380 } else 381 if (device->info.chipset >= 0xa3 && 382 device->info.chipset != 0xaa && 383 device->info.chipset != 0xac) { 384 ret = nouveau_channel_new(drm, &drm->client.device, 385 NvDmaFB, NvDmaTT, false, 386 &drm->cechan); 387 if (ret) 388 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 389 390 arg0 = NvDmaFB; 391 arg1 = NvDmaTT; 392 } else { 393 arg0 = NvDmaFB; 394 arg1 = NvDmaTT; 395 } 396 397 ret = nouveau_channel_new(drm, &drm->client.device, 398 arg0, arg1, false, &drm->channel); 399 if (ret) { 400 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); 401 nouveau_accel_fini(drm); 402 return; 403 } 404 405 if (device->info.family < NV_DEVICE_INFO_V0_TESLA) { 406 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW, 407 nouveau_abi16_swclass(drm), NULL, 0, 408 &drm->nvsw); 409 if (ret == 0) { 410 ret = RING_SPACE(drm->channel, 2); 411 if (ret == 0) { 412 BEGIN_NV04(drm->channel, NvSubSw, 0, 1); 413 OUT_RING (drm->channel, drm->nvsw.handle); 414 } 415 416 ret = nvif_notify_init(&drm->nvsw, 417 nouveau_flip_complete, 418 false, NV04_NVSW_NTFY_UEVENT, 419 NULL, 0, 0, &drm->flip); 420 if (ret == 0) 421 ret = nvif_notify_get(&drm->flip); 422 if (ret) { 423 nouveau_accel_fini(drm); 424 return; 425 } 426 } 427 428 if (ret) { 429 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret); 430 nouveau_accel_fini(drm); 431 return; 432 } 433 } 434 435 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 436 ret = nvkm_gpuobj_new(nvxx_device(&drm->client.device), 32, 0, 437 false, NULL, &drm->notify); 438 if (ret) { 439 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); 440 nouveau_accel_fini(drm); 441 return; 442 } 443 444 ret = nvif_object_init(&drm->channel->user, NvNotify0, 445 NV_DMA_IN_MEMORY, 446 &(struct nv_dma_v0) { 447 .target = NV_DMA_V0_TARGET_VRAM, 448 .access = NV_DMA_V0_ACCESS_RDWR, 449 .start = drm->notify->addr, 450 .limit = drm->notify->addr + 31 451 }, sizeof(struct nv_dma_v0), 452 &drm->ntfy); 453 if (ret) { 454 nouveau_accel_fini(drm); 455 return; 456 } 457 } 458 459 460 nouveau_bo_move_init(drm); 461 } 462 463 static int 464 nouveau_drm_device_init(struct drm_device *dev) 465 { 466 struct nouveau_drm *drm; 467 int ret; 468 469 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL))) 470 return -ENOMEM; 471 dev->dev_private = drm; 472 drm->dev = dev; 473 474 ret = nouveau_cli_init(drm, "DRM-master", &drm->master); 475 if (ret) 476 goto fail_alloc; 477 478 ret = nouveau_cli_init(drm, "DRM", &drm->client); 479 if (ret) 480 goto fail_master; 481 482 dev->irq_enabled = true; 483 484 nvxx_client(&drm->client.base)->debug = 485 nvkm_dbgopt(nouveau_debug, "DRM"); 486 487 INIT_LIST_HEAD(&drm->clients); 488 spin_lock_init(&drm->tile.lock); 489 490 /* workaround an odd issue on nvc1 by disabling the device's 491 * nosnoop capability. hopefully won't cause issues until a 492 * better fix is found - assuming there is one... 493 */ 494 if (drm->client.device.info.chipset == 0xc1) 495 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000); 496 497 nouveau_vga_init(drm); 498 499 ret = nouveau_ttm_init(drm); 500 if (ret) 501 goto fail_ttm; 502 503 ret = nouveau_bios_init(dev); 504 if (ret) 505 goto fail_bios; 506 507 ret = nouveau_display_create(dev); 508 if (ret) 509 goto fail_dispctor; 510 511 if (dev->mode_config.num_crtc) { 512 ret = nouveau_display_init(dev); 513 if (ret) 514 goto fail_dispinit; 515 } 516 517 nouveau_debugfs_init(drm); 518 nouveau_hwmon_init(dev); 519 nouveau_accel_init(drm); 520 nouveau_fbcon_init(dev); 521 nouveau_led_init(dev); 522 523 if (nouveau_pmops_runtime()) { 524 pm_runtime_use_autosuspend(dev->dev); 525 pm_runtime_set_autosuspend_delay(dev->dev, 5000); 526 pm_runtime_set_active(dev->dev); 527 pm_runtime_allow(dev->dev); 528 pm_runtime_mark_last_busy(dev->dev); 529 pm_runtime_put(dev->dev); 530 } 531 532 return 0; 533 534 fail_dispinit: 535 nouveau_display_destroy(dev); 536 fail_dispctor: 537 nouveau_bios_takedown(dev); 538 fail_bios: 539 nouveau_ttm_fini(drm); 540 fail_ttm: 541 nouveau_vga_fini(drm); 542 nouveau_cli_fini(&drm->client); 543 fail_master: 544 nouveau_cli_fini(&drm->master); 545 fail_alloc: 546 kfree(drm); 547 return ret; 548 } 549 550 static void 551 nouveau_drm_device_fini(struct drm_device *dev) 552 { 553 struct nouveau_drm *drm = nouveau_drm(dev); 554 555 if (nouveau_pmops_runtime()) { 556 pm_runtime_get_sync(dev->dev); 557 pm_runtime_forbid(dev->dev); 558 } 559 560 nouveau_led_fini(dev); 561 nouveau_fbcon_fini(dev); 562 nouveau_accel_fini(drm); 563 nouveau_hwmon_fini(dev); 564 nouveau_debugfs_fini(drm); 565 566 if (dev->mode_config.num_crtc) 567 nouveau_display_fini(dev, false, false); 568 nouveau_display_destroy(dev); 569 570 nouveau_bios_takedown(dev); 571 572 nouveau_ttm_fini(drm); 573 nouveau_vga_fini(drm); 574 575 nouveau_cli_fini(&drm->client); 576 nouveau_cli_fini(&drm->master); 577 kfree(drm); 578 } 579 580 static int nouveau_drm_probe(struct pci_dev *pdev, 581 const struct pci_device_id *pent) 582 { 583 struct nvkm_device *device; 584 struct drm_device *drm_dev; 585 struct apertures_struct *aper; 586 bool boot = false; 587 int ret; 588 589 if (vga_switcheroo_client_probe_defer(pdev)) 590 return -EPROBE_DEFER; 591 592 /* We need to check that the chipset is supported before booting 593 * fbdev off the hardware, as there's no way to put it back. 594 */ 595 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device); 596 if (ret) 597 return ret; 598 599 nvkm_device_del(&device); 600 601 /* Remove conflicting drivers (vesafb, efifb etc). */ 602 aper = alloc_apertures(3); 603 if (!aper) 604 return -ENOMEM; 605 606 aper->ranges[0].base = pci_resource_start(pdev, 1); 607 aper->ranges[0].size = pci_resource_len(pdev, 1); 608 aper->count = 1; 609 610 if (pci_resource_len(pdev, 2)) { 611 aper->ranges[aper->count].base = pci_resource_start(pdev, 2); 612 aper->ranges[aper->count].size = pci_resource_len(pdev, 2); 613 aper->count++; 614 } 615 616 if (pci_resource_len(pdev, 3)) { 617 aper->ranges[aper->count].base = pci_resource_start(pdev, 3); 618 aper->ranges[aper->count].size = pci_resource_len(pdev, 3); 619 aper->count++; 620 } 621 622 #ifdef CONFIG_X86 623 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 624 #endif 625 if (nouveau_modeset != 2) 626 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot); 627 kfree(aper); 628 629 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, 630 true, true, ~0ULL, &device); 631 if (ret) 632 return ret; 633 634 pci_set_master(pdev); 635 636 if (nouveau_atomic) 637 driver_pci.driver_features |= DRIVER_ATOMIC; 638 639 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev); 640 if (IS_ERR(drm_dev)) { 641 ret = PTR_ERR(drm_dev); 642 goto fail_nvkm; 643 } 644 645 ret = pci_enable_device(pdev); 646 if (ret) 647 goto fail_drm; 648 649 drm_dev->pdev = pdev; 650 pci_set_drvdata(pdev, drm_dev); 651 652 ret = nouveau_drm_device_init(drm_dev); 653 if (ret) 654 goto fail_pci; 655 656 ret = drm_dev_register(drm_dev, pent->driver_data); 657 if (ret) 658 goto fail_drm_dev_init; 659 660 return 0; 661 662 fail_drm_dev_init: 663 nouveau_drm_device_fini(drm_dev); 664 fail_pci: 665 pci_disable_device(pdev); 666 fail_drm: 667 drm_dev_put(drm_dev); 668 fail_nvkm: 669 nvkm_device_del(&device); 670 return ret; 671 } 672 673 void 674 nouveau_drm_device_remove(struct drm_device *dev) 675 { 676 struct pci_dev *pdev = dev->pdev; 677 struct nouveau_drm *drm = nouveau_drm(dev); 678 struct nvkm_client *client; 679 struct nvkm_device *device; 680 681 drm_dev_unregister(dev); 682 683 dev->irq_enabled = false; 684 client = nvxx_client(&drm->client.base); 685 device = nvkm_device_find(client->device); 686 687 nouveau_drm_device_fini(dev); 688 pci_disable_device(pdev); 689 drm_dev_put(dev); 690 nvkm_device_del(&device); 691 } 692 693 static void 694 nouveau_drm_remove(struct pci_dev *pdev) 695 { 696 struct drm_device *dev = pci_get_drvdata(pdev); 697 698 nouveau_drm_device_remove(dev); 699 } 700 701 static int 702 nouveau_do_suspend(struct drm_device *dev, bool runtime) 703 { 704 struct nouveau_drm *drm = nouveau_drm(dev); 705 int ret; 706 707 nouveau_led_suspend(dev); 708 709 if (dev->mode_config.num_crtc) { 710 NV_DEBUG(drm, "suspending console...\n"); 711 nouveau_fbcon_set_suspend(dev, 1); 712 NV_DEBUG(drm, "suspending display...\n"); 713 ret = nouveau_display_suspend(dev, runtime); 714 if (ret) 715 return ret; 716 } 717 718 NV_DEBUG(drm, "evicting buffers...\n"); 719 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); 720 721 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n"); 722 if (drm->cechan) { 723 ret = nouveau_channel_idle(drm->cechan); 724 if (ret) 725 goto fail_display; 726 } 727 728 if (drm->channel) { 729 ret = nouveau_channel_idle(drm->channel); 730 if (ret) 731 goto fail_display; 732 } 733 734 NV_DEBUG(drm, "suspending fence...\n"); 735 if (drm->fence && nouveau_fence(drm)->suspend) { 736 if (!nouveau_fence(drm)->suspend(drm)) { 737 ret = -ENOMEM; 738 goto fail_display; 739 } 740 } 741 742 NV_DEBUG(drm, "suspending object tree...\n"); 743 ret = nvif_client_suspend(&drm->master.base); 744 if (ret) 745 goto fail_client; 746 747 return 0; 748 749 fail_client: 750 if (drm->fence && nouveau_fence(drm)->resume) 751 nouveau_fence(drm)->resume(drm); 752 753 fail_display: 754 if (dev->mode_config.num_crtc) { 755 NV_DEBUG(drm, "resuming display...\n"); 756 nouveau_display_resume(dev, runtime); 757 } 758 return ret; 759 } 760 761 static int 762 nouveau_do_resume(struct drm_device *dev, bool runtime) 763 { 764 struct nouveau_drm *drm = nouveau_drm(dev); 765 766 NV_DEBUG(drm, "resuming object tree...\n"); 767 nvif_client_resume(&drm->master.base); 768 769 NV_DEBUG(drm, "resuming fence...\n"); 770 if (drm->fence && nouveau_fence(drm)->resume) 771 nouveau_fence(drm)->resume(drm); 772 773 nouveau_run_vbios_init(dev); 774 775 if (dev->mode_config.num_crtc) { 776 NV_DEBUG(drm, "resuming display...\n"); 777 nouveau_display_resume(dev, runtime); 778 NV_DEBUG(drm, "resuming console...\n"); 779 nouveau_fbcon_set_suspend(dev, 0); 780 } 781 782 nouveau_led_resume(dev); 783 784 return 0; 785 } 786 787 int 788 nouveau_pmops_suspend(struct device *dev) 789 { 790 struct pci_dev *pdev = to_pci_dev(dev); 791 struct drm_device *drm_dev = pci_get_drvdata(pdev); 792 int ret; 793 794 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 795 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 796 return 0; 797 798 ret = nouveau_do_suspend(drm_dev, false); 799 if (ret) 800 return ret; 801 802 pci_save_state(pdev); 803 pci_disable_device(pdev); 804 pci_set_power_state(pdev, PCI_D3hot); 805 udelay(200); 806 return 0; 807 } 808 809 int 810 nouveau_pmops_resume(struct device *dev) 811 { 812 struct pci_dev *pdev = to_pci_dev(dev); 813 struct drm_device *drm_dev = pci_get_drvdata(pdev); 814 int ret; 815 816 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 817 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 818 return 0; 819 820 pci_set_power_state(pdev, PCI_D0); 821 pci_restore_state(pdev); 822 ret = pci_enable_device(pdev); 823 if (ret) 824 return ret; 825 pci_set_master(pdev); 826 827 ret = nouveau_do_resume(drm_dev, false); 828 829 /* Monitors may have been connected / disconnected during suspend */ 830 schedule_work(&nouveau_drm(drm_dev)->hpd_work); 831 832 return ret; 833 } 834 835 static int 836 nouveau_pmops_freeze(struct device *dev) 837 { 838 struct pci_dev *pdev = to_pci_dev(dev); 839 struct drm_device *drm_dev = pci_get_drvdata(pdev); 840 return nouveau_do_suspend(drm_dev, false); 841 } 842 843 static int 844 nouveau_pmops_thaw(struct device *dev) 845 { 846 struct pci_dev *pdev = to_pci_dev(dev); 847 struct drm_device *drm_dev = pci_get_drvdata(pdev); 848 return nouveau_do_resume(drm_dev, false); 849 } 850 851 bool 852 nouveau_pmops_runtime(void) 853 { 854 if (nouveau_runtime_pm == -1) 855 return nouveau_is_optimus() || nouveau_is_v1_dsm(); 856 return nouveau_runtime_pm == 1; 857 } 858 859 static int 860 nouveau_pmops_runtime_suspend(struct device *dev) 861 { 862 struct pci_dev *pdev = to_pci_dev(dev); 863 struct drm_device *drm_dev = pci_get_drvdata(pdev); 864 int ret; 865 866 if (!nouveau_pmops_runtime()) { 867 pm_runtime_forbid(dev); 868 return -EBUSY; 869 } 870 871 nouveau_switcheroo_optimus_dsm(); 872 ret = nouveau_do_suspend(drm_dev, true); 873 pci_save_state(pdev); 874 pci_disable_device(pdev); 875 pci_ignore_hotplug(pdev); 876 pci_set_power_state(pdev, PCI_D3cold); 877 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 878 return ret; 879 } 880 881 static int 882 nouveau_pmops_runtime_resume(struct device *dev) 883 { 884 struct pci_dev *pdev = to_pci_dev(dev); 885 struct drm_device *drm_dev = pci_get_drvdata(pdev); 886 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device; 887 int ret; 888 889 if (!nouveau_pmops_runtime()) { 890 pm_runtime_forbid(dev); 891 return -EBUSY; 892 } 893 894 pci_set_power_state(pdev, PCI_D0); 895 pci_restore_state(pdev); 896 ret = pci_enable_device(pdev); 897 if (ret) 898 return ret; 899 pci_set_master(pdev); 900 901 ret = nouveau_do_resume(drm_dev, true); 902 903 /* do magic */ 904 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); 905 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 906 907 /* Monitors may have been connected / disconnected during suspend */ 908 schedule_work(&nouveau_drm(drm_dev)->hpd_work); 909 910 return ret; 911 } 912 913 static int 914 nouveau_pmops_runtime_idle(struct device *dev) 915 { 916 if (!nouveau_pmops_runtime()) { 917 pm_runtime_forbid(dev); 918 return -EBUSY; 919 } 920 921 pm_runtime_mark_last_busy(dev); 922 pm_runtime_autosuspend(dev); 923 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 924 return 1; 925 } 926 927 static int 928 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) 929 { 930 struct nouveau_drm *drm = nouveau_drm(dev); 931 struct nouveau_cli *cli; 932 char name[32], tmpname[TASK_COMM_LEN]; 933 int ret; 934 935 /* need to bring up power immediately if opening device */ 936 ret = pm_runtime_get_sync(dev->dev); 937 if (ret < 0 && ret != -EACCES) 938 return ret; 939 940 get_task_comm(tmpname, current); 941 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); 942 943 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) { 944 ret = -ENOMEM; 945 goto done; 946 } 947 948 ret = nouveau_cli_init(drm, name, cli); 949 if (ret) 950 goto done; 951 952 cli->base.super = false; 953 954 fpriv->driver_priv = cli; 955 956 mutex_lock(&drm->client.mutex); 957 list_add(&cli->head, &drm->clients); 958 mutex_unlock(&drm->client.mutex); 959 960 done: 961 if (ret && cli) { 962 nouveau_cli_fini(cli); 963 kfree(cli); 964 } 965 966 pm_runtime_mark_last_busy(dev->dev); 967 pm_runtime_put_autosuspend(dev->dev); 968 return ret; 969 } 970 971 static void 972 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) 973 { 974 struct nouveau_cli *cli = nouveau_cli(fpriv); 975 struct nouveau_drm *drm = nouveau_drm(dev); 976 977 pm_runtime_get_sync(dev->dev); 978 979 mutex_lock(&cli->mutex); 980 if (cli->abi16) 981 nouveau_abi16_fini(cli->abi16); 982 mutex_unlock(&cli->mutex); 983 984 mutex_lock(&drm->client.mutex); 985 list_del(&cli->head); 986 mutex_unlock(&drm->client.mutex); 987 988 nouveau_cli_fini(cli); 989 kfree(cli); 990 pm_runtime_mark_last_busy(dev->dev); 991 pm_runtime_put_autosuspend(dev->dev); 992 } 993 994 static const struct drm_ioctl_desc 995 nouveau_ioctls[] = { 996 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW), 997 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 998 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 999 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW), 1000 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 1001 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 1002 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW), 1003 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW), 1004 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW), 1005 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW), 1006 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW), 1007 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW), 1008 }; 1009 1010 long 1011 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 1012 { 1013 struct drm_file *filp = file->private_data; 1014 struct drm_device *dev = filp->minor->dev; 1015 long ret; 1016 1017 ret = pm_runtime_get_sync(dev->dev); 1018 if (ret < 0 && ret != -EACCES) 1019 return ret; 1020 1021 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { 1022 case DRM_NOUVEAU_NVIF: 1023 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); 1024 break; 1025 default: 1026 ret = drm_ioctl(file, cmd, arg); 1027 break; 1028 } 1029 1030 pm_runtime_mark_last_busy(dev->dev); 1031 pm_runtime_put_autosuspend(dev->dev); 1032 return ret; 1033 } 1034 1035 static const struct file_operations 1036 nouveau_driver_fops = { 1037 .owner = THIS_MODULE, 1038 .open = drm_open, 1039 .release = drm_release, 1040 .unlocked_ioctl = nouveau_drm_ioctl, 1041 .mmap = nouveau_ttm_mmap, 1042 .poll = drm_poll, 1043 .read = drm_read, 1044 #if defined(CONFIG_COMPAT) 1045 .compat_ioctl = nouveau_compat_ioctl, 1046 #endif 1047 .llseek = noop_llseek, 1048 }; 1049 1050 static struct drm_driver 1051 driver_stub = { 1052 .driver_features = 1053 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER | 1054 DRIVER_KMS_LEGACY_CONTEXT, 1055 1056 .open = nouveau_drm_open, 1057 .postclose = nouveau_drm_postclose, 1058 .lastclose = nouveau_vga_lastclose, 1059 1060 #if defined(CONFIG_DEBUG_FS) 1061 .debugfs_init = nouveau_drm_debugfs_init, 1062 #endif 1063 1064 .enable_vblank = nouveau_display_vblank_enable, 1065 .disable_vblank = nouveau_display_vblank_disable, 1066 .get_scanout_position = nouveau_display_scanoutpos, 1067 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos, 1068 1069 .ioctls = nouveau_ioctls, 1070 .num_ioctls = ARRAY_SIZE(nouveau_ioctls), 1071 .fops = &nouveau_driver_fops, 1072 1073 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 1074 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 1075 .gem_prime_export = drm_gem_prime_export, 1076 .gem_prime_import = drm_gem_prime_import, 1077 .gem_prime_pin = nouveau_gem_prime_pin, 1078 .gem_prime_res_obj = nouveau_gem_prime_res_obj, 1079 .gem_prime_unpin = nouveau_gem_prime_unpin, 1080 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, 1081 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, 1082 .gem_prime_vmap = nouveau_gem_prime_vmap, 1083 .gem_prime_vunmap = nouveau_gem_prime_vunmap, 1084 1085 .gem_free_object_unlocked = nouveau_gem_object_del, 1086 .gem_open_object = nouveau_gem_object_open, 1087 .gem_close_object = nouveau_gem_object_close, 1088 1089 .dumb_create = nouveau_display_dumb_create, 1090 .dumb_map_offset = nouveau_display_dumb_map_offset, 1091 1092 .name = DRIVER_NAME, 1093 .desc = DRIVER_DESC, 1094 #ifdef GIT_REVISION 1095 .date = GIT_REVISION, 1096 #else 1097 .date = DRIVER_DATE, 1098 #endif 1099 .major = DRIVER_MAJOR, 1100 .minor = DRIVER_MINOR, 1101 .patchlevel = DRIVER_PATCHLEVEL, 1102 }; 1103 1104 static struct pci_device_id 1105 nouveau_drm_pci_table[] = { 1106 { 1107 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), 1108 .class = PCI_BASE_CLASS_DISPLAY << 16, 1109 .class_mask = 0xff << 16, 1110 }, 1111 { 1112 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), 1113 .class = PCI_BASE_CLASS_DISPLAY << 16, 1114 .class_mask = 0xff << 16, 1115 }, 1116 {} 1117 }; 1118 1119 static void nouveau_display_options(void) 1120 { 1121 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); 1122 1123 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); 1124 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); 1125 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); 1126 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel); 1127 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); 1128 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); 1129 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); 1130 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); 1131 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); 1132 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); 1133 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz); 1134 } 1135 1136 static const struct dev_pm_ops nouveau_pm_ops = { 1137 .suspend = nouveau_pmops_suspend, 1138 .resume = nouveau_pmops_resume, 1139 .freeze = nouveau_pmops_freeze, 1140 .thaw = nouveau_pmops_thaw, 1141 .poweroff = nouveau_pmops_freeze, 1142 .restore = nouveau_pmops_resume, 1143 .runtime_suspend = nouveau_pmops_runtime_suspend, 1144 .runtime_resume = nouveau_pmops_runtime_resume, 1145 .runtime_idle = nouveau_pmops_runtime_idle, 1146 }; 1147 1148 static struct pci_driver 1149 nouveau_drm_pci_driver = { 1150 .name = "nouveau", 1151 .id_table = nouveau_drm_pci_table, 1152 .probe = nouveau_drm_probe, 1153 .remove = nouveau_drm_remove, 1154 .driver.pm = &nouveau_pm_ops, 1155 }; 1156 1157 struct drm_device * 1158 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, 1159 struct platform_device *pdev, 1160 struct nvkm_device **pdevice) 1161 { 1162 struct drm_device *drm; 1163 int err; 1164 1165 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, 1166 true, true, ~0ULL, pdevice); 1167 if (err) 1168 goto err_free; 1169 1170 drm = drm_dev_alloc(&driver_platform, &pdev->dev); 1171 if (IS_ERR(drm)) { 1172 err = PTR_ERR(drm); 1173 goto err_free; 1174 } 1175 1176 err = nouveau_drm_device_init(drm); 1177 if (err) 1178 goto err_put; 1179 1180 platform_set_drvdata(pdev, drm); 1181 1182 return drm; 1183 1184 err_put: 1185 drm_dev_put(drm); 1186 err_free: 1187 nvkm_device_del(pdevice); 1188 1189 return ERR_PTR(err); 1190 } 1191 1192 static int __init 1193 nouveau_drm_init(void) 1194 { 1195 driver_pci = driver_stub; 1196 driver_platform = driver_stub; 1197 1198 nouveau_display_options(); 1199 1200 if (nouveau_modeset == -1) { 1201 if (vgacon_text_force()) 1202 nouveau_modeset = 0; 1203 } 1204 1205 if (!nouveau_modeset) 1206 return 0; 1207 1208 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1209 platform_driver_register(&nouveau_platform_driver); 1210 #endif 1211 1212 nouveau_register_dsm_handler(); 1213 nouveau_backlight_ctor(); 1214 1215 #ifdef CONFIG_PCI 1216 return pci_register_driver(&nouveau_drm_pci_driver); 1217 #else 1218 return 0; 1219 #endif 1220 } 1221 1222 static void __exit 1223 nouveau_drm_exit(void) 1224 { 1225 if (!nouveau_modeset) 1226 return; 1227 1228 #ifdef CONFIG_PCI 1229 pci_unregister_driver(&nouveau_drm_pci_driver); 1230 #endif 1231 nouveau_backlight_dtor(); 1232 nouveau_unregister_dsm_handler(); 1233 1234 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1235 platform_driver_unregister(&nouveau_platform_driver); 1236 #endif 1237 } 1238 1239 module_init(nouveau_drm_init); 1240 module_exit(nouveau_drm_exit); 1241 1242 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); 1243 MODULE_AUTHOR(DRIVER_AUTHOR); 1244 MODULE_DESCRIPTION(DRIVER_DESC); 1245 MODULE_LICENSE("GPL and additional rights"); 1246