1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 25 #include <linux/aperture.h> 26 #include <linux/delay.h> 27 #include <linux/module.h> 28 #include <linux/pci.h> 29 #include <linux/pm_runtime.h> 30 #include <linux/vga_switcheroo.h> 31 #include <linux/mmu_notifier.h> 32 #include <linux/dynamic_debug.h> 33 34 #include <drm/drm_client_setup.h> 35 #include <drm/drm_drv.h> 36 #include <drm/drm_fbdev_ttm.h> 37 #include <drm/drm_gem_ttm_helper.h> 38 #include <drm/drm_ioctl.h> 39 #include <drm/drm_vblank.h> 40 41 #include <core/gpuobj.h> 42 #include <core/option.h> 43 #include <core/pci.h> 44 #include <core/tegra.h> 45 46 #include <nvif/driver.h> 47 #include <nvif/fifo.h> 48 #include <nvif/push006c.h> 49 #include <nvif/user.h> 50 51 #include <nvif/class.h> 52 #include <nvif/cl0002.h> 53 54 #include "nouveau_drv.h" 55 #include "nouveau_dma.h" 56 #include "nouveau_ttm.h" 57 #include "nouveau_gem.h" 58 #include "nouveau_vga.h" 59 #include "nouveau_led.h" 60 #include "nouveau_hwmon.h" 61 #include "nouveau_acpi.h" 62 #include "nouveau_bios.h" 63 #include "nouveau_ioctl.h" 64 #include "nouveau_abi16.h" 65 #include "nouveau_fence.h" 66 #include "nouveau_debugfs.h" 67 #include "nouveau_connector.h" 68 #include "nouveau_platform.h" 69 #include "nouveau_svm.h" 70 #include "nouveau_dmem.h" 71 #include "nouveau_exec.h" 72 #include "nouveau_uvmm.h" 73 #include "nouveau_sched.h" 74 75 DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0, 76 "DRM_UT_CORE", 77 "DRM_UT_DRIVER", 78 "DRM_UT_KMS", 79 "DRM_UT_PRIME", 80 "DRM_UT_ATOMIC", 81 "DRM_UT_VBL", 82 "DRM_UT_STATE", 83 "DRM_UT_LEASE", 84 "DRM_UT_DP", 85 "DRM_UT_DRMRES"); 86 87 MODULE_PARM_DESC(config, "option string to pass to driver core"); 88 static char *nouveau_config; 89 module_param_named(config, nouveau_config, charp, 0400); 90 91 MODULE_PARM_DESC(debug, "debug string to pass to driver core"); 92 static char *nouveau_debug; 93 module_param_named(debug, nouveau_debug, charp, 0400); 94 95 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); 96 static int nouveau_noaccel = 0; 97 module_param_named(noaccel, nouveau_noaccel, int, 0400); 98 99 MODULE_PARM_DESC(modeset, "enable driver (default: auto, " 100 "0 = disabled, 1 = enabled, 2 = headless)"); 101 int nouveau_modeset = -1; 102 module_param_named(modeset, nouveau_modeset, int, 0400); 103 104 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)"); 105 static int nouveau_atomic = 0; 106 module_param_named(atomic, nouveau_atomic, int, 0400); 107 108 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); 109 static int nouveau_runtime_pm = -1; 110 module_param_named(runpm, nouveau_runtime_pm, int, 0400); 111 112 static struct drm_driver driver_stub; 113 static struct drm_driver driver_pci; 114 static struct drm_driver driver_platform; 115 116 static u64 117 nouveau_pci_name(struct pci_dev *pdev) 118 { 119 u64 name = (u64)pci_domain_nr(pdev->bus) << 32; 120 name |= pdev->bus->number << 16; 121 name |= PCI_SLOT(pdev->devfn) << 8; 122 return name | PCI_FUNC(pdev->devfn); 123 } 124 125 static u64 126 nouveau_platform_name(struct platform_device *platformdev) 127 { 128 return platformdev->id; 129 } 130 131 static u64 132 nouveau_name(struct drm_device *dev) 133 { 134 if (dev_is_pci(dev->dev)) 135 return nouveau_pci_name(to_pci_dev(dev->dev)); 136 else 137 return nouveau_platform_name(to_platform_device(dev->dev)); 138 } 139 140 static inline bool 141 nouveau_cli_work_ready(struct dma_fence *fence) 142 { 143 bool ret = true; 144 145 spin_lock_irq(fence->lock); 146 if (!dma_fence_is_signaled_locked(fence)) 147 ret = false; 148 spin_unlock_irq(fence->lock); 149 150 if (ret == true) 151 dma_fence_put(fence); 152 return ret; 153 } 154 155 static void 156 nouveau_cli_work(struct work_struct *w) 157 { 158 struct nouveau_cli *cli = container_of(w, typeof(*cli), work); 159 struct nouveau_cli_work *work, *wtmp; 160 mutex_lock(&cli->lock); 161 list_for_each_entry_safe(work, wtmp, &cli->worker, head) { 162 if (!work->fence || nouveau_cli_work_ready(work->fence)) { 163 list_del(&work->head); 164 work->func(work); 165 } 166 } 167 mutex_unlock(&cli->lock); 168 } 169 170 static void 171 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb) 172 { 173 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb); 174 schedule_work(&work->cli->work); 175 } 176 177 void 178 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence, 179 struct nouveau_cli_work *work) 180 { 181 work->fence = dma_fence_get(fence); 182 work->cli = cli; 183 mutex_lock(&cli->lock); 184 list_add_tail(&work->head, &cli->worker); 185 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence)) 186 nouveau_cli_work_fence(fence, &work->cb); 187 mutex_unlock(&cli->lock); 188 } 189 190 static void 191 nouveau_cli_fini(struct nouveau_cli *cli) 192 { 193 struct nouveau_uvmm *uvmm = nouveau_cli_uvmm_locked(cli); 194 195 /* All our channels are dead now, which means all the fences they 196 * own are signalled, and all callback functions have been called. 197 * 198 * So, after flushing the workqueue, there should be nothing left. 199 */ 200 flush_work(&cli->work); 201 WARN_ON(!list_empty(&cli->worker)); 202 203 if (cli->sched) 204 nouveau_sched_destroy(&cli->sched); 205 if (uvmm) 206 nouveau_uvmm_fini(uvmm); 207 nouveau_vmm_fini(&cli->svm); 208 nouveau_vmm_fini(&cli->vmm); 209 nvif_mmu_dtor(&cli->mmu); 210 cli->device.object.map.ptr = NULL; 211 nvif_device_dtor(&cli->device); 212 mutex_lock(&cli->drm->client_mutex); 213 nvif_client_dtor(&cli->base); 214 mutex_unlock(&cli->drm->client_mutex); 215 } 216 217 static int 218 nouveau_cli_init(struct nouveau_drm *drm, const char *sname, 219 struct nouveau_cli *cli) 220 { 221 static const struct nvif_mclass 222 mems[] = { 223 { NVIF_CLASS_MEM_GF100, -1 }, 224 { NVIF_CLASS_MEM_NV50 , -1 }, 225 { NVIF_CLASS_MEM_NV04 , -1 }, 226 {} 227 }; 228 static const struct nvif_mclass 229 vmms[] = { 230 { NVIF_CLASS_VMM_GP100, -1 }, 231 { NVIF_CLASS_VMM_GM200, -1 }, 232 { NVIF_CLASS_VMM_GF100, -1 }, 233 { NVIF_CLASS_VMM_NV50 , -1 }, 234 { NVIF_CLASS_VMM_NV04 , -1 }, 235 {} 236 }; 237 int ret; 238 239 snprintf(cli->name, sizeof(cli->name), "%s", sname); 240 cli->drm = drm; 241 mutex_init(&cli->mutex); 242 243 INIT_WORK(&cli->work, nouveau_cli_work); 244 INIT_LIST_HEAD(&cli->worker); 245 mutex_init(&cli->lock); 246 247 mutex_lock(&drm->client_mutex); 248 ret = nvif_client_ctor(&drm->_client, cli->name, &cli->base); 249 mutex_unlock(&drm->client_mutex); 250 if (ret) { 251 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret); 252 goto done; 253 } 254 255 ret = nvif_device_ctor(&cli->base, "drmDevice", &cli->device); 256 if (ret) { 257 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret); 258 goto done; 259 } 260 261 cli->device.object.map.ptr = drm->device.object.map.ptr; 262 263 ret = nvif_mmu_ctor(&cli->device.object, "drmMmu", drm->mmu.object.oclass, 264 &cli->mmu); 265 if (ret) { 266 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret); 267 goto done; 268 } 269 270 ret = nvif_mclass(&cli->mmu.object, vmms); 271 if (ret < 0) { 272 NV_PRINTK(err, cli, "No supported VMM class\n"); 273 goto done; 274 } 275 276 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm); 277 if (ret) { 278 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret); 279 goto done; 280 } 281 282 ret = nvif_mclass(&cli->mmu.object, mems); 283 if (ret < 0) { 284 NV_PRINTK(err, cli, "No supported MEM class\n"); 285 goto done; 286 } 287 288 cli->mem = &mems[ret]; 289 290 /* Don't pass in the (shared) sched_wq in order to let 291 * nouveau_sched_create() create a dedicated one for VM_BIND jobs. 292 * 293 * This is required to ensure that for VM_BIND jobs free_job() work and 294 * run_job() work can always run concurrently and hence, free_job() work 295 * can never stall run_job() work. For EXEC jobs we don't have this 296 * requirement, since EXEC job's free_job() does not require to take any 297 * locks which indirectly or directly are held for allocations 298 * elsewhere. 299 */ 300 ret = nouveau_sched_create(&cli->sched, drm, NULL, 1); 301 if (ret) 302 goto done; 303 304 return 0; 305 done: 306 if (ret) 307 nouveau_cli_fini(cli); 308 return ret; 309 } 310 311 static void 312 nouveau_accel_ce_fini(struct nouveau_drm *drm) 313 { 314 nouveau_channel_idle(drm->cechan); 315 nvif_object_dtor(&drm->ttm.copy); 316 nouveau_channel_del(&drm->cechan); 317 } 318 319 static void 320 nouveau_accel_ce_init(struct nouveau_drm *drm) 321 { 322 struct nvif_device *device = &drm->client.device; 323 u64 runm; 324 int ret = 0; 325 326 /* Allocate channel that has access to a (preferably async) copy 327 * engine, to use for TTM buffer moves. 328 */ 329 runm = nvif_fifo_runlist_ce(device); 330 if (!runm) { 331 NV_DEBUG(drm, "no ce runlist\n"); 332 return; 333 } 334 335 ret = nouveau_channel_new(&drm->client, true, runm, NvDmaFB, NvDmaTT, &drm->cechan); 336 if (ret) 337 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 338 } 339 340 static void 341 nouveau_accel_gr_fini(struct nouveau_drm *drm) 342 { 343 nouveau_channel_idle(drm->channel); 344 nvif_object_dtor(&drm->ntfy); 345 nvkm_gpuobj_del(&drm->notify); 346 nouveau_channel_del(&drm->channel); 347 } 348 349 static void 350 nouveau_accel_gr_init(struct nouveau_drm *drm) 351 { 352 struct nvif_device *device = &drm->client.device; 353 u64 runm; 354 int ret; 355 356 /* Allocate channel that has access to the graphics engine. */ 357 runm = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR); 358 if (!runm) { 359 NV_DEBUG(drm, "no gr runlist\n"); 360 return; 361 } 362 363 ret = nouveau_channel_new(&drm->client, false, runm, NvDmaFB, NvDmaTT, &drm->channel); 364 if (ret) { 365 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); 366 nouveau_accel_gr_fini(drm); 367 return; 368 } 369 370 /* A SW class is used on pre-NV50 HW to assist with handling the 371 * synchronisation of page flips, as well as to implement fences 372 * on TNT/TNT2 HW that lacks any kind of support in host. 373 */ 374 if (!drm->channel->nvsw.client && device->info.family < NV_DEVICE_INFO_V0_TESLA) { 375 ret = nvif_object_ctor(&drm->channel->user, "drmNvsw", 376 NVDRM_NVSW, nouveau_abi16_swclass(drm), 377 NULL, 0, &drm->channel->nvsw); 378 379 if (ret == 0 && device->info.chipset >= 0x11) { 380 ret = nvif_object_ctor(&drm->channel->user, "drmBlit", 381 0x005f, 0x009f, 382 NULL, 0, &drm->channel->blit); 383 } 384 385 if (ret == 0) { 386 struct nvif_push *push = &drm->channel->chan.push; 387 388 ret = PUSH_WAIT(push, 8); 389 if (ret == 0) { 390 if (device->info.chipset >= 0x11) { 391 PUSH_NVSQ(push, NV05F, 0x0000, drm->channel->blit.handle); 392 PUSH_NVSQ(push, NV09F, 0x0120, 0, 393 0x0124, 1, 394 0x0128, 2); 395 } 396 PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle); 397 } 398 } 399 400 if (ret) { 401 NV_ERROR(drm, "failed to allocate sw or blit class, %d\n", ret); 402 nouveau_accel_gr_fini(drm); 403 return; 404 } 405 } 406 407 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason, 408 * even if notification is never requested, so, allocate a ctxdma on 409 * any GPU where it's possible we'll end up using M2MF for BO moves. 410 */ 411 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 412 ret = nvkm_gpuobj_new(nvxx_device(drm), 32, 0, false, NULL, &drm->notify); 413 if (ret) { 414 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); 415 nouveau_accel_gr_fini(drm); 416 return; 417 } 418 419 ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy", 420 NvNotify0, NV_DMA_IN_MEMORY, 421 &(struct nv_dma_v0) { 422 .target = NV_DMA_V0_TARGET_VRAM, 423 .access = NV_DMA_V0_ACCESS_RDWR, 424 .start = drm->notify->addr, 425 .limit = drm->notify->addr + 31 426 }, sizeof(struct nv_dma_v0), 427 &drm->ntfy); 428 if (ret) { 429 nouveau_accel_gr_fini(drm); 430 return; 431 } 432 } 433 } 434 435 static void 436 nouveau_accel_fini(struct nouveau_drm *drm) 437 { 438 nouveau_accel_ce_fini(drm); 439 nouveau_accel_gr_fini(drm); 440 if (drm->fence) 441 nouveau_fence(drm)->dtor(drm); 442 nouveau_channels_fini(drm); 443 } 444 445 static void 446 nouveau_accel_init(struct nouveau_drm *drm) 447 { 448 struct nvif_device *device = &drm->client.device; 449 struct nvif_sclass *sclass; 450 int ret, i, n; 451 452 if (nouveau_noaccel) 453 return; 454 455 /* Initialise global support for channels, and synchronisation. */ 456 ret = nouveau_channels_init(drm); 457 if (ret) 458 return; 459 460 /*XXX: this is crap, but the fence/channel stuff is a little 461 * backwards in some places. this will be fixed. 462 */ 463 ret = n = nvif_object_sclass_get(&device->object, &sclass); 464 if (ret < 0) 465 return; 466 467 for (ret = -ENOSYS, i = 0; i < n; i++) { 468 switch (sclass[i].oclass) { 469 case NV03_CHANNEL_DMA: 470 ret = nv04_fence_create(drm); 471 break; 472 case NV10_CHANNEL_DMA: 473 ret = nv10_fence_create(drm); 474 break; 475 case NV17_CHANNEL_DMA: 476 case NV40_CHANNEL_DMA: 477 ret = nv17_fence_create(drm); 478 break; 479 case NV50_CHANNEL_GPFIFO: 480 ret = nv50_fence_create(drm); 481 break; 482 case G82_CHANNEL_GPFIFO: 483 ret = nv84_fence_create(drm); 484 break; 485 case FERMI_CHANNEL_GPFIFO: 486 case KEPLER_CHANNEL_GPFIFO_A: 487 case KEPLER_CHANNEL_GPFIFO_B: 488 case MAXWELL_CHANNEL_GPFIFO_A: 489 case PASCAL_CHANNEL_GPFIFO_A: 490 case VOLTA_CHANNEL_GPFIFO_A: 491 case TURING_CHANNEL_GPFIFO_A: 492 case AMPERE_CHANNEL_GPFIFO_A: 493 case AMPERE_CHANNEL_GPFIFO_B: 494 ret = nvc0_fence_create(drm); 495 break; 496 default: 497 break; 498 } 499 } 500 501 nvif_object_sclass_put(&sclass); 502 if (ret) { 503 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); 504 nouveau_accel_fini(drm); 505 return; 506 } 507 508 /* Volta requires access to a doorbell register for kickoff. */ 509 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) { 510 ret = nvif_user_ctor(device, "drmUsermode"); 511 if (ret) 512 return; 513 } 514 515 /* Allocate channels we need to support various functions. */ 516 nouveau_accel_gr_init(drm); 517 nouveau_accel_ce_init(drm); 518 519 /* Initialise accelerated TTM buffer moves. */ 520 nouveau_bo_move_init(drm); 521 } 522 523 static void __printf(2, 3) 524 nouveau_drm_errorf(struct nvif_object *object, const char *fmt, ...) 525 { 526 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent); 527 struct va_format vaf; 528 va_list va; 529 530 va_start(va, fmt); 531 vaf.fmt = fmt; 532 vaf.va = &va; 533 NV_ERROR(drm, "%pV", &vaf); 534 va_end(va); 535 } 536 537 static void __printf(2, 3) 538 nouveau_drm_debugf(struct nvif_object *object, const char *fmt, ...) 539 { 540 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent); 541 struct va_format vaf; 542 va_list va; 543 544 va_start(va, fmt); 545 vaf.fmt = fmt; 546 vaf.va = &va; 547 NV_DEBUG(drm, "%pV", &vaf); 548 va_end(va); 549 } 550 551 static const struct nvif_parent_func 552 nouveau_parent = { 553 .debugf = nouveau_drm_debugf, 554 .errorf = nouveau_drm_errorf, 555 }; 556 557 static void 558 nouveau_drm_device_fini(struct nouveau_drm *drm) 559 { 560 struct drm_device *dev = drm->dev; 561 struct nouveau_cli *cli, *temp_cli; 562 563 if (nouveau_pmops_runtime()) { 564 pm_runtime_get_sync(dev->dev); 565 pm_runtime_forbid(dev->dev); 566 } 567 568 nouveau_led_fini(dev); 569 nouveau_dmem_fini(drm); 570 nouveau_svm_fini(drm); 571 nouveau_hwmon_fini(dev); 572 nouveau_debugfs_fini(drm); 573 574 if (dev->mode_config.num_crtc) 575 nouveau_display_fini(dev, false, false); 576 nouveau_display_destroy(dev); 577 578 nouveau_accel_fini(drm); 579 nouveau_bios_takedown(dev); 580 581 nouveau_ttm_fini(drm); 582 nouveau_vga_fini(drm); 583 584 /* 585 * There may be existing clients from as-yet unclosed files. For now, 586 * clean them up here rather than deferring until the file is closed, 587 * but this likely not correct if we want to support hot-unplugging 588 * properly. 589 */ 590 mutex_lock(&drm->clients_lock); 591 list_for_each_entry_safe(cli, temp_cli, &drm->clients, head) { 592 list_del(&cli->head); 593 mutex_lock(&cli->mutex); 594 if (cli->abi16) 595 nouveau_abi16_fini(cli->abi16); 596 mutex_unlock(&cli->mutex); 597 nouveau_cli_fini(cli); 598 kfree(cli); 599 } 600 mutex_unlock(&drm->clients_lock); 601 602 nouveau_cli_fini(&drm->client); 603 destroy_workqueue(drm->sched_wq); 604 mutex_destroy(&drm->clients_lock); 605 } 606 607 static int 608 nouveau_drm_device_init(struct nouveau_drm *drm) 609 { 610 struct drm_device *dev = drm->dev; 611 int ret; 612 613 drm->sched_wq = alloc_workqueue("nouveau_sched_wq_shared", 0, 614 WQ_MAX_ACTIVE); 615 if (!drm->sched_wq) 616 return -ENOMEM; 617 618 ret = nouveau_cli_init(drm, "DRM", &drm->client); 619 if (ret) 620 goto fail_wq; 621 622 INIT_LIST_HEAD(&drm->clients); 623 mutex_init(&drm->clients_lock); 624 spin_lock_init(&drm->tile.lock); 625 626 /* workaround an odd issue on nvc1 by disabling the device's 627 * nosnoop capability. hopefully won't cause issues until a 628 * better fix is found - assuming there is one... 629 */ 630 if (drm->client.device.info.chipset == 0xc1) 631 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000); 632 633 nouveau_vga_init(drm); 634 635 ret = nouveau_ttm_init(drm); 636 if (ret) 637 goto fail_ttm; 638 639 ret = nouveau_bios_init(dev); 640 if (ret) 641 goto fail_bios; 642 643 nouveau_accel_init(drm); 644 645 ret = nouveau_display_create(dev); 646 if (ret) 647 goto fail_dispctor; 648 649 if (dev->mode_config.num_crtc) { 650 ret = nouveau_display_init(dev, false, false); 651 if (ret) 652 goto fail_dispinit; 653 } 654 655 nouveau_debugfs_init(drm); 656 nouveau_hwmon_init(dev); 657 nouveau_svm_init(drm); 658 nouveau_dmem_init(drm); 659 nouveau_led_init(dev); 660 661 if (nouveau_pmops_runtime()) { 662 pm_runtime_use_autosuspend(dev->dev); 663 pm_runtime_set_autosuspend_delay(dev->dev, 5000); 664 pm_runtime_set_active(dev->dev); 665 pm_runtime_allow(dev->dev); 666 pm_runtime_mark_last_busy(dev->dev); 667 pm_runtime_put(dev->dev); 668 } 669 670 ret = drm_dev_register(drm->dev, 0); 671 if (ret) { 672 nouveau_drm_device_fini(drm); 673 return ret; 674 } 675 676 return 0; 677 fail_dispinit: 678 nouveau_display_destroy(dev); 679 fail_dispctor: 680 nouveau_accel_fini(drm); 681 nouveau_bios_takedown(dev); 682 fail_bios: 683 nouveau_ttm_fini(drm); 684 fail_ttm: 685 nouveau_vga_fini(drm); 686 nouveau_cli_fini(&drm->client); 687 fail_wq: 688 destroy_workqueue(drm->sched_wq); 689 return ret; 690 } 691 692 static void 693 nouveau_drm_device_del(struct nouveau_drm *drm) 694 { 695 if (drm->dev) 696 drm_dev_put(drm->dev); 697 698 nvif_mmu_dtor(&drm->mmu); 699 nvif_device_dtor(&drm->device); 700 nvif_client_dtor(&drm->_client); 701 nvif_parent_dtor(&drm->parent); 702 703 mutex_destroy(&drm->client_mutex); 704 kfree(drm); 705 } 706 707 static struct nouveau_drm * 708 nouveau_drm_device_new(const struct drm_driver *drm_driver, struct device *parent, 709 struct nvkm_device *device) 710 { 711 static const struct nvif_mclass 712 mmus[] = { 713 { NVIF_CLASS_MMU_GF100, -1 }, 714 { NVIF_CLASS_MMU_NV50 , -1 }, 715 { NVIF_CLASS_MMU_NV04 , -1 }, 716 {} 717 }; 718 struct nouveau_drm *drm; 719 int ret; 720 721 drm = kzalloc(sizeof(*drm), GFP_KERNEL); 722 if (!drm) 723 return ERR_PTR(-ENOMEM); 724 725 drm->nvkm = device; 726 727 drm->dev = drm_dev_alloc(drm_driver, parent); 728 if (IS_ERR(drm->dev)) { 729 ret = PTR_ERR(drm->dev); 730 goto done; 731 } 732 733 drm->dev->dev_private = drm; 734 dev_set_drvdata(parent, drm); 735 736 nvif_parent_ctor(&nouveau_parent, &drm->parent); 737 mutex_init(&drm->client_mutex); 738 drm->_client.object.parent = &drm->parent; 739 740 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug, "drm", 741 nouveau_name(drm->dev), &drm->_client); 742 if (ret) 743 goto done; 744 745 ret = nvif_device_ctor(&drm->_client, "drmDevice", &drm->device); 746 if (ret) { 747 NV_ERROR(drm, "Device allocation failed: %d\n", ret); 748 goto done; 749 } 750 751 ret = nvif_device_map(&drm->device); 752 if (ret) { 753 NV_ERROR(drm, "Failed to map PRI: %d\n", ret); 754 goto done; 755 } 756 757 ret = nvif_mclass(&drm->device.object, mmus); 758 if (ret < 0) { 759 NV_ERROR(drm, "No supported MMU class\n"); 760 goto done; 761 } 762 763 ret = nvif_mmu_ctor(&drm->device.object, "drmMmu", mmus[ret].oclass, &drm->mmu); 764 if (ret) { 765 NV_ERROR(drm, "MMU allocation failed: %d\n", ret); 766 goto done; 767 } 768 769 done: 770 if (ret) { 771 nouveau_drm_device_del(drm); 772 drm = NULL; 773 } 774 775 return ret ? ERR_PTR(ret) : drm; 776 } 777 778 /* 779 * On some Intel PCIe bridge controllers doing a 780 * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear. 781 * Skipping the intermediate D3hot step seems to make it work again. This is 782 * probably caused by not meeting the expectation the involved AML code has 783 * when the GPU is put into D3hot state before invoking it. 784 * 785 * This leads to various manifestations of this issue: 786 * - AML code execution to power on the GPU hits an infinite loop (as the 787 * code waits on device memory to change). 788 * - kernel crashes, as all PCI reads return -1, which most code isn't able 789 * to handle well enough. 790 * 791 * In all cases dmesg will contain at least one line like this: 792 * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3' 793 * followed by a lot of nouveau timeouts. 794 * 795 * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not 796 * documented PCI config space register 0x248 of the Intel PCIe bridge 797 * controller (0x1901) in order to change the state of the PCIe link between 798 * the PCIe port and the GPU. There are alternative code paths using other 799 * registers, which seem to work fine (executed pre Windows 8): 800 * - 0xbc bit 0x20 (publicly available documentation claims 'reserved') 801 * - 0xb0 bit 0x10 (link disable) 802 * Changing the conditions inside the firmware by poking into the relevant 803 * addresses does resolve the issue, but it seemed to be ACPI private memory 804 * and not any device accessible memory at all, so there is no portable way of 805 * changing the conditions. 806 * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared. 807 * 808 * The only systems where this behavior can be seen are hybrid graphics laptops 809 * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether 810 * this issue only occurs in combination with listed Intel PCIe bridge 811 * controllers and the mentioned GPUs or other devices as well. 812 * 813 * documentation on the PCIe bridge controller can be found in the 814 * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2" 815 * Section "12 PCI Express* Controller (x16) Registers" 816 */ 817 818 static void quirk_broken_nv_runpm(struct pci_dev *pdev) 819 { 820 struct nouveau_drm *drm = pci_get_drvdata(pdev); 821 struct pci_dev *bridge = pci_upstream_bridge(pdev); 822 823 if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL) 824 return; 825 826 switch (bridge->device) { 827 case 0x1901: 828 drm->old_pm_cap = pdev->pm_cap; 829 pdev->pm_cap = 0; 830 NV_INFO(drm, "Disabling PCI power management to avoid bug\n"); 831 break; 832 } 833 } 834 835 static int nouveau_drm_probe(struct pci_dev *pdev, 836 const struct pci_device_id *pent) 837 { 838 struct nvkm_device *device; 839 struct nouveau_drm *drm; 840 const struct drm_format_info *format; 841 int ret; 842 843 if (vga_switcheroo_client_probe_defer(pdev)) 844 return -EPROBE_DEFER; 845 846 /* We need to check that the chipset is supported before booting 847 * fbdev off the hardware, as there's no way to put it back. 848 */ 849 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, &device); 850 if (ret) 851 return ret; 852 853 /* Remove conflicting drivers (vesafb, efifb etc). */ 854 ret = aperture_remove_conflicting_pci_devices(pdev, driver_pci.name); 855 if (ret) 856 return ret; 857 858 pci_set_master(pdev); 859 860 if (nouveau_atomic) 861 driver_pci.driver_features |= DRIVER_ATOMIC; 862 863 drm = nouveau_drm_device_new(&driver_pci, &pdev->dev, device); 864 if (IS_ERR(drm)) { 865 ret = PTR_ERR(drm); 866 goto fail_nvkm; 867 } 868 869 ret = pci_enable_device(pdev); 870 if (ret) 871 goto fail_drm; 872 873 ret = nouveau_drm_device_init(drm); 874 if (ret) 875 goto fail_pci; 876 877 if (drm->client.device.info.ram_size <= 32 * 1024 * 1024) 878 format = drm_format_info(DRM_FORMAT_C8); 879 else 880 format = NULL; 881 882 drm_client_setup(drm->dev, format); 883 884 quirk_broken_nv_runpm(pdev); 885 return 0; 886 887 fail_pci: 888 pci_disable_device(pdev); 889 fail_drm: 890 nouveau_drm_device_del(drm); 891 fail_nvkm: 892 nvkm_device_del(&device); 893 return ret; 894 } 895 896 void 897 nouveau_drm_device_remove(struct nouveau_drm *drm) 898 { 899 struct nvkm_device *device = drm->nvkm; 900 901 drm_dev_unplug(drm->dev); 902 903 nouveau_drm_device_fini(drm); 904 nouveau_drm_device_del(drm); 905 nvkm_device_del(&device); 906 } 907 908 static void 909 nouveau_drm_remove(struct pci_dev *pdev) 910 { 911 struct nouveau_drm *drm = pci_get_drvdata(pdev); 912 913 /* revert our workaround */ 914 if (drm->old_pm_cap) 915 pdev->pm_cap = drm->old_pm_cap; 916 nouveau_drm_device_remove(drm); 917 pci_disable_device(pdev); 918 } 919 920 static int 921 nouveau_do_suspend(struct nouveau_drm *drm, bool runtime) 922 { 923 struct drm_device *dev = drm->dev; 924 struct ttm_resource_manager *man; 925 int ret; 926 927 nouveau_svm_suspend(drm); 928 nouveau_dmem_suspend(drm); 929 nouveau_led_suspend(dev); 930 931 if (dev->mode_config.num_crtc) { 932 NV_DEBUG(drm, "suspending display...\n"); 933 ret = nouveau_display_suspend(dev, runtime); 934 if (ret) 935 return ret; 936 } 937 938 NV_DEBUG(drm, "evicting buffers...\n"); 939 940 man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_VRAM); 941 ttm_resource_manager_evict_all(&drm->ttm.bdev, man); 942 943 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n"); 944 if (drm->cechan) { 945 ret = nouveau_channel_idle(drm->cechan); 946 if (ret) 947 goto fail_display; 948 } 949 950 if (drm->channel) { 951 ret = nouveau_channel_idle(drm->channel); 952 if (ret) 953 goto fail_display; 954 } 955 956 NV_DEBUG(drm, "suspending fence...\n"); 957 if (drm->fence && nouveau_fence(drm)->suspend) { 958 if (!nouveau_fence(drm)->suspend(drm)) { 959 ret = -ENOMEM; 960 goto fail_display; 961 } 962 } 963 964 NV_DEBUG(drm, "suspending object tree...\n"); 965 ret = nvif_client_suspend(&drm->_client); 966 if (ret) 967 goto fail_client; 968 969 return 0; 970 971 fail_client: 972 if (drm->fence && nouveau_fence(drm)->resume) 973 nouveau_fence(drm)->resume(drm); 974 975 fail_display: 976 if (dev->mode_config.num_crtc) { 977 NV_DEBUG(drm, "resuming display...\n"); 978 nouveau_display_resume(dev, runtime); 979 } 980 return ret; 981 } 982 983 static int 984 nouveau_do_resume(struct nouveau_drm *drm, bool runtime) 985 { 986 struct drm_device *dev = drm->dev; 987 int ret = 0; 988 989 NV_DEBUG(drm, "resuming object tree...\n"); 990 ret = nvif_client_resume(&drm->_client); 991 if (ret) { 992 NV_ERROR(drm, "Client resume failed with error: %d\n", ret); 993 return ret; 994 } 995 996 NV_DEBUG(drm, "resuming fence...\n"); 997 if (drm->fence && nouveau_fence(drm)->resume) 998 nouveau_fence(drm)->resume(drm); 999 1000 nouveau_run_vbios_init(dev); 1001 1002 if (dev->mode_config.num_crtc) { 1003 NV_DEBUG(drm, "resuming display...\n"); 1004 nouveau_display_resume(dev, runtime); 1005 } 1006 1007 nouveau_led_resume(dev); 1008 nouveau_dmem_resume(drm); 1009 nouveau_svm_resume(drm); 1010 return 0; 1011 } 1012 1013 int 1014 nouveau_pmops_suspend(struct device *dev) 1015 { 1016 struct pci_dev *pdev = to_pci_dev(dev); 1017 struct nouveau_drm *drm = pci_get_drvdata(pdev); 1018 int ret; 1019 1020 if (drm->dev->switch_power_state == DRM_SWITCH_POWER_OFF || 1021 drm->dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 1022 return 0; 1023 1024 ret = nouveau_do_suspend(drm, false); 1025 if (ret) 1026 return ret; 1027 1028 pci_save_state(pdev); 1029 pci_disable_device(pdev); 1030 pci_set_power_state(pdev, PCI_D3hot); 1031 udelay(200); 1032 return 0; 1033 } 1034 1035 int 1036 nouveau_pmops_resume(struct device *dev) 1037 { 1038 struct pci_dev *pdev = to_pci_dev(dev); 1039 struct nouveau_drm *drm = pci_get_drvdata(pdev); 1040 int ret; 1041 1042 if (drm->dev->switch_power_state == DRM_SWITCH_POWER_OFF || 1043 drm->dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 1044 return 0; 1045 1046 pci_set_power_state(pdev, PCI_D0); 1047 pci_restore_state(pdev); 1048 ret = pci_enable_device(pdev); 1049 if (ret) 1050 return ret; 1051 pci_set_master(pdev); 1052 1053 ret = nouveau_do_resume(drm, false); 1054 1055 /* Monitors may have been connected / disconnected during suspend */ 1056 nouveau_display_hpd_resume(drm); 1057 1058 return ret; 1059 } 1060 1061 static int 1062 nouveau_pmops_freeze(struct device *dev) 1063 { 1064 struct nouveau_drm *drm = dev_get_drvdata(dev); 1065 1066 return nouveau_do_suspend(drm, false); 1067 } 1068 1069 static int 1070 nouveau_pmops_thaw(struct device *dev) 1071 { 1072 struct nouveau_drm *drm = dev_get_drvdata(dev); 1073 1074 return nouveau_do_resume(drm, false); 1075 } 1076 1077 bool 1078 nouveau_pmops_runtime(void) 1079 { 1080 if (nouveau_runtime_pm == -1) 1081 return nouveau_is_optimus() || nouveau_is_v1_dsm(); 1082 return nouveau_runtime_pm == 1; 1083 } 1084 1085 static int 1086 nouveau_pmops_runtime_suspend(struct device *dev) 1087 { 1088 struct pci_dev *pdev = to_pci_dev(dev); 1089 struct nouveau_drm *drm = pci_get_drvdata(pdev); 1090 int ret; 1091 1092 if (!nouveau_pmops_runtime()) { 1093 pm_runtime_forbid(dev); 1094 return -EBUSY; 1095 } 1096 1097 nouveau_switcheroo_optimus_dsm(); 1098 ret = nouveau_do_suspend(drm, true); 1099 pci_save_state(pdev); 1100 pci_disable_device(pdev); 1101 pci_ignore_hotplug(pdev); 1102 pci_set_power_state(pdev, PCI_D3cold); 1103 drm->dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 1104 return ret; 1105 } 1106 1107 static int 1108 nouveau_pmops_runtime_resume(struct device *dev) 1109 { 1110 struct pci_dev *pdev = to_pci_dev(dev); 1111 struct nouveau_drm *drm = pci_get_drvdata(pdev); 1112 struct nvif_device *device = &drm->client.device; 1113 int ret; 1114 1115 if (!nouveau_pmops_runtime()) { 1116 pm_runtime_forbid(dev); 1117 return -EBUSY; 1118 } 1119 1120 pci_set_power_state(pdev, PCI_D0); 1121 pci_restore_state(pdev); 1122 ret = pci_enable_device(pdev); 1123 if (ret) 1124 return ret; 1125 pci_set_master(pdev); 1126 1127 ret = nouveau_do_resume(drm, true); 1128 if (ret) { 1129 NV_ERROR(drm, "resume failed with: %d\n", ret); 1130 return ret; 1131 } 1132 1133 /* do magic */ 1134 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); 1135 drm->dev->switch_power_state = DRM_SWITCH_POWER_ON; 1136 1137 /* Monitors may have been connected / disconnected during suspend */ 1138 nouveau_display_hpd_resume(drm); 1139 1140 return ret; 1141 } 1142 1143 static int 1144 nouveau_pmops_runtime_idle(struct device *dev) 1145 { 1146 if (!nouveau_pmops_runtime()) { 1147 pm_runtime_forbid(dev); 1148 return -EBUSY; 1149 } 1150 1151 pm_runtime_mark_last_busy(dev); 1152 pm_runtime_autosuspend(dev); 1153 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 1154 return 1; 1155 } 1156 1157 static int 1158 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) 1159 { 1160 struct nouveau_drm *drm = nouveau_drm(dev); 1161 struct nouveau_cli *cli; 1162 char name[32], tmpname[TASK_COMM_LEN]; 1163 int ret; 1164 1165 /* need to bring up power immediately if opening device */ 1166 ret = pm_runtime_get_sync(dev->dev); 1167 if (ret < 0 && ret != -EACCES) { 1168 pm_runtime_put_autosuspend(dev->dev); 1169 return ret; 1170 } 1171 1172 get_task_comm(tmpname, current); 1173 rcu_read_lock(); 1174 snprintf(name, sizeof(name), "%s[%d]", 1175 tmpname, pid_nr(rcu_dereference(fpriv->pid))); 1176 rcu_read_unlock(); 1177 1178 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) { 1179 ret = -ENOMEM; 1180 goto done; 1181 } 1182 1183 ret = nouveau_cli_init(drm, name, cli); 1184 if (ret) 1185 goto done; 1186 1187 fpriv->driver_priv = cli; 1188 1189 mutex_lock(&drm->clients_lock); 1190 list_add(&cli->head, &drm->clients); 1191 mutex_unlock(&drm->clients_lock); 1192 1193 done: 1194 if (ret && cli) { 1195 nouveau_cli_fini(cli); 1196 kfree(cli); 1197 } 1198 1199 pm_runtime_mark_last_busy(dev->dev); 1200 pm_runtime_put_autosuspend(dev->dev); 1201 return ret; 1202 } 1203 1204 static void 1205 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) 1206 { 1207 struct nouveau_cli *cli = nouveau_cli(fpriv); 1208 struct nouveau_drm *drm = nouveau_drm(dev); 1209 int dev_index; 1210 1211 /* 1212 * The device is gone, and as it currently stands all clients are 1213 * cleaned up in the removal codepath. In the future this may change 1214 * so that we can support hot-unplugging, but for now we immediately 1215 * return to avoid a double-free situation. 1216 */ 1217 if (!drm_dev_enter(dev, &dev_index)) 1218 return; 1219 1220 pm_runtime_get_sync(dev->dev); 1221 1222 mutex_lock(&cli->mutex); 1223 if (cli->abi16) 1224 nouveau_abi16_fini(cli->abi16); 1225 mutex_unlock(&cli->mutex); 1226 1227 mutex_lock(&drm->clients_lock); 1228 list_del(&cli->head); 1229 mutex_unlock(&drm->clients_lock); 1230 1231 nouveau_cli_fini(cli); 1232 kfree(cli); 1233 pm_runtime_mark_last_busy(dev->dev); 1234 pm_runtime_put_autosuspend(dev->dev); 1235 drm_dev_exit(dev_index); 1236 } 1237 1238 static const struct drm_ioctl_desc 1239 nouveau_ioctls[] = { 1240 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW), 1241 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 1242 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW), 1243 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW), 1244 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW), 1245 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW), 1246 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW), 1247 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW), 1248 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW), 1249 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW), 1250 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW), 1251 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW), 1252 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW), 1253 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW), 1254 DRM_IOCTL_DEF_DRV(NOUVEAU_VM_INIT, nouveau_uvmm_ioctl_vm_init, DRM_RENDER_ALLOW), 1255 DRM_IOCTL_DEF_DRV(NOUVEAU_VM_BIND, nouveau_uvmm_ioctl_vm_bind, DRM_RENDER_ALLOW), 1256 DRM_IOCTL_DEF_DRV(NOUVEAU_EXEC, nouveau_exec_ioctl_exec, DRM_RENDER_ALLOW), 1257 }; 1258 1259 long 1260 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 1261 { 1262 struct drm_file *filp = file->private_data; 1263 struct drm_device *dev = filp->minor->dev; 1264 long ret; 1265 1266 ret = pm_runtime_get_sync(dev->dev); 1267 if (ret < 0 && ret != -EACCES) { 1268 pm_runtime_put_autosuspend(dev->dev); 1269 return ret; 1270 } 1271 1272 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { 1273 case DRM_NOUVEAU_NVIF: 1274 ret = nouveau_abi16_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); 1275 break; 1276 default: 1277 ret = drm_ioctl(file, cmd, arg); 1278 break; 1279 } 1280 1281 pm_runtime_mark_last_busy(dev->dev); 1282 pm_runtime_put_autosuspend(dev->dev); 1283 return ret; 1284 } 1285 1286 static const struct file_operations 1287 nouveau_driver_fops = { 1288 .owner = THIS_MODULE, 1289 .open = drm_open, 1290 .release = drm_release, 1291 .unlocked_ioctl = nouveau_drm_ioctl, 1292 .mmap = drm_gem_mmap, 1293 .poll = drm_poll, 1294 .read = drm_read, 1295 #if defined(CONFIG_COMPAT) 1296 .compat_ioctl = nouveau_compat_ioctl, 1297 #endif 1298 .llseek = noop_llseek, 1299 .fop_flags = FOP_UNSIGNED_OFFSET, 1300 }; 1301 1302 static struct drm_driver 1303 driver_stub = { 1304 .driver_features = DRIVER_GEM | 1305 DRIVER_SYNCOBJ | DRIVER_SYNCOBJ_TIMELINE | 1306 DRIVER_GEM_GPUVA | 1307 DRIVER_MODESET | 1308 DRIVER_RENDER, 1309 .open = nouveau_drm_open, 1310 .postclose = nouveau_drm_postclose, 1311 1312 #if defined(CONFIG_DEBUG_FS) 1313 .debugfs_init = nouveau_drm_debugfs_init, 1314 #endif 1315 1316 .ioctls = nouveau_ioctls, 1317 .num_ioctls = ARRAY_SIZE(nouveau_ioctls), 1318 .fops = &nouveau_driver_fops, 1319 1320 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, 1321 1322 .dumb_create = nouveau_display_dumb_create, 1323 .dumb_map_offset = drm_gem_ttm_dumb_map_offset, 1324 1325 DRM_FBDEV_TTM_DRIVER_OPS, 1326 1327 .name = DRIVER_NAME, 1328 .desc = DRIVER_DESC, 1329 #ifdef GIT_REVISION 1330 .date = GIT_REVISION, 1331 #else 1332 .date = DRIVER_DATE, 1333 #endif 1334 .major = DRIVER_MAJOR, 1335 .minor = DRIVER_MINOR, 1336 .patchlevel = DRIVER_PATCHLEVEL, 1337 }; 1338 1339 static struct pci_device_id 1340 nouveau_drm_pci_table[] = { 1341 { 1342 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), 1343 .class = PCI_BASE_CLASS_DISPLAY << 16, 1344 .class_mask = 0xff << 16, 1345 }, 1346 { 1347 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), 1348 .class = PCI_BASE_CLASS_DISPLAY << 16, 1349 .class_mask = 0xff << 16, 1350 }, 1351 {} 1352 }; 1353 1354 static void nouveau_display_options(void) 1355 { 1356 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); 1357 1358 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); 1359 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); 1360 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); 1361 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); 1362 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); 1363 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); 1364 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); 1365 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); 1366 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); 1367 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz); 1368 } 1369 1370 static const struct dev_pm_ops nouveau_pm_ops = { 1371 .suspend = nouveau_pmops_suspend, 1372 .resume = nouveau_pmops_resume, 1373 .freeze = nouveau_pmops_freeze, 1374 .thaw = nouveau_pmops_thaw, 1375 .poweroff = nouveau_pmops_freeze, 1376 .restore = nouveau_pmops_resume, 1377 .runtime_suspend = nouveau_pmops_runtime_suspend, 1378 .runtime_resume = nouveau_pmops_runtime_resume, 1379 .runtime_idle = nouveau_pmops_runtime_idle, 1380 }; 1381 1382 static struct pci_driver 1383 nouveau_drm_pci_driver = { 1384 .name = "nouveau", 1385 .id_table = nouveau_drm_pci_table, 1386 .probe = nouveau_drm_probe, 1387 .remove = nouveau_drm_remove, 1388 .driver.pm = &nouveau_pm_ops, 1389 }; 1390 1391 struct drm_device * 1392 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, 1393 struct platform_device *pdev, 1394 struct nvkm_device **pdevice) 1395 { 1396 struct nouveau_drm *drm; 1397 int err; 1398 1399 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, pdevice); 1400 if (err) 1401 goto err_free; 1402 1403 drm = nouveau_drm_device_new(&driver_platform, &pdev->dev, *pdevice); 1404 if (IS_ERR(drm)) { 1405 err = PTR_ERR(drm); 1406 goto err_free; 1407 } 1408 1409 err = nouveau_drm_device_init(drm); 1410 if (err) 1411 goto err_put; 1412 1413 return drm->dev; 1414 1415 err_put: 1416 nouveau_drm_device_del(drm); 1417 err_free: 1418 nvkm_device_del(pdevice); 1419 1420 return ERR_PTR(err); 1421 } 1422 1423 static int __init 1424 nouveau_drm_init(void) 1425 { 1426 driver_pci = driver_stub; 1427 driver_platform = driver_stub; 1428 1429 nouveau_display_options(); 1430 1431 if (nouveau_modeset == -1) { 1432 if (drm_firmware_drivers_only()) 1433 nouveau_modeset = 0; 1434 } 1435 1436 if (!nouveau_modeset) 1437 return 0; 1438 1439 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1440 platform_driver_register(&nouveau_platform_driver); 1441 #endif 1442 1443 nouveau_register_dsm_handler(); 1444 nouveau_backlight_ctor(); 1445 1446 #ifdef CONFIG_PCI 1447 return pci_register_driver(&nouveau_drm_pci_driver); 1448 #else 1449 return 0; 1450 #endif 1451 } 1452 1453 static void __exit 1454 nouveau_drm_exit(void) 1455 { 1456 if (!nouveau_modeset) 1457 return; 1458 1459 #ifdef CONFIG_PCI 1460 pci_unregister_driver(&nouveau_drm_pci_driver); 1461 #endif 1462 nouveau_backlight_dtor(); 1463 nouveau_unregister_dsm_handler(); 1464 1465 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1466 platform_driver_unregister(&nouveau_platform_driver); 1467 #endif 1468 if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM)) 1469 mmu_notifier_synchronize(); 1470 } 1471 1472 module_init(nouveau_drm_init); 1473 module_exit(nouveau_drm_exit); 1474 1475 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); 1476 MODULE_AUTHOR(DRIVER_AUTHOR); 1477 MODULE_DESCRIPTION(DRIVER_DESC); 1478 MODULE_LICENSE("GPL and additional rights"); 1479