1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 25 #include <linux/delay.h> 26 #include <linux/module.h> 27 #include <linux/pci.h> 28 #include <linux/pm_runtime.h> 29 #include <linux/vga_switcheroo.h> 30 #include <linux/mmu_notifier.h> 31 #include <linux/dynamic_debug.h> 32 33 #include <drm/drm_aperture.h> 34 #include <drm/drm_drv.h> 35 #include <drm/drm_fbdev_generic.h> 36 #include <drm/drm_gem_ttm_helper.h> 37 #include <drm/drm_ioctl.h> 38 #include <drm/drm_vblank.h> 39 40 #include <core/gpuobj.h> 41 #include <core/option.h> 42 #include <core/pci.h> 43 #include <core/tegra.h> 44 45 #include <nvif/driver.h> 46 #include <nvif/fifo.h> 47 #include <nvif/push006c.h> 48 #include <nvif/user.h> 49 50 #include <nvif/class.h> 51 #include <nvif/cl0002.h> 52 53 #include "nouveau_drv.h" 54 #include "nouveau_dma.h" 55 #include "nouveau_ttm.h" 56 #include "nouveau_gem.h" 57 #include "nouveau_vga.h" 58 #include "nouveau_led.h" 59 #include "nouveau_hwmon.h" 60 #include "nouveau_acpi.h" 61 #include "nouveau_bios.h" 62 #include "nouveau_ioctl.h" 63 #include "nouveau_abi16.h" 64 #include "nouveau_fence.h" 65 #include "nouveau_debugfs.h" 66 #include "nouveau_usif.h" 67 #include "nouveau_connector.h" 68 #include "nouveau_platform.h" 69 #include "nouveau_svm.h" 70 #include "nouveau_dmem.h" 71 #include "nouveau_exec.h" 72 #include "nouveau_uvmm.h" 73 #include "nouveau_sched.h" 74 75 DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0, 76 "DRM_UT_CORE", 77 "DRM_UT_DRIVER", 78 "DRM_UT_KMS", 79 "DRM_UT_PRIME", 80 "DRM_UT_ATOMIC", 81 "DRM_UT_VBL", 82 "DRM_UT_STATE", 83 "DRM_UT_LEASE", 84 "DRM_UT_DP", 85 "DRM_UT_DRMRES"); 86 87 MODULE_PARM_DESC(config, "option string to pass to driver core"); 88 static char *nouveau_config; 89 module_param_named(config, nouveau_config, charp, 0400); 90 91 MODULE_PARM_DESC(debug, "debug string to pass to driver core"); 92 static char *nouveau_debug; 93 module_param_named(debug, nouveau_debug, charp, 0400); 94 95 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); 96 static int nouveau_noaccel = 0; 97 module_param_named(noaccel, nouveau_noaccel, int, 0400); 98 99 MODULE_PARM_DESC(modeset, "enable driver (default: auto, " 100 "0 = disabled, 1 = enabled, 2 = headless)"); 101 int nouveau_modeset = -1; 102 module_param_named(modeset, nouveau_modeset, int, 0400); 103 104 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)"); 105 static int nouveau_atomic = 0; 106 module_param_named(atomic, nouveau_atomic, int, 0400); 107 108 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); 109 static int nouveau_runtime_pm = -1; 110 module_param_named(runpm, nouveau_runtime_pm, int, 0400); 111 112 static struct drm_driver driver_stub; 113 static struct drm_driver driver_pci; 114 static struct drm_driver driver_platform; 115 116 static u64 117 nouveau_pci_name(struct pci_dev *pdev) 118 { 119 u64 name = (u64)pci_domain_nr(pdev->bus) << 32; 120 name |= pdev->bus->number << 16; 121 name |= PCI_SLOT(pdev->devfn) << 8; 122 return name | PCI_FUNC(pdev->devfn); 123 } 124 125 static u64 126 nouveau_platform_name(struct platform_device *platformdev) 127 { 128 return platformdev->id; 129 } 130 131 static u64 132 nouveau_name(struct drm_device *dev) 133 { 134 if (dev_is_pci(dev->dev)) 135 return nouveau_pci_name(to_pci_dev(dev->dev)); 136 else 137 return nouveau_platform_name(to_platform_device(dev->dev)); 138 } 139 140 static inline bool 141 nouveau_cli_work_ready(struct dma_fence *fence) 142 { 143 bool ret = true; 144 145 spin_lock_irq(fence->lock); 146 if (!dma_fence_is_signaled_locked(fence)) 147 ret = false; 148 spin_unlock_irq(fence->lock); 149 150 if (ret == true) 151 dma_fence_put(fence); 152 return ret; 153 } 154 155 static void 156 nouveau_cli_work(struct work_struct *w) 157 { 158 struct nouveau_cli *cli = container_of(w, typeof(*cli), work); 159 struct nouveau_cli_work *work, *wtmp; 160 mutex_lock(&cli->lock); 161 list_for_each_entry_safe(work, wtmp, &cli->worker, head) { 162 if (!work->fence || nouveau_cli_work_ready(work->fence)) { 163 list_del(&work->head); 164 work->func(work); 165 } 166 } 167 mutex_unlock(&cli->lock); 168 } 169 170 static void 171 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb) 172 { 173 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb); 174 schedule_work(&work->cli->work); 175 } 176 177 void 178 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence, 179 struct nouveau_cli_work *work) 180 { 181 work->fence = dma_fence_get(fence); 182 work->cli = cli; 183 mutex_lock(&cli->lock); 184 list_add_tail(&work->head, &cli->worker); 185 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence)) 186 nouveau_cli_work_fence(fence, &work->cb); 187 mutex_unlock(&cli->lock); 188 } 189 190 static void 191 nouveau_cli_fini(struct nouveau_cli *cli) 192 { 193 struct nouveau_uvmm *uvmm = nouveau_cli_uvmm_locked(cli); 194 195 /* All our channels are dead now, which means all the fences they 196 * own are signalled, and all callback functions have been called. 197 * 198 * So, after flushing the workqueue, there should be nothing left. 199 */ 200 flush_work(&cli->work); 201 WARN_ON(!list_empty(&cli->worker)); 202 203 usif_client_fini(cli); 204 if (cli->sched) 205 nouveau_sched_destroy(&cli->sched); 206 if (uvmm) 207 nouveau_uvmm_fini(uvmm); 208 nouveau_vmm_fini(&cli->svm); 209 nouveau_vmm_fini(&cli->vmm); 210 nvif_mmu_dtor(&cli->mmu); 211 nvif_device_dtor(&cli->device); 212 mutex_lock(&cli->drm->master.lock); 213 nvif_client_dtor(&cli->base); 214 mutex_unlock(&cli->drm->master.lock); 215 } 216 217 static int 218 nouveau_cli_init(struct nouveau_drm *drm, const char *sname, 219 struct nouveau_cli *cli) 220 { 221 static const struct nvif_mclass 222 mems[] = { 223 { NVIF_CLASS_MEM_GF100, -1 }, 224 { NVIF_CLASS_MEM_NV50 , -1 }, 225 { NVIF_CLASS_MEM_NV04 , -1 }, 226 {} 227 }; 228 static const struct nvif_mclass 229 mmus[] = { 230 { NVIF_CLASS_MMU_GF100, -1 }, 231 { NVIF_CLASS_MMU_NV50 , -1 }, 232 { NVIF_CLASS_MMU_NV04 , -1 }, 233 {} 234 }; 235 static const struct nvif_mclass 236 vmms[] = { 237 { NVIF_CLASS_VMM_GP100, -1 }, 238 { NVIF_CLASS_VMM_GM200, -1 }, 239 { NVIF_CLASS_VMM_GF100, -1 }, 240 { NVIF_CLASS_VMM_NV50 , -1 }, 241 { NVIF_CLASS_VMM_NV04 , -1 }, 242 {} 243 }; 244 u64 device = nouveau_name(drm->dev); 245 int ret; 246 247 snprintf(cli->name, sizeof(cli->name), "%s", sname); 248 cli->drm = drm; 249 mutex_init(&cli->mutex); 250 usif_client_init(cli); 251 252 INIT_WORK(&cli->work, nouveau_cli_work); 253 INIT_LIST_HEAD(&cli->worker); 254 mutex_init(&cli->lock); 255 256 if (cli == &drm->master) { 257 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug, 258 cli->name, device, &cli->base); 259 } else { 260 mutex_lock(&drm->master.lock); 261 ret = nvif_client_ctor(&drm->master.base, cli->name, device, 262 &cli->base); 263 mutex_unlock(&drm->master.lock); 264 } 265 if (ret) { 266 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret); 267 goto done; 268 } 269 270 ret = nvif_device_ctor(&cli->base.object, "drmDevice", 0, NV_DEVICE, 271 &(struct nv_device_v0) { 272 .device = ~0, 273 .priv = true, 274 }, sizeof(struct nv_device_v0), 275 &cli->device); 276 if (ret) { 277 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret); 278 goto done; 279 } 280 281 ret = nvif_mclass(&cli->device.object, mmus); 282 if (ret < 0) { 283 NV_PRINTK(err, cli, "No supported MMU class\n"); 284 goto done; 285 } 286 287 ret = nvif_mmu_ctor(&cli->device.object, "drmMmu", mmus[ret].oclass, 288 &cli->mmu); 289 if (ret) { 290 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret); 291 goto done; 292 } 293 294 ret = nvif_mclass(&cli->mmu.object, vmms); 295 if (ret < 0) { 296 NV_PRINTK(err, cli, "No supported VMM class\n"); 297 goto done; 298 } 299 300 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm); 301 if (ret) { 302 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret); 303 goto done; 304 } 305 306 ret = nvif_mclass(&cli->mmu.object, mems); 307 if (ret < 0) { 308 NV_PRINTK(err, cli, "No supported MEM class\n"); 309 goto done; 310 } 311 312 cli->mem = &mems[ret]; 313 314 /* Don't pass in the (shared) sched_wq in order to let 315 * nouveau_sched_create() create a dedicated one for VM_BIND jobs. 316 * 317 * This is required to ensure that for VM_BIND jobs free_job() work and 318 * run_job() work can always run concurrently and hence, free_job() work 319 * can never stall run_job() work. For EXEC jobs we don't have this 320 * requirement, since EXEC job's free_job() does not require to take any 321 * locks which indirectly or directly are held for allocations 322 * elsewhere. 323 */ 324 ret = nouveau_sched_create(&cli->sched, drm, NULL, 1); 325 if (ret) 326 goto done; 327 328 return 0; 329 done: 330 if (ret) 331 nouveau_cli_fini(cli); 332 return ret; 333 } 334 335 static void 336 nouveau_accel_ce_fini(struct nouveau_drm *drm) 337 { 338 nouveau_channel_idle(drm->cechan); 339 nvif_object_dtor(&drm->ttm.copy); 340 nouveau_channel_del(&drm->cechan); 341 } 342 343 static void 344 nouveau_accel_ce_init(struct nouveau_drm *drm) 345 { 346 struct nvif_device *device = &drm->client.device; 347 u64 runm; 348 int ret = 0; 349 350 /* Allocate channel that has access to a (preferably async) copy 351 * engine, to use for TTM buffer moves. 352 */ 353 runm = nvif_fifo_runlist_ce(device); 354 if (!runm) { 355 NV_DEBUG(drm, "no ce runlist\n"); 356 return; 357 } 358 359 ret = nouveau_channel_new(drm, device, false, runm, NvDmaFB, NvDmaTT, &drm->cechan); 360 if (ret) 361 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 362 } 363 364 static void 365 nouveau_accel_gr_fini(struct nouveau_drm *drm) 366 { 367 nouveau_channel_idle(drm->channel); 368 nvif_object_dtor(&drm->ntfy); 369 nvkm_gpuobj_del(&drm->notify); 370 nouveau_channel_del(&drm->channel); 371 } 372 373 static void 374 nouveau_accel_gr_init(struct nouveau_drm *drm) 375 { 376 struct nvif_device *device = &drm->client.device; 377 u64 runm; 378 int ret; 379 380 /* Allocate channel that has access to the graphics engine. */ 381 runm = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR); 382 if (!runm) { 383 NV_DEBUG(drm, "no gr runlist\n"); 384 return; 385 } 386 387 ret = nouveau_channel_new(drm, device, false, runm, NvDmaFB, NvDmaTT, &drm->channel); 388 if (ret) { 389 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); 390 nouveau_accel_gr_fini(drm); 391 return; 392 } 393 394 /* A SW class is used on pre-NV50 HW to assist with handling the 395 * synchronisation of page flips, as well as to implement fences 396 * on TNT/TNT2 HW that lacks any kind of support in host. 397 */ 398 if (!drm->channel->nvsw.client && device->info.family < NV_DEVICE_INFO_V0_TESLA) { 399 ret = nvif_object_ctor(&drm->channel->user, "drmNvsw", 400 NVDRM_NVSW, nouveau_abi16_swclass(drm), 401 NULL, 0, &drm->channel->nvsw); 402 403 if (ret == 0 && device->info.chipset >= 0x11) { 404 ret = nvif_object_ctor(&drm->channel->user, "drmBlit", 405 0x005f, 0x009f, 406 NULL, 0, &drm->channel->blit); 407 } 408 409 if (ret == 0) { 410 struct nvif_push *push = drm->channel->chan.push; 411 ret = PUSH_WAIT(push, 8); 412 if (ret == 0) { 413 if (device->info.chipset >= 0x11) { 414 PUSH_NVSQ(push, NV05F, 0x0000, drm->channel->blit.handle); 415 PUSH_NVSQ(push, NV09F, 0x0120, 0, 416 0x0124, 1, 417 0x0128, 2); 418 } 419 PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle); 420 } 421 } 422 423 if (ret) { 424 NV_ERROR(drm, "failed to allocate sw or blit class, %d\n", ret); 425 nouveau_accel_gr_fini(drm); 426 return; 427 } 428 } 429 430 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason, 431 * even if notification is never requested, so, allocate a ctxdma on 432 * any GPU where it's possible we'll end up using M2MF for BO moves. 433 */ 434 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 435 ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL, 436 &drm->notify); 437 if (ret) { 438 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); 439 nouveau_accel_gr_fini(drm); 440 return; 441 } 442 443 ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy", 444 NvNotify0, NV_DMA_IN_MEMORY, 445 &(struct nv_dma_v0) { 446 .target = NV_DMA_V0_TARGET_VRAM, 447 .access = NV_DMA_V0_ACCESS_RDWR, 448 .start = drm->notify->addr, 449 .limit = drm->notify->addr + 31 450 }, sizeof(struct nv_dma_v0), 451 &drm->ntfy); 452 if (ret) { 453 nouveau_accel_gr_fini(drm); 454 return; 455 } 456 } 457 } 458 459 static void 460 nouveau_accel_fini(struct nouveau_drm *drm) 461 { 462 nouveau_accel_ce_fini(drm); 463 nouveau_accel_gr_fini(drm); 464 if (drm->fence) 465 nouveau_fence(drm)->dtor(drm); 466 nouveau_channels_fini(drm); 467 } 468 469 static void 470 nouveau_accel_init(struct nouveau_drm *drm) 471 { 472 struct nvif_device *device = &drm->client.device; 473 struct nvif_sclass *sclass; 474 int ret, i, n; 475 476 if (nouveau_noaccel) 477 return; 478 479 /* Initialise global support for channels, and synchronisation. */ 480 ret = nouveau_channels_init(drm); 481 if (ret) 482 return; 483 484 /*XXX: this is crap, but the fence/channel stuff is a little 485 * backwards in some places. this will be fixed. 486 */ 487 ret = n = nvif_object_sclass_get(&device->object, &sclass); 488 if (ret < 0) 489 return; 490 491 for (ret = -ENOSYS, i = 0; i < n; i++) { 492 switch (sclass[i].oclass) { 493 case NV03_CHANNEL_DMA: 494 ret = nv04_fence_create(drm); 495 break; 496 case NV10_CHANNEL_DMA: 497 ret = nv10_fence_create(drm); 498 break; 499 case NV17_CHANNEL_DMA: 500 case NV40_CHANNEL_DMA: 501 ret = nv17_fence_create(drm); 502 break; 503 case NV50_CHANNEL_GPFIFO: 504 ret = nv50_fence_create(drm); 505 break; 506 case G82_CHANNEL_GPFIFO: 507 ret = nv84_fence_create(drm); 508 break; 509 case FERMI_CHANNEL_GPFIFO: 510 case KEPLER_CHANNEL_GPFIFO_A: 511 case KEPLER_CHANNEL_GPFIFO_B: 512 case MAXWELL_CHANNEL_GPFIFO_A: 513 case PASCAL_CHANNEL_GPFIFO_A: 514 case VOLTA_CHANNEL_GPFIFO_A: 515 case TURING_CHANNEL_GPFIFO_A: 516 case AMPERE_CHANNEL_GPFIFO_A: 517 case AMPERE_CHANNEL_GPFIFO_B: 518 ret = nvc0_fence_create(drm); 519 break; 520 default: 521 break; 522 } 523 } 524 525 nvif_object_sclass_put(&sclass); 526 if (ret) { 527 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); 528 nouveau_accel_fini(drm); 529 return; 530 } 531 532 /* Volta requires access to a doorbell register for kickoff. */ 533 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) { 534 ret = nvif_user_ctor(device, "drmUsermode"); 535 if (ret) 536 return; 537 } 538 539 /* Allocate channels we need to support various functions. */ 540 nouveau_accel_gr_init(drm); 541 nouveau_accel_ce_init(drm); 542 543 /* Initialise accelerated TTM buffer moves. */ 544 nouveau_bo_move_init(drm); 545 } 546 547 static void __printf(2, 3) 548 nouveau_drm_errorf(struct nvif_object *object, const char *fmt, ...) 549 { 550 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent); 551 struct va_format vaf; 552 va_list va; 553 554 va_start(va, fmt); 555 vaf.fmt = fmt; 556 vaf.va = &va; 557 NV_ERROR(drm, "%pV", &vaf); 558 va_end(va); 559 } 560 561 static void __printf(2, 3) 562 nouveau_drm_debugf(struct nvif_object *object, const char *fmt, ...) 563 { 564 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent); 565 struct va_format vaf; 566 va_list va; 567 568 va_start(va, fmt); 569 vaf.fmt = fmt; 570 vaf.va = &va; 571 NV_DEBUG(drm, "%pV", &vaf); 572 va_end(va); 573 } 574 575 static const struct nvif_parent_func 576 nouveau_parent = { 577 .debugf = nouveau_drm_debugf, 578 .errorf = nouveau_drm_errorf, 579 }; 580 581 static int 582 nouveau_drm_device_init(struct drm_device *dev) 583 { 584 struct nouveau_drm *drm; 585 int ret; 586 587 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL))) 588 return -ENOMEM; 589 dev->dev_private = drm; 590 drm->dev = dev; 591 592 nvif_parent_ctor(&nouveau_parent, &drm->parent); 593 drm->master.base.object.parent = &drm->parent; 594 595 drm->sched_wq = alloc_workqueue("nouveau_sched_wq_shared", 0, 596 WQ_MAX_ACTIVE); 597 if (!drm->sched_wq) { 598 ret = -ENOMEM; 599 goto fail_alloc; 600 } 601 602 ret = nouveau_cli_init(drm, "DRM-master", &drm->master); 603 if (ret) 604 goto fail_wq; 605 606 ret = nouveau_cli_init(drm, "DRM", &drm->client); 607 if (ret) 608 goto fail_master; 609 610 nvxx_client(&drm->client.base)->debug = 611 nvkm_dbgopt(nouveau_debug, "DRM"); 612 613 INIT_LIST_HEAD(&drm->clients); 614 mutex_init(&drm->clients_lock); 615 spin_lock_init(&drm->tile.lock); 616 617 /* workaround an odd issue on nvc1 by disabling the device's 618 * nosnoop capability. hopefully won't cause issues until a 619 * better fix is found - assuming there is one... 620 */ 621 if (drm->client.device.info.chipset == 0xc1) 622 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000); 623 624 nouveau_vga_init(drm); 625 626 ret = nouveau_ttm_init(drm); 627 if (ret) 628 goto fail_ttm; 629 630 ret = nouveau_bios_init(dev); 631 if (ret) 632 goto fail_bios; 633 634 nouveau_accel_init(drm); 635 636 ret = nouveau_display_create(dev); 637 if (ret) 638 goto fail_dispctor; 639 640 if (dev->mode_config.num_crtc) { 641 ret = nouveau_display_init(dev, false, false); 642 if (ret) 643 goto fail_dispinit; 644 } 645 646 nouveau_debugfs_init(drm); 647 nouveau_hwmon_init(dev); 648 nouveau_svm_init(drm); 649 nouveau_dmem_init(drm); 650 nouveau_led_init(dev); 651 652 if (nouveau_pmops_runtime()) { 653 pm_runtime_use_autosuspend(dev->dev); 654 pm_runtime_set_autosuspend_delay(dev->dev, 5000); 655 pm_runtime_set_active(dev->dev); 656 pm_runtime_allow(dev->dev); 657 pm_runtime_mark_last_busy(dev->dev); 658 pm_runtime_put(dev->dev); 659 } 660 661 return 0; 662 fail_dispinit: 663 nouveau_display_destroy(dev); 664 fail_dispctor: 665 nouveau_accel_fini(drm); 666 nouveau_bios_takedown(dev); 667 fail_bios: 668 nouveau_ttm_fini(drm); 669 fail_ttm: 670 nouveau_vga_fini(drm); 671 nouveau_cli_fini(&drm->client); 672 fail_master: 673 nouveau_cli_fini(&drm->master); 674 fail_wq: 675 destroy_workqueue(drm->sched_wq); 676 fail_alloc: 677 nvif_parent_dtor(&drm->parent); 678 kfree(drm); 679 return ret; 680 } 681 682 static void 683 nouveau_drm_device_fini(struct drm_device *dev) 684 { 685 struct nouveau_cli *cli, *temp_cli; 686 struct nouveau_drm *drm = nouveau_drm(dev); 687 688 if (nouveau_pmops_runtime()) { 689 pm_runtime_get_sync(dev->dev); 690 pm_runtime_forbid(dev->dev); 691 } 692 693 nouveau_led_fini(dev); 694 nouveau_dmem_fini(drm); 695 nouveau_svm_fini(drm); 696 nouveau_hwmon_fini(dev); 697 nouveau_debugfs_fini(drm); 698 699 if (dev->mode_config.num_crtc) 700 nouveau_display_fini(dev, false, false); 701 nouveau_display_destroy(dev); 702 703 nouveau_accel_fini(drm); 704 nouveau_bios_takedown(dev); 705 706 nouveau_ttm_fini(drm); 707 nouveau_vga_fini(drm); 708 709 /* 710 * There may be existing clients from as-yet unclosed files. For now, 711 * clean them up here rather than deferring until the file is closed, 712 * but this likely not correct if we want to support hot-unplugging 713 * properly. 714 */ 715 mutex_lock(&drm->clients_lock); 716 list_for_each_entry_safe(cli, temp_cli, &drm->clients, head) { 717 list_del(&cli->head); 718 mutex_lock(&cli->mutex); 719 if (cli->abi16) 720 nouveau_abi16_fini(cli->abi16); 721 mutex_unlock(&cli->mutex); 722 nouveau_cli_fini(cli); 723 kfree(cli); 724 } 725 mutex_unlock(&drm->clients_lock); 726 727 nouveau_cli_fini(&drm->client); 728 nouveau_cli_fini(&drm->master); 729 destroy_workqueue(drm->sched_wq); 730 nvif_parent_dtor(&drm->parent); 731 mutex_destroy(&drm->clients_lock); 732 kfree(drm); 733 } 734 735 /* 736 * On some Intel PCIe bridge controllers doing a 737 * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear. 738 * Skipping the intermediate D3hot step seems to make it work again. This is 739 * probably caused by not meeting the expectation the involved AML code has 740 * when the GPU is put into D3hot state before invoking it. 741 * 742 * This leads to various manifestations of this issue: 743 * - AML code execution to power on the GPU hits an infinite loop (as the 744 * code waits on device memory to change). 745 * - kernel crashes, as all PCI reads return -1, which most code isn't able 746 * to handle well enough. 747 * 748 * In all cases dmesg will contain at least one line like this: 749 * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3' 750 * followed by a lot of nouveau timeouts. 751 * 752 * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not 753 * documented PCI config space register 0x248 of the Intel PCIe bridge 754 * controller (0x1901) in order to change the state of the PCIe link between 755 * the PCIe port and the GPU. There are alternative code paths using other 756 * registers, which seem to work fine (executed pre Windows 8): 757 * - 0xbc bit 0x20 (publicly available documentation claims 'reserved') 758 * - 0xb0 bit 0x10 (link disable) 759 * Changing the conditions inside the firmware by poking into the relevant 760 * addresses does resolve the issue, but it seemed to be ACPI private memory 761 * and not any device accessible memory at all, so there is no portable way of 762 * changing the conditions. 763 * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared. 764 * 765 * The only systems where this behavior can be seen are hybrid graphics laptops 766 * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether 767 * this issue only occurs in combination with listed Intel PCIe bridge 768 * controllers and the mentioned GPUs or other devices as well. 769 * 770 * documentation on the PCIe bridge controller can be found in the 771 * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2" 772 * Section "12 PCI Express* Controller (x16) Registers" 773 */ 774 775 static void quirk_broken_nv_runpm(struct pci_dev *pdev) 776 { 777 struct drm_device *dev = pci_get_drvdata(pdev); 778 struct nouveau_drm *drm = nouveau_drm(dev); 779 struct pci_dev *bridge = pci_upstream_bridge(pdev); 780 781 if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL) 782 return; 783 784 switch (bridge->device) { 785 case 0x1901: 786 drm->old_pm_cap = pdev->pm_cap; 787 pdev->pm_cap = 0; 788 NV_INFO(drm, "Disabling PCI power management to avoid bug\n"); 789 break; 790 } 791 } 792 793 static int nouveau_drm_probe(struct pci_dev *pdev, 794 const struct pci_device_id *pent) 795 { 796 struct nvkm_device *device; 797 struct drm_device *drm_dev; 798 int ret; 799 800 if (vga_switcheroo_client_probe_defer(pdev)) 801 return -EPROBE_DEFER; 802 803 /* We need to check that the chipset is supported before booting 804 * fbdev off the hardware, as there's no way to put it back. 805 */ 806 ret = nvkm_device_pci_new(pdev, nouveau_config, "error", 807 true, false, 0, &device); 808 if (ret) 809 return ret; 810 811 nvkm_device_del(&device); 812 813 /* Remove conflicting drivers (vesafb, efifb etc). */ 814 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &driver_pci); 815 if (ret) 816 return ret; 817 818 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, 819 true, true, ~0ULL, &device); 820 if (ret) 821 return ret; 822 823 pci_set_master(pdev); 824 825 if (nouveau_atomic) 826 driver_pci.driver_features |= DRIVER_ATOMIC; 827 828 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev); 829 if (IS_ERR(drm_dev)) { 830 ret = PTR_ERR(drm_dev); 831 goto fail_nvkm; 832 } 833 834 ret = pci_enable_device(pdev); 835 if (ret) 836 goto fail_drm; 837 838 pci_set_drvdata(pdev, drm_dev); 839 840 ret = nouveau_drm_device_init(drm_dev); 841 if (ret) 842 goto fail_pci; 843 844 ret = drm_dev_register(drm_dev, pent->driver_data); 845 if (ret) 846 goto fail_drm_dev_init; 847 848 if (nouveau_drm(drm_dev)->client.device.info.ram_size <= 32 * 1024 * 1024) 849 drm_fbdev_generic_setup(drm_dev, 8); 850 else 851 drm_fbdev_generic_setup(drm_dev, 32); 852 853 quirk_broken_nv_runpm(pdev); 854 return 0; 855 856 fail_drm_dev_init: 857 nouveau_drm_device_fini(drm_dev); 858 fail_pci: 859 pci_disable_device(pdev); 860 fail_drm: 861 drm_dev_put(drm_dev); 862 fail_nvkm: 863 nvkm_device_del(&device); 864 return ret; 865 } 866 867 void 868 nouveau_drm_device_remove(struct drm_device *dev) 869 { 870 struct nouveau_drm *drm = nouveau_drm(dev); 871 struct nvkm_client *client; 872 struct nvkm_device *device; 873 874 drm_dev_unplug(dev); 875 876 client = nvxx_client(&drm->client.base); 877 device = nvkm_device_find(client->device); 878 879 nouveau_drm_device_fini(dev); 880 drm_dev_put(dev); 881 nvkm_device_del(&device); 882 } 883 884 static void 885 nouveau_drm_remove(struct pci_dev *pdev) 886 { 887 struct drm_device *dev = pci_get_drvdata(pdev); 888 struct nouveau_drm *drm = nouveau_drm(dev); 889 890 /* revert our workaround */ 891 if (drm->old_pm_cap) 892 pdev->pm_cap = drm->old_pm_cap; 893 nouveau_drm_device_remove(dev); 894 pci_disable_device(pdev); 895 } 896 897 static int 898 nouveau_do_suspend(struct drm_device *dev, bool runtime) 899 { 900 struct nouveau_drm *drm = nouveau_drm(dev); 901 struct ttm_resource_manager *man; 902 int ret; 903 904 nouveau_svm_suspend(drm); 905 nouveau_dmem_suspend(drm); 906 nouveau_led_suspend(dev); 907 908 if (dev->mode_config.num_crtc) { 909 NV_DEBUG(drm, "suspending display...\n"); 910 ret = nouveau_display_suspend(dev, runtime); 911 if (ret) 912 return ret; 913 } 914 915 NV_DEBUG(drm, "evicting buffers...\n"); 916 917 man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_VRAM); 918 ttm_resource_manager_evict_all(&drm->ttm.bdev, man); 919 920 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n"); 921 if (drm->cechan) { 922 ret = nouveau_channel_idle(drm->cechan); 923 if (ret) 924 goto fail_display; 925 } 926 927 if (drm->channel) { 928 ret = nouveau_channel_idle(drm->channel); 929 if (ret) 930 goto fail_display; 931 } 932 933 NV_DEBUG(drm, "suspending fence...\n"); 934 if (drm->fence && nouveau_fence(drm)->suspend) { 935 if (!nouveau_fence(drm)->suspend(drm)) { 936 ret = -ENOMEM; 937 goto fail_display; 938 } 939 } 940 941 NV_DEBUG(drm, "suspending object tree...\n"); 942 ret = nvif_client_suspend(&drm->master.base); 943 if (ret) 944 goto fail_client; 945 946 return 0; 947 948 fail_client: 949 if (drm->fence && nouveau_fence(drm)->resume) 950 nouveau_fence(drm)->resume(drm); 951 952 fail_display: 953 if (dev->mode_config.num_crtc) { 954 NV_DEBUG(drm, "resuming display...\n"); 955 nouveau_display_resume(dev, runtime); 956 } 957 return ret; 958 } 959 960 static int 961 nouveau_do_resume(struct drm_device *dev, bool runtime) 962 { 963 int ret = 0; 964 struct nouveau_drm *drm = nouveau_drm(dev); 965 966 NV_DEBUG(drm, "resuming object tree...\n"); 967 ret = nvif_client_resume(&drm->master.base); 968 if (ret) { 969 NV_ERROR(drm, "Client resume failed with error: %d\n", ret); 970 return ret; 971 } 972 973 NV_DEBUG(drm, "resuming fence...\n"); 974 if (drm->fence && nouveau_fence(drm)->resume) 975 nouveau_fence(drm)->resume(drm); 976 977 nouveau_run_vbios_init(dev); 978 979 if (dev->mode_config.num_crtc) { 980 NV_DEBUG(drm, "resuming display...\n"); 981 nouveau_display_resume(dev, runtime); 982 } 983 984 nouveau_led_resume(dev); 985 nouveau_dmem_resume(drm); 986 nouveau_svm_resume(drm); 987 return 0; 988 } 989 990 int 991 nouveau_pmops_suspend(struct device *dev) 992 { 993 struct pci_dev *pdev = to_pci_dev(dev); 994 struct drm_device *drm_dev = pci_get_drvdata(pdev); 995 int ret; 996 997 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 998 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 999 return 0; 1000 1001 ret = nouveau_do_suspend(drm_dev, false); 1002 if (ret) 1003 return ret; 1004 1005 pci_save_state(pdev); 1006 pci_disable_device(pdev); 1007 pci_set_power_state(pdev, PCI_D3hot); 1008 udelay(200); 1009 return 0; 1010 } 1011 1012 int 1013 nouveau_pmops_resume(struct device *dev) 1014 { 1015 struct pci_dev *pdev = to_pci_dev(dev); 1016 struct drm_device *drm_dev = pci_get_drvdata(pdev); 1017 int ret; 1018 1019 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 1020 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 1021 return 0; 1022 1023 pci_set_power_state(pdev, PCI_D0); 1024 pci_restore_state(pdev); 1025 ret = pci_enable_device(pdev); 1026 if (ret) 1027 return ret; 1028 pci_set_master(pdev); 1029 1030 ret = nouveau_do_resume(drm_dev, false); 1031 1032 /* Monitors may have been connected / disconnected during suspend */ 1033 nouveau_display_hpd_resume(drm_dev); 1034 1035 return ret; 1036 } 1037 1038 static int 1039 nouveau_pmops_freeze(struct device *dev) 1040 { 1041 struct pci_dev *pdev = to_pci_dev(dev); 1042 struct drm_device *drm_dev = pci_get_drvdata(pdev); 1043 return nouveau_do_suspend(drm_dev, false); 1044 } 1045 1046 static int 1047 nouveau_pmops_thaw(struct device *dev) 1048 { 1049 struct pci_dev *pdev = to_pci_dev(dev); 1050 struct drm_device *drm_dev = pci_get_drvdata(pdev); 1051 return nouveau_do_resume(drm_dev, false); 1052 } 1053 1054 bool 1055 nouveau_pmops_runtime(void) 1056 { 1057 if (nouveau_runtime_pm == -1) 1058 return nouveau_is_optimus() || nouveau_is_v1_dsm(); 1059 return nouveau_runtime_pm == 1; 1060 } 1061 1062 static int 1063 nouveau_pmops_runtime_suspend(struct device *dev) 1064 { 1065 struct pci_dev *pdev = to_pci_dev(dev); 1066 struct drm_device *drm_dev = pci_get_drvdata(pdev); 1067 int ret; 1068 1069 if (!nouveau_pmops_runtime()) { 1070 pm_runtime_forbid(dev); 1071 return -EBUSY; 1072 } 1073 1074 nouveau_switcheroo_optimus_dsm(); 1075 ret = nouveau_do_suspend(drm_dev, true); 1076 pci_save_state(pdev); 1077 pci_disable_device(pdev); 1078 pci_ignore_hotplug(pdev); 1079 pci_set_power_state(pdev, PCI_D3cold); 1080 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 1081 return ret; 1082 } 1083 1084 static int 1085 nouveau_pmops_runtime_resume(struct device *dev) 1086 { 1087 struct pci_dev *pdev = to_pci_dev(dev); 1088 struct drm_device *drm_dev = pci_get_drvdata(pdev); 1089 struct nouveau_drm *drm = nouveau_drm(drm_dev); 1090 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device; 1091 int ret; 1092 1093 if (!nouveau_pmops_runtime()) { 1094 pm_runtime_forbid(dev); 1095 return -EBUSY; 1096 } 1097 1098 pci_set_power_state(pdev, PCI_D0); 1099 pci_restore_state(pdev); 1100 ret = pci_enable_device(pdev); 1101 if (ret) 1102 return ret; 1103 pci_set_master(pdev); 1104 1105 ret = nouveau_do_resume(drm_dev, true); 1106 if (ret) { 1107 NV_ERROR(drm, "resume failed with: %d\n", ret); 1108 return ret; 1109 } 1110 1111 /* do magic */ 1112 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); 1113 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 1114 1115 /* Monitors may have been connected / disconnected during suspend */ 1116 nouveau_display_hpd_resume(drm_dev); 1117 1118 return ret; 1119 } 1120 1121 static int 1122 nouveau_pmops_runtime_idle(struct device *dev) 1123 { 1124 if (!nouveau_pmops_runtime()) { 1125 pm_runtime_forbid(dev); 1126 return -EBUSY; 1127 } 1128 1129 pm_runtime_mark_last_busy(dev); 1130 pm_runtime_autosuspend(dev); 1131 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 1132 return 1; 1133 } 1134 1135 static int 1136 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) 1137 { 1138 struct nouveau_drm *drm = nouveau_drm(dev); 1139 struct nouveau_cli *cli; 1140 char name[32], tmpname[TASK_COMM_LEN]; 1141 int ret; 1142 1143 /* need to bring up power immediately if opening device */ 1144 ret = pm_runtime_get_sync(dev->dev); 1145 if (ret < 0 && ret != -EACCES) { 1146 pm_runtime_put_autosuspend(dev->dev); 1147 return ret; 1148 } 1149 1150 get_task_comm(tmpname, current); 1151 rcu_read_lock(); 1152 snprintf(name, sizeof(name), "%s[%d]", 1153 tmpname, pid_nr(rcu_dereference(fpriv->pid))); 1154 rcu_read_unlock(); 1155 1156 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) { 1157 ret = -ENOMEM; 1158 goto done; 1159 } 1160 1161 ret = nouveau_cli_init(drm, name, cli); 1162 if (ret) 1163 goto done; 1164 1165 fpriv->driver_priv = cli; 1166 1167 mutex_lock(&drm->clients_lock); 1168 list_add(&cli->head, &drm->clients); 1169 mutex_unlock(&drm->clients_lock); 1170 1171 done: 1172 if (ret && cli) { 1173 nouveau_cli_fini(cli); 1174 kfree(cli); 1175 } 1176 1177 pm_runtime_mark_last_busy(dev->dev); 1178 pm_runtime_put_autosuspend(dev->dev); 1179 return ret; 1180 } 1181 1182 static void 1183 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) 1184 { 1185 struct nouveau_cli *cli = nouveau_cli(fpriv); 1186 struct nouveau_drm *drm = nouveau_drm(dev); 1187 int dev_index; 1188 1189 /* 1190 * The device is gone, and as it currently stands all clients are 1191 * cleaned up in the removal codepath. In the future this may change 1192 * so that we can support hot-unplugging, but for now we immediately 1193 * return to avoid a double-free situation. 1194 */ 1195 if (!drm_dev_enter(dev, &dev_index)) 1196 return; 1197 1198 pm_runtime_get_sync(dev->dev); 1199 1200 mutex_lock(&cli->mutex); 1201 if (cli->abi16) 1202 nouveau_abi16_fini(cli->abi16); 1203 mutex_unlock(&cli->mutex); 1204 1205 mutex_lock(&drm->clients_lock); 1206 list_del(&cli->head); 1207 mutex_unlock(&drm->clients_lock); 1208 1209 nouveau_cli_fini(cli); 1210 kfree(cli); 1211 pm_runtime_mark_last_busy(dev->dev); 1212 pm_runtime_put_autosuspend(dev->dev); 1213 drm_dev_exit(dev_index); 1214 } 1215 1216 static const struct drm_ioctl_desc 1217 nouveau_ioctls[] = { 1218 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW), 1219 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 1220 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW), 1221 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW), 1222 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW), 1223 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW), 1224 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW), 1225 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW), 1226 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW), 1227 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW), 1228 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW), 1229 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW), 1230 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW), 1231 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW), 1232 DRM_IOCTL_DEF_DRV(NOUVEAU_VM_INIT, nouveau_uvmm_ioctl_vm_init, DRM_RENDER_ALLOW), 1233 DRM_IOCTL_DEF_DRV(NOUVEAU_VM_BIND, nouveau_uvmm_ioctl_vm_bind, DRM_RENDER_ALLOW), 1234 DRM_IOCTL_DEF_DRV(NOUVEAU_EXEC, nouveau_exec_ioctl_exec, DRM_RENDER_ALLOW), 1235 }; 1236 1237 long 1238 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 1239 { 1240 struct drm_file *filp = file->private_data; 1241 struct drm_device *dev = filp->minor->dev; 1242 long ret; 1243 1244 ret = pm_runtime_get_sync(dev->dev); 1245 if (ret < 0 && ret != -EACCES) { 1246 pm_runtime_put_autosuspend(dev->dev); 1247 return ret; 1248 } 1249 1250 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { 1251 case DRM_NOUVEAU_NVIF: 1252 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); 1253 break; 1254 default: 1255 ret = drm_ioctl(file, cmd, arg); 1256 break; 1257 } 1258 1259 pm_runtime_mark_last_busy(dev->dev); 1260 pm_runtime_put_autosuspend(dev->dev); 1261 return ret; 1262 } 1263 1264 static const struct file_operations 1265 nouveau_driver_fops = { 1266 .owner = THIS_MODULE, 1267 .open = drm_open, 1268 .release = drm_release, 1269 .unlocked_ioctl = nouveau_drm_ioctl, 1270 .mmap = drm_gem_mmap, 1271 .poll = drm_poll, 1272 .read = drm_read, 1273 #if defined(CONFIG_COMPAT) 1274 .compat_ioctl = nouveau_compat_ioctl, 1275 #endif 1276 .llseek = noop_llseek, 1277 }; 1278 1279 static struct drm_driver 1280 driver_stub = { 1281 .driver_features = DRIVER_GEM | 1282 DRIVER_SYNCOBJ | DRIVER_SYNCOBJ_TIMELINE | 1283 DRIVER_GEM_GPUVA | 1284 DRIVER_MODESET | 1285 DRIVER_RENDER, 1286 .open = nouveau_drm_open, 1287 .postclose = nouveau_drm_postclose, 1288 .lastclose = nouveau_vga_lastclose, 1289 1290 #if defined(CONFIG_DEBUG_FS) 1291 .debugfs_init = nouveau_drm_debugfs_init, 1292 #endif 1293 1294 .ioctls = nouveau_ioctls, 1295 .num_ioctls = ARRAY_SIZE(nouveau_ioctls), 1296 .fops = &nouveau_driver_fops, 1297 1298 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, 1299 1300 .dumb_create = nouveau_display_dumb_create, 1301 .dumb_map_offset = drm_gem_ttm_dumb_map_offset, 1302 1303 .name = DRIVER_NAME, 1304 .desc = DRIVER_DESC, 1305 #ifdef GIT_REVISION 1306 .date = GIT_REVISION, 1307 #else 1308 .date = DRIVER_DATE, 1309 #endif 1310 .major = DRIVER_MAJOR, 1311 .minor = DRIVER_MINOR, 1312 .patchlevel = DRIVER_PATCHLEVEL, 1313 }; 1314 1315 static struct pci_device_id 1316 nouveau_drm_pci_table[] = { 1317 { 1318 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), 1319 .class = PCI_BASE_CLASS_DISPLAY << 16, 1320 .class_mask = 0xff << 16, 1321 }, 1322 { 1323 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), 1324 .class = PCI_BASE_CLASS_DISPLAY << 16, 1325 .class_mask = 0xff << 16, 1326 }, 1327 {} 1328 }; 1329 1330 static void nouveau_display_options(void) 1331 { 1332 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); 1333 1334 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); 1335 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); 1336 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); 1337 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); 1338 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); 1339 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); 1340 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); 1341 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); 1342 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); 1343 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz); 1344 } 1345 1346 static const struct dev_pm_ops nouveau_pm_ops = { 1347 .suspend = nouveau_pmops_suspend, 1348 .resume = nouveau_pmops_resume, 1349 .freeze = nouveau_pmops_freeze, 1350 .thaw = nouveau_pmops_thaw, 1351 .poweroff = nouveau_pmops_freeze, 1352 .restore = nouveau_pmops_resume, 1353 .runtime_suspend = nouveau_pmops_runtime_suspend, 1354 .runtime_resume = nouveau_pmops_runtime_resume, 1355 .runtime_idle = nouveau_pmops_runtime_idle, 1356 }; 1357 1358 static struct pci_driver 1359 nouveau_drm_pci_driver = { 1360 .name = "nouveau", 1361 .id_table = nouveau_drm_pci_table, 1362 .probe = nouveau_drm_probe, 1363 .remove = nouveau_drm_remove, 1364 .driver.pm = &nouveau_pm_ops, 1365 }; 1366 1367 struct drm_device * 1368 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, 1369 struct platform_device *pdev, 1370 struct nvkm_device **pdevice) 1371 { 1372 struct drm_device *drm; 1373 int err; 1374 1375 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, 1376 true, true, ~0ULL, pdevice); 1377 if (err) 1378 goto err_free; 1379 1380 drm = drm_dev_alloc(&driver_platform, &pdev->dev); 1381 if (IS_ERR(drm)) { 1382 err = PTR_ERR(drm); 1383 goto err_free; 1384 } 1385 1386 err = nouveau_drm_device_init(drm); 1387 if (err) 1388 goto err_put; 1389 1390 platform_set_drvdata(pdev, drm); 1391 1392 return drm; 1393 1394 err_put: 1395 drm_dev_put(drm); 1396 err_free: 1397 nvkm_device_del(pdevice); 1398 1399 return ERR_PTR(err); 1400 } 1401 1402 static int __init 1403 nouveau_drm_init(void) 1404 { 1405 driver_pci = driver_stub; 1406 driver_platform = driver_stub; 1407 1408 nouveau_display_options(); 1409 1410 if (nouveau_modeset == -1) { 1411 if (drm_firmware_drivers_only()) 1412 nouveau_modeset = 0; 1413 } 1414 1415 if (!nouveau_modeset) 1416 return 0; 1417 1418 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1419 platform_driver_register(&nouveau_platform_driver); 1420 #endif 1421 1422 nouveau_register_dsm_handler(); 1423 nouveau_backlight_ctor(); 1424 1425 #ifdef CONFIG_PCI 1426 return pci_register_driver(&nouveau_drm_pci_driver); 1427 #else 1428 return 0; 1429 #endif 1430 } 1431 1432 static void __exit 1433 nouveau_drm_exit(void) 1434 { 1435 if (!nouveau_modeset) 1436 return; 1437 1438 #ifdef CONFIG_PCI 1439 pci_unregister_driver(&nouveau_drm_pci_driver); 1440 #endif 1441 nouveau_backlight_dtor(); 1442 nouveau_unregister_dsm_handler(); 1443 1444 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1445 platform_driver_unregister(&nouveau_platform_driver); 1446 #endif 1447 if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM)) 1448 mmu_notifier_synchronize(); 1449 } 1450 1451 module_init(nouveau_drm_init); 1452 module_exit(nouveau_drm_exit); 1453 1454 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); 1455 MODULE_AUTHOR(DRIVER_AUTHOR); 1456 MODULE_DESCRIPTION(DRIVER_DESC); 1457 MODULE_LICENSE("GPL and additional rights"); 1458