1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 25 #include <linux/delay.h> 26 #include <linux/module.h> 27 #include <linux/pci.h> 28 #include <linux/pm_runtime.h> 29 #include <linux/vga_switcheroo.h> 30 #include <linux/mmu_notifier.h> 31 #include <linux/dynamic_debug.h> 32 33 #include <drm/drm_aperture.h> 34 #include <drm/drm_drv.h> 35 #include <drm/drm_fbdev_generic.h> 36 #include <drm/drm_gem_ttm_helper.h> 37 #include <drm/drm_ioctl.h> 38 #include <drm/drm_vblank.h> 39 40 #include <core/gpuobj.h> 41 #include <core/option.h> 42 #include <core/pci.h> 43 #include <core/tegra.h> 44 45 #include <nvif/driver.h> 46 #include <nvif/fifo.h> 47 #include <nvif/push006c.h> 48 #include <nvif/user.h> 49 50 #include <nvif/class.h> 51 #include <nvif/cl0002.h> 52 53 #include "nouveau_drv.h" 54 #include "nouveau_dma.h" 55 #include "nouveau_ttm.h" 56 #include "nouveau_gem.h" 57 #include "nouveau_vga.h" 58 #include "nouveau_led.h" 59 #include "nouveau_hwmon.h" 60 #include "nouveau_acpi.h" 61 #include "nouveau_bios.h" 62 #include "nouveau_ioctl.h" 63 #include "nouveau_abi16.h" 64 #include "nouveau_fence.h" 65 #include "nouveau_debugfs.h" 66 #include "nouveau_usif.h" 67 #include "nouveau_connector.h" 68 #include "nouveau_platform.h" 69 #include "nouveau_svm.h" 70 #include "nouveau_dmem.h" 71 72 DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0, 73 "DRM_UT_CORE", 74 "DRM_UT_DRIVER", 75 "DRM_UT_KMS", 76 "DRM_UT_PRIME", 77 "DRM_UT_ATOMIC", 78 "DRM_UT_VBL", 79 "DRM_UT_STATE", 80 "DRM_UT_LEASE", 81 "DRM_UT_DP", 82 "DRM_UT_DRMRES"); 83 84 MODULE_PARM_DESC(config, "option string to pass to driver core"); 85 static char *nouveau_config; 86 module_param_named(config, nouveau_config, charp, 0400); 87 88 MODULE_PARM_DESC(debug, "debug string to pass to driver core"); 89 static char *nouveau_debug; 90 module_param_named(debug, nouveau_debug, charp, 0400); 91 92 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); 93 static int nouveau_noaccel = 0; 94 module_param_named(noaccel, nouveau_noaccel, int, 0400); 95 96 MODULE_PARM_DESC(modeset, "enable driver (default: auto, " 97 "0 = disabled, 1 = enabled, 2 = headless)"); 98 int nouveau_modeset = -1; 99 module_param_named(modeset, nouveau_modeset, int, 0400); 100 101 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)"); 102 static int nouveau_atomic = 0; 103 module_param_named(atomic, nouveau_atomic, int, 0400); 104 105 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); 106 static int nouveau_runtime_pm = -1; 107 module_param_named(runpm, nouveau_runtime_pm, int, 0400); 108 109 static struct drm_driver driver_stub; 110 static struct drm_driver driver_pci; 111 static struct drm_driver driver_platform; 112 113 static u64 114 nouveau_pci_name(struct pci_dev *pdev) 115 { 116 u64 name = (u64)pci_domain_nr(pdev->bus) << 32; 117 name |= pdev->bus->number << 16; 118 name |= PCI_SLOT(pdev->devfn) << 8; 119 return name | PCI_FUNC(pdev->devfn); 120 } 121 122 static u64 123 nouveau_platform_name(struct platform_device *platformdev) 124 { 125 return platformdev->id; 126 } 127 128 static u64 129 nouveau_name(struct drm_device *dev) 130 { 131 if (dev_is_pci(dev->dev)) 132 return nouveau_pci_name(to_pci_dev(dev->dev)); 133 else 134 return nouveau_platform_name(to_platform_device(dev->dev)); 135 } 136 137 static inline bool 138 nouveau_cli_work_ready(struct dma_fence *fence) 139 { 140 if (!dma_fence_is_signaled(fence)) 141 return false; 142 dma_fence_put(fence); 143 return true; 144 } 145 146 static void 147 nouveau_cli_work(struct work_struct *w) 148 { 149 struct nouveau_cli *cli = container_of(w, typeof(*cli), work); 150 struct nouveau_cli_work *work, *wtmp; 151 mutex_lock(&cli->lock); 152 list_for_each_entry_safe(work, wtmp, &cli->worker, head) { 153 if (!work->fence || nouveau_cli_work_ready(work->fence)) { 154 list_del(&work->head); 155 work->func(work); 156 } 157 } 158 mutex_unlock(&cli->lock); 159 } 160 161 static void 162 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb) 163 { 164 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb); 165 schedule_work(&work->cli->work); 166 } 167 168 void 169 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence, 170 struct nouveau_cli_work *work) 171 { 172 work->fence = dma_fence_get(fence); 173 work->cli = cli; 174 mutex_lock(&cli->lock); 175 list_add_tail(&work->head, &cli->worker); 176 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence)) 177 nouveau_cli_work_fence(fence, &work->cb); 178 mutex_unlock(&cli->lock); 179 } 180 181 static void 182 nouveau_cli_fini(struct nouveau_cli *cli) 183 { 184 /* All our channels are dead now, which means all the fences they 185 * own are signalled, and all callback functions have been called. 186 * 187 * So, after flushing the workqueue, there should be nothing left. 188 */ 189 flush_work(&cli->work); 190 WARN_ON(!list_empty(&cli->worker)); 191 192 usif_client_fini(cli); 193 nouveau_vmm_fini(&cli->svm); 194 nouveau_vmm_fini(&cli->vmm); 195 nvif_mmu_dtor(&cli->mmu); 196 nvif_device_dtor(&cli->device); 197 mutex_lock(&cli->drm->master.lock); 198 nvif_client_dtor(&cli->base); 199 mutex_unlock(&cli->drm->master.lock); 200 } 201 202 static int 203 nouveau_cli_init(struct nouveau_drm *drm, const char *sname, 204 struct nouveau_cli *cli) 205 { 206 static const struct nvif_mclass 207 mems[] = { 208 { NVIF_CLASS_MEM_GF100, -1 }, 209 { NVIF_CLASS_MEM_NV50 , -1 }, 210 { NVIF_CLASS_MEM_NV04 , -1 }, 211 {} 212 }; 213 static const struct nvif_mclass 214 mmus[] = { 215 { NVIF_CLASS_MMU_GF100, -1 }, 216 { NVIF_CLASS_MMU_NV50 , -1 }, 217 { NVIF_CLASS_MMU_NV04 , -1 }, 218 {} 219 }; 220 static const struct nvif_mclass 221 vmms[] = { 222 { NVIF_CLASS_VMM_GP100, -1 }, 223 { NVIF_CLASS_VMM_GM200, -1 }, 224 { NVIF_CLASS_VMM_GF100, -1 }, 225 { NVIF_CLASS_VMM_NV50 , -1 }, 226 { NVIF_CLASS_VMM_NV04 , -1 }, 227 {} 228 }; 229 u64 device = nouveau_name(drm->dev); 230 int ret; 231 232 snprintf(cli->name, sizeof(cli->name), "%s", sname); 233 cli->drm = drm; 234 mutex_init(&cli->mutex); 235 usif_client_init(cli); 236 237 INIT_WORK(&cli->work, nouveau_cli_work); 238 INIT_LIST_HEAD(&cli->worker); 239 mutex_init(&cli->lock); 240 241 if (cli == &drm->master) { 242 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug, 243 cli->name, device, &cli->base); 244 } else { 245 mutex_lock(&drm->master.lock); 246 ret = nvif_client_ctor(&drm->master.base, cli->name, device, 247 &cli->base); 248 mutex_unlock(&drm->master.lock); 249 } 250 if (ret) { 251 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret); 252 goto done; 253 } 254 255 ret = nvif_device_ctor(&cli->base.object, "drmDevice", 0, NV_DEVICE, 256 &(struct nv_device_v0) { 257 .device = ~0, 258 .priv = true, 259 }, sizeof(struct nv_device_v0), 260 &cli->device); 261 if (ret) { 262 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret); 263 goto done; 264 } 265 266 ret = nvif_mclass(&cli->device.object, mmus); 267 if (ret < 0) { 268 NV_PRINTK(err, cli, "No supported MMU class\n"); 269 goto done; 270 } 271 272 ret = nvif_mmu_ctor(&cli->device.object, "drmMmu", mmus[ret].oclass, 273 &cli->mmu); 274 if (ret) { 275 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret); 276 goto done; 277 } 278 279 ret = nvif_mclass(&cli->mmu.object, vmms); 280 if (ret < 0) { 281 NV_PRINTK(err, cli, "No supported VMM class\n"); 282 goto done; 283 } 284 285 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm); 286 if (ret) { 287 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret); 288 goto done; 289 } 290 291 ret = nvif_mclass(&cli->mmu.object, mems); 292 if (ret < 0) { 293 NV_PRINTK(err, cli, "No supported MEM class\n"); 294 goto done; 295 } 296 297 cli->mem = &mems[ret]; 298 return 0; 299 done: 300 if (ret) 301 nouveau_cli_fini(cli); 302 return ret; 303 } 304 305 static void 306 nouveau_accel_ce_fini(struct nouveau_drm *drm) 307 { 308 nouveau_channel_idle(drm->cechan); 309 nvif_object_dtor(&drm->ttm.copy); 310 nouveau_channel_del(&drm->cechan); 311 } 312 313 static void 314 nouveau_accel_ce_init(struct nouveau_drm *drm) 315 { 316 struct nvif_device *device = &drm->client.device; 317 u64 runm; 318 int ret = 0; 319 320 /* Allocate channel that has access to a (preferably async) copy 321 * engine, to use for TTM buffer moves. 322 */ 323 runm = nvif_fifo_runlist_ce(device); 324 if (!runm) { 325 NV_DEBUG(drm, "no ce runlist\n"); 326 return; 327 } 328 329 ret = nouveau_channel_new(drm, device, false, runm, NvDmaFB, NvDmaTT, &drm->cechan); 330 if (ret) 331 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 332 } 333 334 static void 335 nouveau_accel_gr_fini(struct nouveau_drm *drm) 336 { 337 nouveau_channel_idle(drm->channel); 338 nvif_object_dtor(&drm->ntfy); 339 nvkm_gpuobj_del(&drm->notify); 340 nouveau_channel_del(&drm->channel); 341 } 342 343 static void 344 nouveau_accel_gr_init(struct nouveau_drm *drm) 345 { 346 struct nvif_device *device = &drm->client.device; 347 u64 runm; 348 int ret; 349 350 /* Allocate channel that has access to the graphics engine. */ 351 runm = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR); 352 if (!runm) { 353 NV_DEBUG(drm, "no gr runlist\n"); 354 return; 355 } 356 357 ret = nouveau_channel_new(drm, device, false, runm, NvDmaFB, NvDmaTT, &drm->channel); 358 if (ret) { 359 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); 360 nouveau_accel_gr_fini(drm); 361 return; 362 } 363 364 /* A SW class is used on pre-NV50 HW to assist with handling the 365 * synchronisation of page flips, as well as to implement fences 366 * on TNT/TNT2 HW that lacks any kind of support in host. 367 */ 368 if (!drm->channel->nvsw.client && device->info.family < NV_DEVICE_INFO_V0_TESLA) { 369 ret = nvif_object_ctor(&drm->channel->user, "drmNvsw", 370 NVDRM_NVSW, nouveau_abi16_swclass(drm), 371 NULL, 0, &drm->channel->nvsw); 372 if (ret == 0) { 373 struct nvif_push *push = drm->channel->chan.push; 374 ret = PUSH_WAIT(push, 2); 375 if (ret == 0) 376 PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle); 377 } 378 379 if (ret) { 380 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret); 381 nouveau_accel_gr_fini(drm); 382 return; 383 } 384 } 385 386 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason, 387 * even if notification is never requested, so, allocate a ctxdma on 388 * any GPU where it's possible we'll end up using M2MF for BO moves. 389 */ 390 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 391 ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL, 392 &drm->notify); 393 if (ret) { 394 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); 395 nouveau_accel_gr_fini(drm); 396 return; 397 } 398 399 ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy", 400 NvNotify0, NV_DMA_IN_MEMORY, 401 &(struct nv_dma_v0) { 402 .target = NV_DMA_V0_TARGET_VRAM, 403 .access = NV_DMA_V0_ACCESS_RDWR, 404 .start = drm->notify->addr, 405 .limit = drm->notify->addr + 31 406 }, sizeof(struct nv_dma_v0), 407 &drm->ntfy); 408 if (ret) { 409 nouveau_accel_gr_fini(drm); 410 return; 411 } 412 } 413 } 414 415 static void 416 nouveau_accel_fini(struct nouveau_drm *drm) 417 { 418 nouveau_accel_ce_fini(drm); 419 nouveau_accel_gr_fini(drm); 420 if (drm->fence) 421 nouveau_fence(drm)->dtor(drm); 422 nouveau_channels_fini(drm); 423 } 424 425 static void 426 nouveau_accel_init(struct nouveau_drm *drm) 427 { 428 struct nvif_device *device = &drm->client.device; 429 struct nvif_sclass *sclass; 430 int ret, i, n; 431 432 if (nouveau_noaccel) 433 return; 434 435 /* Initialise global support for channels, and synchronisation. */ 436 ret = nouveau_channels_init(drm); 437 if (ret) 438 return; 439 440 /*XXX: this is crap, but the fence/channel stuff is a little 441 * backwards in some places. this will be fixed. 442 */ 443 ret = n = nvif_object_sclass_get(&device->object, &sclass); 444 if (ret < 0) 445 return; 446 447 for (ret = -ENOSYS, i = 0; i < n; i++) { 448 switch (sclass[i].oclass) { 449 case NV03_CHANNEL_DMA: 450 ret = nv04_fence_create(drm); 451 break; 452 case NV10_CHANNEL_DMA: 453 ret = nv10_fence_create(drm); 454 break; 455 case NV17_CHANNEL_DMA: 456 case NV40_CHANNEL_DMA: 457 ret = nv17_fence_create(drm); 458 break; 459 case NV50_CHANNEL_GPFIFO: 460 ret = nv50_fence_create(drm); 461 break; 462 case G82_CHANNEL_GPFIFO: 463 ret = nv84_fence_create(drm); 464 break; 465 case FERMI_CHANNEL_GPFIFO: 466 case KEPLER_CHANNEL_GPFIFO_A: 467 case KEPLER_CHANNEL_GPFIFO_B: 468 case MAXWELL_CHANNEL_GPFIFO_A: 469 case PASCAL_CHANNEL_GPFIFO_A: 470 case VOLTA_CHANNEL_GPFIFO_A: 471 case TURING_CHANNEL_GPFIFO_A: 472 case AMPERE_CHANNEL_GPFIFO_A: 473 case AMPERE_CHANNEL_GPFIFO_B: 474 ret = nvc0_fence_create(drm); 475 break; 476 default: 477 break; 478 } 479 } 480 481 nvif_object_sclass_put(&sclass); 482 if (ret) { 483 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); 484 nouveau_accel_fini(drm); 485 return; 486 } 487 488 /* Volta requires access to a doorbell register for kickoff. */ 489 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) { 490 ret = nvif_user_ctor(device, "drmUsermode"); 491 if (ret) 492 return; 493 } 494 495 /* Allocate channels we need to support various functions. */ 496 nouveau_accel_gr_init(drm); 497 nouveau_accel_ce_init(drm); 498 499 /* Initialise accelerated TTM buffer moves. */ 500 nouveau_bo_move_init(drm); 501 } 502 503 static void __printf(2, 3) 504 nouveau_drm_errorf(struct nvif_object *object, const char *fmt, ...) 505 { 506 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent); 507 struct va_format vaf; 508 va_list va; 509 510 va_start(va, fmt); 511 vaf.fmt = fmt; 512 vaf.va = &va; 513 NV_ERROR(drm, "%pV", &vaf); 514 va_end(va); 515 } 516 517 static void __printf(2, 3) 518 nouveau_drm_debugf(struct nvif_object *object, const char *fmt, ...) 519 { 520 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent); 521 struct va_format vaf; 522 va_list va; 523 524 va_start(va, fmt); 525 vaf.fmt = fmt; 526 vaf.va = &va; 527 NV_DEBUG(drm, "%pV", &vaf); 528 va_end(va); 529 } 530 531 static const struct nvif_parent_func 532 nouveau_parent = { 533 .debugf = nouveau_drm_debugf, 534 .errorf = nouveau_drm_errorf, 535 }; 536 537 static int 538 nouveau_drm_device_init(struct drm_device *dev) 539 { 540 struct nouveau_drm *drm; 541 int ret; 542 543 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL))) 544 return -ENOMEM; 545 dev->dev_private = drm; 546 drm->dev = dev; 547 548 nvif_parent_ctor(&nouveau_parent, &drm->parent); 549 drm->master.base.object.parent = &drm->parent; 550 551 ret = nouveau_cli_init(drm, "DRM-master", &drm->master); 552 if (ret) 553 goto fail_alloc; 554 555 ret = nouveau_cli_init(drm, "DRM", &drm->client); 556 if (ret) 557 goto fail_master; 558 559 nvxx_client(&drm->client.base)->debug = 560 nvkm_dbgopt(nouveau_debug, "DRM"); 561 562 INIT_LIST_HEAD(&drm->clients); 563 mutex_init(&drm->clients_lock); 564 spin_lock_init(&drm->tile.lock); 565 566 /* workaround an odd issue on nvc1 by disabling the device's 567 * nosnoop capability. hopefully won't cause issues until a 568 * better fix is found - assuming there is one... 569 */ 570 if (drm->client.device.info.chipset == 0xc1) 571 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000); 572 573 nouveau_vga_init(drm); 574 575 ret = nouveau_ttm_init(drm); 576 if (ret) 577 goto fail_ttm; 578 579 ret = nouveau_bios_init(dev); 580 if (ret) 581 goto fail_bios; 582 583 nouveau_accel_init(drm); 584 585 ret = nouveau_display_create(dev); 586 if (ret) 587 goto fail_dispctor; 588 589 if (dev->mode_config.num_crtc) { 590 ret = nouveau_display_init(dev, false, false); 591 if (ret) 592 goto fail_dispinit; 593 } 594 595 nouveau_debugfs_init(drm); 596 nouveau_hwmon_init(dev); 597 nouveau_svm_init(drm); 598 nouveau_dmem_init(drm); 599 nouveau_led_init(dev); 600 601 if (nouveau_pmops_runtime()) { 602 pm_runtime_use_autosuspend(dev->dev); 603 pm_runtime_set_autosuspend_delay(dev->dev, 5000); 604 pm_runtime_set_active(dev->dev); 605 pm_runtime_allow(dev->dev); 606 pm_runtime_mark_last_busy(dev->dev); 607 pm_runtime_put(dev->dev); 608 } 609 610 return 0; 611 612 fail_dispinit: 613 nouveau_display_destroy(dev); 614 fail_dispctor: 615 nouveau_accel_fini(drm); 616 nouveau_bios_takedown(dev); 617 fail_bios: 618 nouveau_ttm_fini(drm); 619 fail_ttm: 620 nouveau_vga_fini(drm); 621 nouveau_cli_fini(&drm->client); 622 fail_master: 623 nouveau_cli_fini(&drm->master); 624 fail_alloc: 625 nvif_parent_dtor(&drm->parent); 626 kfree(drm); 627 return ret; 628 } 629 630 static void 631 nouveau_drm_device_fini(struct drm_device *dev) 632 { 633 struct nouveau_cli *cli, *temp_cli; 634 struct nouveau_drm *drm = nouveau_drm(dev); 635 636 if (nouveau_pmops_runtime()) { 637 pm_runtime_get_sync(dev->dev); 638 pm_runtime_forbid(dev->dev); 639 } 640 641 nouveau_led_fini(dev); 642 nouveau_dmem_fini(drm); 643 nouveau_svm_fini(drm); 644 nouveau_hwmon_fini(dev); 645 nouveau_debugfs_fini(drm); 646 647 if (dev->mode_config.num_crtc) 648 nouveau_display_fini(dev, false, false); 649 nouveau_display_destroy(dev); 650 651 nouveau_accel_fini(drm); 652 nouveau_bios_takedown(dev); 653 654 nouveau_ttm_fini(drm); 655 nouveau_vga_fini(drm); 656 657 /* 658 * There may be existing clients from as-yet unclosed files. For now, 659 * clean them up here rather than deferring until the file is closed, 660 * but this likely not correct if we want to support hot-unplugging 661 * properly. 662 */ 663 mutex_lock(&drm->clients_lock); 664 list_for_each_entry_safe(cli, temp_cli, &drm->clients, head) { 665 list_del(&cli->head); 666 mutex_lock(&cli->mutex); 667 if (cli->abi16) 668 nouveau_abi16_fini(cli->abi16); 669 mutex_unlock(&cli->mutex); 670 nouveau_cli_fini(cli); 671 kfree(cli); 672 } 673 mutex_unlock(&drm->clients_lock); 674 675 nouveau_cli_fini(&drm->client); 676 nouveau_cli_fini(&drm->master); 677 nvif_parent_dtor(&drm->parent); 678 mutex_destroy(&drm->clients_lock); 679 kfree(drm); 680 } 681 682 /* 683 * On some Intel PCIe bridge controllers doing a 684 * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear. 685 * Skipping the intermediate D3hot step seems to make it work again. This is 686 * probably caused by not meeting the expectation the involved AML code has 687 * when the GPU is put into D3hot state before invoking it. 688 * 689 * This leads to various manifestations of this issue: 690 * - AML code execution to power on the GPU hits an infinite loop (as the 691 * code waits on device memory to change). 692 * - kernel crashes, as all PCI reads return -1, which most code isn't able 693 * to handle well enough. 694 * 695 * In all cases dmesg will contain at least one line like this: 696 * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3' 697 * followed by a lot of nouveau timeouts. 698 * 699 * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not 700 * documented PCI config space register 0x248 of the Intel PCIe bridge 701 * controller (0x1901) in order to change the state of the PCIe link between 702 * the PCIe port and the GPU. There are alternative code paths using other 703 * registers, which seem to work fine (executed pre Windows 8): 704 * - 0xbc bit 0x20 (publicly available documentation claims 'reserved') 705 * - 0xb0 bit 0x10 (link disable) 706 * Changing the conditions inside the firmware by poking into the relevant 707 * addresses does resolve the issue, but it seemed to be ACPI private memory 708 * and not any device accessible memory at all, so there is no portable way of 709 * changing the conditions. 710 * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared. 711 * 712 * The only systems where this behavior can be seen are hybrid graphics laptops 713 * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether 714 * this issue only occurs in combination with listed Intel PCIe bridge 715 * controllers and the mentioned GPUs or other devices as well. 716 * 717 * documentation on the PCIe bridge controller can be found in the 718 * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2" 719 * Section "12 PCI Express* Controller (x16) Registers" 720 */ 721 722 static void quirk_broken_nv_runpm(struct pci_dev *pdev) 723 { 724 struct drm_device *dev = pci_get_drvdata(pdev); 725 struct nouveau_drm *drm = nouveau_drm(dev); 726 struct pci_dev *bridge = pci_upstream_bridge(pdev); 727 728 if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL) 729 return; 730 731 switch (bridge->device) { 732 case 0x1901: 733 drm->old_pm_cap = pdev->pm_cap; 734 pdev->pm_cap = 0; 735 NV_INFO(drm, "Disabling PCI power management to avoid bug\n"); 736 break; 737 } 738 } 739 740 static int nouveau_drm_probe(struct pci_dev *pdev, 741 const struct pci_device_id *pent) 742 { 743 struct nvkm_device *device; 744 struct drm_device *drm_dev; 745 int ret; 746 747 if (vga_switcheroo_client_probe_defer(pdev)) 748 return -EPROBE_DEFER; 749 750 /* We need to check that the chipset is supported before booting 751 * fbdev off the hardware, as there's no way to put it back. 752 */ 753 ret = nvkm_device_pci_new(pdev, nouveau_config, "error", 754 true, false, 0, &device); 755 if (ret) 756 return ret; 757 758 nvkm_device_del(&device); 759 760 /* Remove conflicting drivers (vesafb, efifb etc). */ 761 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &driver_pci); 762 if (ret) 763 return ret; 764 765 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, 766 true, true, ~0ULL, &device); 767 if (ret) 768 return ret; 769 770 pci_set_master(pdev); 771 772 if (nouveau_atomic) 773 driver_pci.driver_features |= DRIVER_ATOMIC; 774 775 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev); 776 if (IS_ERR(drm_dev)) { 777 ret = PTR_ERR(drm_dev); 778 goto fail_nvkm; 779 } 780 781 ret = pci_enable_device(pdev); 782 if (ret) 783 goto fail_drm; 784 785 pci_set_drvdata(pdev, drm_dev); 786 787 ret = nouveau_drm_device_init(drm_dev); 788 if (ret) 789 goto fail_pci; 790 791 ret = drm_dev_register(drm_dev, pent->driver_data); 792 if (ret) 793 goto fail_drm_dev_init; 794 795 if (nouveau_drm(drm_dev)->client.device.info.ram_size <= 32 * 1024 * 1024) 796 drm_fbdev_generic_setup(drm_dev, 8); 797 else 798 drm_fbdev_generic_setup(drm_dev, 32); 799 800 quirk_broken_nv_runpm(pdev); 801 return 0; 802 803 fail_drm_dev_init: 804 nouveau_drm_device_fini(drm_dev); 805 fail_pci: 806 pci_disable_device(pdev); 807 fail_drm: 808 drm_dev_put(drm_dev); 809 fail_nvkm: 810 nvkm_device_del(&device); 811 return ret; 812 } 813 814 void 815 nouveau_drm_device_remove(struct drm_device *dev) 816 { 817 struct nouveau_drm *drm = nouveau_drm(dev); 818 struct nvkm_client *client; 819 struct nvkm_device *device; 820 821 drm_dev_unplug(dev); 822 823 client = nvxx_client(&drm->client.base); 824 device = nvkm_device_find(client->device); 825 826 nouveau_drm_device_fini(dev); 827 drm_dev_put(dev); 828 nvkm_device_del(&device); 829 } 830 831 static void 832 nouveau_drm_remove(struct pci_dev *pdev) 833 { 834 struct drm_device *dev = pci_get_drvdata(pdev); 835 struct nouveau_drm *drm = nouveau_drm(dev); 836 837 /* revert our workaround */ 838 if (drm->old_pm_cap) 839 pdev->pm_cap = drm->old_pm_cap; 840 nouveau_drm_device_remove(dev); 841 pci_disable_device(pdev); 842 } 843 844 static int 845 nouveau_do_suspend(struct drm_device *dev, bool runtime) 846 { 847 struct nouveau_drm *drm = nouveau_drm(dev); 848 struct ttm_resource_manager *man; 849 int ret; 850 851 nouveau_svm_suspend(drm); 852 nouveau_dmem_suspend(drm); 853 nouveau_led_suspend(dev); 854 855 if (dev->mode_config.num_crtc) { 856 NV_DEBUG(drm, "suspending display...\n"); 857 ret = nouveau_display_suspend(dev, runtime); 858 if (ret) 859 return ret; 860 } 861 862 NV_DEBUG(drm, "evicting buffers...\n"); 863 864 man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_VRAM); 865 ttm_resource_manager_evict_all(&drm->ttm.bdev, man); 866 867 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n"); 868 if (drm->cechan) { 869 ret = nouveau_channel_idle(drm->cechan); 870 if (ret) 871 goto fail_display; 872 } 873 874 if (drm->channel) { 875 ret = nouveau_channel_idle(drm->channel); 876 if (ret) 877 goto fail_display; 878 } 879 880 NV_DEBUG(drm, "suspending fence...\n"); 881 if (drm->fence && nouveau_fence(drm)->suspend) { 882 if (!nouveau_fence(drm)->suspend(drm)) { 883 ret = -ENOMEM; 884 goto fail_display; 885 } 886 } 887 888 NV_DEBUG(drm, "suspending object tree...\n"); 889 ret = nvif_client_suspend(&drm->master.base); 890 if (ret) 891 goto fail_client; 892 893 return 0; 894 895 fail_client: 896 if (drm->fence && nouveau_fence(drm)->resume) 897 nouveau_fence(drm)->resume(drm); 898 899 fail_display: 900 if (dev->mode_config.num_crtc) { 901 NV_DEBUG(drm, "resuming display...\n"); 902 nouveau_display_resume(dev, runtime); 903 } 904 return ret; 905 } 906 907 static int 908 nouveau_do_resume(struct drm_device *dev, bool runtime) 909 { 910 int ret = 0; 911 struct nouveau_drm *drm = nouveau_drm(dev); 912 913 NV_DEBUG(drm, "resuming object tree...\n"); 914 ret = nvif_client_resume(&drm->master.base); 915 if (ret) { 916 NV_ERROR(drm, "Client resume failed with error: %d\n", ret); 917 return ret; 918 } 919 920 NV_DEBUG(drm, "resuming fence...\n"); 921 if (drm->fence && nouveau_fence(drm)->resume) 922 nouveau_fence(drm)->resume(drm); 923 924 nouveau_run_vbios_init(dev); 925 926 if (dev->mode_config.num_crtc) { 927 NV_DEBUG(drm, "resuming display...\n"); 928 nouveau_display_resume(dev, runtime); 929 } 930 931 nouveau_led_resume(dev); 932 nouveau_dmem_resume(drm); 933 nouveau_svm_resume(drm); 934 return 0; 935 } 936 937 int 938 nouveau_pmops_suspend(struct device *dev) 939 { 940 struct pci_dev *pdev = to_pci_dev(dev); 941 struct drm_device *drm_dev = pci_get_drvdata(pdev); 942 int ret; 943 944 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 945 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 946 return 0; 947 948 ret = nouveau_do_suspend(drm_dev, false); 949 if (ret) 950 return ret; 951 952 pci_save_state(pdev); 953 pci_disable_device(pdev); 954 pci_set_power_state(pdev, PCI_D3hot); 955 udelay(200); 956 return 0; 957 } 958 959 int 960 nouveau_pmops_resume(struct device *dev) 961 { 962 struct pci_dev *pdev = to_pci_dev(dev); 963 struct drm_device *drm_dev = pci_get_drvdata(pdev); 964 int ret; 965 966 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 967 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 968 return 0; 969 970 pci_set_power_state(pdev, PCI_D0); 971 pci_restore_state(pdev); 972 ret = pci_enable_device(pdev); 973 if (ret) 974 return ret; 975 pci_set_master(pdev); 976 977 ret = nouveau_do_resume(drm_dev, false); 978 979 /* Monitors may have been connected / disconnected during suspend */ 980 nouveau_display_hpd_resume(drm_dev); 981 982 return ret; 983 } 984 985 static int 986 nouveau_pmops_freeze(struct device *dev) 987 { 988 struct pci_dev *pdev = to_pci_dev(dev); 989 struct drm_device *drm_dev = pci_get_drvdata(pdev); 990 return nouveau_do_suspend(drm_dev, false); 991 } 992 993 static int 994 nouveau_pmops_thaw(struct device *dev) 995 { 996 struct pci_dev *pdev = to_pci_dev(dev); 997 struct drm_device *drm_dev = pci_get_drvdata(pdev); 998 return nouveau_do_resume(drm_dev, false); 999 } 1000 1001 bool 1002 nouveau_pmops_runtime(void) 1003 { 1004 if (nouveau_runtime_pm == -1) 1005 return nouveau_is_optimus() || nouveau_is_v1_dsm(); 1006 return nouveau_runtime_pm == 1; 1007 } 1008 1009 static int 1010 nouveau_pmops_runtime_suspend(struct device *dev) 1011 { 1012 struct pci_dev *pdev = to_pci_dev(dev); 1013 struct drm_device *drm_dev = pci_get_drvdata(pdev); 1014 int ret; 1015 1016 if (!nouveau_pmops_runtime()) { 1017 pm_runtime_forbid(dev); 1018 return -EBUSY; 1019 } 1020 1021 nouveau_switcheroo_optimus_dsm(); 1022 ret = nouveau_do_suspend(drm_dev, true); 1023 pci_save_state(pdev); 1024 pci_disable_device(pdev); 1025 pci_ignore_hotplug(pdev); 1026 pci_set_power_state(pdev, PCI_D3cold); 1027 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 1028 return ret; 1029 } 1030 1031 static int 1032 nouveau_pmops_runtime_resume(struct device *dev) 1033 { 1034 struct pci_dev *pdev = to_pci_dev(dev); 1035 struct drm_device *drm_dev = pci_get_drvdata(pdev); 1036 struct nouveau_drm *drm = nouveau_drm(drm_dev); 1037 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device; 1038 int ret; 1039 1040 if (!nouveau_pmops_runtime()) { 1041 pm_runtime_forbid(dev); 1042 return -EBUSY; 1043 } 1044 1045 pci_set_power_state(pdev, PCI_D0); 1046 pci_restore_state(pdev); 1047 ret = pci_enable_device(pdev); 1048 if (ret) 1049 return ret; 1050 pci_set_master(pdev); 1051 1052 ret = nouveau_do_resume(drm_dev, true); 1053 if (ret) { 1054 NV_ERROR(drm, "resume failed with: %d\n", ret); 1055 return ret; 1056 } 1057 1058 /* do magic */ 1059 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); 1060 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 1061 1062 /* Monitors may have been connected / disconnected during suspend */ 1063 nouveau_display_hpd_resume(drm_dev); 1064 1065 return ret; 1066 } 1067 1068 static int 1069 nouveau_pmops_runtime_idle(struct device *dev) 1070 { 1071 if (!nouveau_pmops_runtime()) { 1072 pm_runtime_forbid(dev); 1073 return -EBUSY; 1074 } 1075 1076 pm_runtime_mark_last_busy(dev); 1077 pm_runtime_autosuspend(dev); 1078 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 1079 return 1; 1080 } 1081 1082 static int 1083 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) 1084 { 1085 struct nouveau_drm *drm = nouveau_drm(dev); 1086 struct nouveau_cli *cli; 1087 char name[32], tmpname[TASK_COMM_LEN]; 1088 int ret; 1089 1090 /* need to bring up power immediately if opening device */ 1091 ret = pm_runtime_get_sync(dev->dev); 1092 if (ret < 0 && ret != -EACCES) { 1093 pm_runtime_put_autosuspend(dev->dev); 1094 return ret; 1095 } 1096 1097 get_task_comm(tmpname, current); 1098 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); 1099 1100 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) { 1101 ret = -ENOMEM; 1102 goto done; 1103 } 1104 1105 ret = nouveau_cli_init(drm, name, cli); 1106 if (ret) 1107 goto done; 1108 1109 fpriv->driver_priv = cli; 1110 1111 mutex_lock(&drm->clients_lock); 1112 list_add(&cli->head, &drm->clients); 1113 mutex_unlock(&drm->clients_lock); 1114 1115 done: 1116 if (ret && cli) { 1117 nouveau_cli_fini(cli); 1118 kfree(cli); 1119 } 1120 1121 pm_runtime_mark_last_busy(dev->dev); 1122 pm_runtime_put_autosuspend(dev->dev); 1123 return ret; 1124 } 1125 1126 static void 1127 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) 1128 { 1129 struct nouveau_cli *cli = nouveau_cli(fpriv); 1130 struct nouveau_drm *drm = nouveau_drm(dev); 1131 int dev_index; 1132 1133 /* 1134 * The device is gone, and as it currently stands all clients are 1135 * cleaned up in the removal codepath. In the future this may change 1136 * so that we can support hot-unplugging, but for now we immediately 1137 * return to avoid a double-free situation. 1138 */ 1139 if (!drm_dev_enter(dev, &dev_index)) 1140 return; 1141 1142 pm_runtime_get_sync(dev->dev); 1143 1144 mutex_lock(&cli->mutex); 1145 if (cli->abi16) 1146 nouveau_abi16_fini(cli->abi16); 1147 mutex_unlock(&cli->mutex); 1148 1149 mutex_lock(&drm->clients_lock); 1150 list_del(&cli->head); 1151 mutex_unlock(&drm->clients_lock); 1152 1153 nouveau_cli_fini(cli); 1154 kfree(cli); 1155 pm_runtime_mark_last_busy(dev->dev); 1156 pm_runtime_put_autosuspend(dev->dev); 1157 drm_dev_exit(dev_index); 1158 } 1159 1160 static const struct drm_ioctl_desc 1161 nouveau_ioctls[] = { 1162 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW), 1163 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 1164 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW), 1165 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW), 1166 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW), 1167 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW), 1168 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW), 1169 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW), 1170 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW), 1171 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW), 1172 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW), 1173 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW), 1174 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW), 1175 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW), 1176 }; 1177 1178 long 1179 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 1180 { 1181 struct drm_file *filp = file->private_data; 1182 struct drm_device *dev = filp->minor->dev; 1183 long ret; 1184 1185 ret = pm_runtime_get_sync(dev->dev); 1186 if (ret < 0 && ret != -EACCES) { 1187 pm_runtime_put_autosuspend(dev->dev); 1188 return ret; 1189 } 1190 1191 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { 1192 case DRM_NOUVEAU_NVIF: 1193 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); 1194 break; 1195 default: 1196 ret = drm_ioctl(file, cmd, arg); 1197 break; 1198 } 1199 1200 pm_runtime_mark_last_busy(dev->dev); 1201 pm_runtime_put_autosuspend(dev->dev); 1202 return ret; 1203 } 1204 1205 static const struct file_operations 1206 nouveau_driver_fops = { 1207 .owner = THIS_MODULE, 1208 .open = drm_open, 1209 .release = drm_release, 1210 .unlocked_ioctl = nouveau_drm_ioctl, 1211 .mmap = drm_gem_mmap, 1212 .poll = drm_poll, 1213 .read = drm_read, 1214 #if defined(CONFIG_COMPAT) 1215 .compat_ioctl = nouveau_compat_ioctl, 1216 #endif 1217 .llseek = noop_llseek, 1218 }; 1219 1220 static struct drm_driver 1221 driver_stub = { 1222 .driver_features = DRIVER_GEM | 1223 DRIVER_MODESET | 1224 DRIVER_RENDER, 1225 .open = nouveau_drm_open, 1226 .postclose = nouveau_drm_postclose, 1227 .lastclose = nouveau_vga_lastclose, 1228 1229 #if defined(CONFIG_DEBUG_FS) 1230 .debugfs_init = nouveau_drm_debugfs_init, 1231 #endif 1232 1233 .ioctls = nouveau_ioctls, 1234 .num_ioctls = ARRAY_SIZE(nouveau_ioctls), 1235 .fops = &nouveau_driver_fops, 1236 1237 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 1238 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 1239 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, 1240 .gem_prime_mmap = drm_gem_prime_mmap, 1241 1242 .dumb_create = nouveau_display_dumb_create, 1243 .dumb_map_offset = drm_gem_ttm_dumb_map_offset, 1244 1245 .name = DRIVER_NAME, 1246 .desc = DRIVER_DESC, 1247 #ifdef GIT_REVISION 1248 .date = GIT_REVISION, 1249 #else 1250 .date = DRIVER_DATE, 1251 #endif 1252 .major = DRIVER_MAJOR, 1253 .minor = DRIVER_MINOR, 1254 .patchlevel = DRIVER_PATCHLEVEL, 1255 }; 1256 1257 static struct pci_device_id 1258 nouveau_drm_pci_table[] = { 1259 { 1260 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), 1261 .class = PCI_BASE_CLASS_DISPLAY << 16, 1262 .class_mask = 0xff << 16, 1263 }, 1264 { 1265 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), 1266 .class = PCI_BASE_CLASS_DISPLAY << 16, 1267 .class_mask = 0xff << 16, 1268 }, 1269 {} 1270 }; 1271 1272 static void nouveau_display_options(void) 1273 { 1274 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); 1275 1276 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); 1277 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); 1278 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); 1279 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); 1280 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); 1281 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); 1282 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); 1283 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); 1284 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); 1285 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz); 1286 } 1287 1288 static const struct dev_pm_ops nouveau_pm_ops = { 1289 .suspend = nouveau_pmops_suspend, 1290 .resume = nouveau_pmops_resume, 1291 .freeze = nouveau_pmops_freeze, 1292 .thaw = nouveau_pmops_thaw, 1293 .poweroff = nouveau_pmops_freeze, 1294 .restore = nouveau_pmops_resume, 1295 .runtime_suspend = nouveau_pmops_runtime_suspend, 1296 .runtime_resume = nouveau_pmops_runtime_resume, 1297 .runtime_idle = nouveau_pmops_runtime_idle, 1298 }; 1299 1300 static struct pci_driver 1301 nouveau_drm_pci_driver = { 1302 .name = "nouveau", 1303 .id_table = nouveau_drm_pci_table, 1304 .probe = nouveau_drm_probe, 1305 .remove = nouveau_drm_remove, 1306 .driver.pm = &nouveau_pm_ops, 1307 }; 1308 1309 struct drm_device * 1310 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, 1311 struct platform_device *pdev, 1312 struct nvkm_device **pdevice) 1313 { 1314 struct drm_device *drm; 1315 int err; 1316 1317 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, 1318 true, true, ~0ULL, pdevice); 1319 if (err) 1320 goto err_free; 1321 1322 drm = drm_dev_alloc(&driver_platform, &pdev->dev); 1323 if (IS_ERR(drm)) { 1324 err = PTR_ERR(drm); 1325 goto err_free; 1326 } 1327 1328 err = nouveau_drm_device_init(drm); 1329 if (err) 1330 goto err_put; 1331 1332 platform_set_drvdata(pdev, drm); 1333 1334 return drm; 1335 1336 err_put: 1337 drm_dev_put(drm); 1338 err_free: 1339 nvkm_device_del(pdevice); 1340 1341 return ERR_PTR(err); 1342 } 1343 1344 static int __init 1345 nouveau_drm_init(void) 1346 { 1347 driver_pci = driver_stub; 1348 driver_platform = driver_stub; 1349 1350 nouveau_display_options(); 1351 1352 if (nouveau_modeset == -1) { 1353 if (drm_firmware_drivers_only()) 1354 nouveau_modeset = 0; 1355 } 1356 1357 if (!nouveau_modeset) 1358 return 0; 1359 1360 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1361 platform_driver_register(&nouveau_platform_driver); 1362 #endif 1363 1364 nouveau_register_dsm_handler(); 1365 nouveau_backlight_ctor(); 1366 1367 #ifdef CONFIG_PCI 1368 return pci_register_driver(&nouveau_drm_pci_driver); 1369 #else 1370 return 0; 1371 #endif 1372 } 1373 1374 static void __exit 1375 nouveau_drm_exit(void) 1376 { 1377 if (!nouveau_modeset) 1378 return; 1379 1380 #ifdef CONFIG_PCI 1381 pci_unregister_driver(&nouveau_drm_pci_driver); 1382 #endif 1383 nouveau_backlight_dtor(); 1384 nouveau_unregister_dsm_handler(); 1385 1386 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1387 platform_driver_unregister(&nouveau_platform_driver); 1388 #endif 1389 if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM)) 1390 mmu_notifier_synchronize(); 1391 } 1392 1393 module_init(nouveau_drm_init); 1394 module_exit(nouveau_drm_exit); 1395 1396 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); 1397 MODULE_AUTHOR(DRIVER_AUTHOR); 1398 MODULE_DESCRIPTION(DRIVER_DESC); 1399 MODULE_LICENSE("GPL and additional rights"); 1400