1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 25 #include <linux/delay.h> 26 #include <linux/module.h> 27 #include <linux/pci.h> 28 #include <linux/pm_runtime.h> 29 #include <linux/vga_switcheroo.h> 30 #include <linux/mmu_notifier.h> 31 #include <linux/dynamic_debug.h> 32 33 #include <drm/drm_aperture.h> 34 #include <drm/drm_drv.h> 35 #include <drm/drm_fbdev_generic.h> 36 #include <drm/drm_gem_ttm_helper.h> 37 #include <drm/drm_ioctl.h> 38 #include <drm/drm_vblank.h> 39 40 #include <core/gpuobj.h> 41 #include <core/option.h> 42 #include <core/pci.h> 43 #include <core/tegra.h> 44 45 #include <nvif/driver.h> 46 #include <nvif/fifo.h> 47 #include <nvif/push006c.h> 48 #include <nvif/user.h> 49 50 #include <nvif/class.h> 51 #include <nvif/cl0002.h> 52 53 #include "nouveau_drv.h" 54 #include "nouveau_dma.h" 55 #include "nouveau_ttm.h" 56 #include "nouveau_gem.h" 57 #include "nouveau_vga.h" 58 #include "nouveau_led.h" 59 #include "nouveau_hwmon.h" 60 #include "nouveau_acpi.h" 61 #include "nouveau_bios.h" 62 #include "nouveau_ioctl.h" 63 #include "nouveau_abi16.h" 64 #include "nouveau_fence.h" 65 #include "nouveau_debugfs.h" 66 #include "nouveau_usif.h" 67 #include "nouveau_connector.h" 68 #include "nouveau_platform.h" 69 #include "nouveau_svm.h" 70 #include "nouveau_dmem.h" 71 #include "nouveau_exec.h" 72 #include "nouveau_uvmm.h" 73 #include "nouveau_sched.h" 74 75 DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0, 76 "DRM_UT_CORE", 77 "DRM_UT_DRIVER", 78 "DRM_UT_KMS", 79 "DRM_UT_PRIME", 80 "DRM_UT_ATOMIC", 81 "DRM_UT_VBL", 82 "DRM_UT_STATE", 83 "DRM_UT_LEASE", 84 "DRM_UT_DP", 85 "DRM_UT_DRMRES"); 86 87 MODULE_PARM_DESC(config, "option string to pass to driver core"); 88 static char *nouveau_config; 89 module_param_named(config, nouveau_config, charp, 0400); 90 91 MODULE_PARM_DESC(debug, "debug string to pass to driver core"); 92 static char *nouveau_debug; 93 module_param_named(debug, nouveau_debug, charp, 0400); 94 95 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); 96 static int nouveau_noaccel = 0; 97 module_param_named(noaccel, nouveau_noaccel, int, 0400); 98 99 MODULE_PARM_DESC(modeset, "enable driver (default: auto, " 100 "0 = disabled, 1 = enabled, 2 = headless)"); 101 int nouveau_modeset = -1; 102 module_param_named(modeset, nouveau_modeset, int, 0400); 103 104 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)"); 105 static int nouveau_atomic = 0; 106 module_param_named(atomic, nouveau_atomic, int, 0400); 107 108 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); 109 static int nouveau_runtime_pm = -1; 110 module_param_named(runpm, nouveau_runtime_pm, int, 0400); 111 112 static struct drm_driver driver_stub; 113 static struct drm_driver driver_pci; 114 static struct drm_driver driver_platform; 115 116 static u64 117 nouveau_pci_name(struct pci_dev *pdev) 118 { 119 u64 name = (u64)pci_domain_nr(pdev->bus) << 32; 120 name |= pdev->bus->number << 16; 121 name |= PCI_SLOT(pdev->devfn) << 8; 122 return name | PCI_FUNC(pdev->devfn); 123 } 124 125 static u64 126 nouveau_platform_name(struct platform_device *platformdev) 127 { 128 return platformdev->id; 129 } 130 131 static u64 132 nouveau_name(struct drm_device *dev) 133 { 134 if (dev_is_pci(dev->dev)) 135 return nouveau_pci_name(to_pci_dev(dev->dev)); 136 else 137 return nouveau_platform_name(to_platform_device(dev->dev)); 138 } 139 140 static inline bool 141 nouveau_cli_work_ready(struct dma_fence *fence) 142 { 143 bool ret = true; 144 145 spin_lock_irq(fence->lock); 146 if (!dma_fence_is_signaled_locked(fence)) 147 ret = false; 148 spin_unlock_irq(fence->lock); 149 150 if (ret == true) 151 dma_fence_put(fence); 152 return ret; 153 } 154 155 static void 156 nouveau_cli_work(struct work_struct *w) 157 { 158 struct nouveau_cli *cli = container_of(w, typeof(*cli), work); 159 struct nouveau_cli_work *work, *wtmp; 160 mutex_lock(&cli->lock); 161 list_for_each_entry_safe(work, wtmp, &cli->worker, head) { 162 if (!work->fence || nouveau_cli_work_ready(work->fence)) { 163 list_del(&work->head); 164 work->func(work); 165 } 166 } 167 mutex_unlock(&cli->lock); 168 } 169 170 static void 171 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb) 172 { 173 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb); 174 schedule_work(&work->cli->work); 175 } 176 177 void 178 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence, 179 struct nouveau_cli_work *work) 180 { 181 work->fence = dma_fence_get(fence); 182 work->cli = cli; 183 mutex_lock(&cli->lock); 184 list_add_tail(&work->head, &cli->worker); 185 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence)) 186 nouveau_cli_work_fence(fence, &work->cb); 187 mutex_unlock(&cli->lock); 188 } 189 190 static void 191 nouveau_cli_fini(struct nouveau_cli *cli) 192 { 193 struct nouveau_uvmm *uvmm = nouveau_cli_uvmm_locked(cli); 194 195 /* All our channels are dead now, which means all the fences they 196 * own are signalled, and all callback functions have been called. 197 * 198 * So, after flushing the workqueue, there should be nothing left. 199 */ 200 flush_work(&cli->work); 201 WARN_ON(!list_empty(&cli->worker)); 202 203 usif_client_fini(cli); 204 nouveau_sched_fini(&cli->sched); 205 if (uvmm) 206 nouveau_uvmm_fini(uvmm); 207 nouveau_vmm_fini(&cli->svm); 208 nouveau_vmm_fini(&cli->vmm); 209 nvif_mmu_dtor(&cli->mmu); 210 nvif_device_dtor(&cli->device); 211 mutex_lock(&cli->drm->master.lock); 212 nvif_client_dtor(&cli->base); 213 mutex_unlock(&cli->drm->master.lock); 214 } 215 216 static int 217 nouveau_cli_init(struct nouveau_drm *drm, const char *sname, 218 struct nouveau_cli *cli) 219 { 220 static const struct nvif_mclass 221 mems[] = { 222 { NVIF_CLASS_MEM_GF100, -1 }, 223 { NVIF_CLASS_MEM_NV50 , -1 }, 224 { NVIF_CLASS_MEM_NV04 , -1 }, 225 {} 226 }; 227 static const struct nvif_mclass 228 mmus[] = { 229 { NVIF_CLASS_MMU_GF100, -1 }, 230 { NVIF_CLASS_MMU_NV50 , -1 }, 231 { NVIF_CLASS_MMU_NV04 , -1 }, 232 {} 233 }; 234 static const struct nvif_mclass 235 vmms[] = { 236 { NVIF_CLASS_VMM_GP100, -1 }, 237 { NVIF_CLASS_VMM_GM200, -1 }, 238 { NVIF_CLASS_VMM_GF100, -1 }, 239 { NVIF_CLASS_VMM_NV50 , -1 }, 240 { NVIF_CLASS_VMM_NV04 , -1 }, 241 {} 242 }; 243 u64 device = nouveau_name(drm->dev); 244 int ret; 245 246 snprintf(cli->name, sizeof(cli->name), "%s", sname); 247 cli->drm = drm; 248 mutex_init(&cli->mutex); 249 usif_client_init(cli); 250 251 INIT_WORK(&cli->work, nouveau_cli_work); 252 INIT_LIST_HEAD(&cli->worker); 253 mutex_init(&cli->lock); 254 255 if (cli == &drm->master) { 256 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug, 257 cli->name, device, &cli->base); 258 } else { 259 mutex_lock(&drm->master.lock); 260 ret = nvif_client_ctor(&drm->master.base, cli->name, device, 261 &cli->base); 262 mutex_unlock(&drm->master.lock); 263 } 264 if (ret) { 265 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret); 266 goto done; 267 } 268 269 ret = nvif_device_ctor(&cli->base.object, "drmDevice", 0, NV_DEVICE, 270 &(struct nv_device_v0) { 271 .device = ~0, 272 .priv = true, 273 }, sizeof(struct nv_device_v0), 274 &cli->device); 275 if (ret) { 276 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret); 277 goto done; 278 } 279 280 ret = nvif_mclass(&cli->device.object, mmus); 281 if (ret < 0) { 282 NV_PRINTK(err, cli, "No supported MMU class\n"); 283 goto done; 284 } 285 286 ret = nvif_mmu_ctor(&cli->device.object, "drmMmu", mmus[ret].oclass, 287 &cli->mmu); 288 if (ret) { 289 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret); 290 goto done; 291 } 292 293 ret = nvif_mclass(&cli->mmu.object, vmms); 294 if (ret < 0) { 295 NV_PRINTK(err, cli, "No supported VMM class\n"); 296 goto done; 297 } 298 299 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm); 300 if (ret) { 301 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret); 302 goto done; 303 } 304 305 ret = nvif_mclass(&cli->mmu.object, mems); 306 if (ret < 0) { 307 NV_PRINTK(err, cli, "No supported MEM class\n"); 308 goto done; 309 } 310 311 cli->mem = &mems[ret]; 312 313 /* Don't pass in the (shared) sched_wq in order to let 314 * nouveau_sched_init() create a dedicated one for VM_BIND jobs. 315 * 316 * This is required to ensure that for VM_BIND jobs free_job() work and 317 * run_job() work can always run concurrently and hence, free_job() work 318 * can never stall run_job() work. For EXEC jobs we don't have this 319 * requirement, since EXEC job's free_job() does not require to take any 320 * locks which indirectly or directly are held for allocations 321 * elsewhere. 322 */ 323 ret = nouveau_sched_init(&cli->sched, drm, NULL, 1); 324 if (ret) 325 goto done; 326 327 return 0; 328 done: 329 if (ret) 330 nouveau_cli_fini(cli); 331 return ret; 332 } 333 334 static void 335 nouveau_accel_ce_fini(struct nouveau_drm *drm) 336 { 337 nouveau_channel_idle(drm->cechan); 338 nvif_object_dtor(&drm->ttm.copy); 339 nouveau_channel_del(&drm->cechan); 340 } 341 342 static void 343 nouveau_accel_ce_init(struct nouveau_drm *drm) 344 { 345 struct nvif_device *device = &drm->client.device; 346 u64 runm; 347 int ret = 0; 348 349 /* Allocate channel that has access to a (preferably async) copy 350 * engine, to use for TTM buffer moves. 351 */ 352 runm = nvif_fifo_runlist_ce(device); 353 if (!runm) { 354 NV_DEBUG(drm, "no ce runlist\n"); 355 return; 356 } 357 358 ret = nouveau_channel_new(drm, device, false, runm, NvDmaFB, NvDmaTT, &drm->cechan); 359 if (ret) 360 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 361 } 362 363 static void 364 nouveau_accel_gr_fini(struct nouveau_drm *drm) 365 { 366 nouveau_channel_idle(drm->channel); 367 nvif_object_dtor(&drm->ntfy); 368 nvkm_gpuobj_del(&drm->notify); 369 nouveau_channel_del(&drm->channel); 370 } 371 372 static void 373 nouveau_accel_gr_init(struct nouveau_drm *drm) 374 { 375 struct nvif_device *device = &drm->client.device; 376 u64 runm; 377 int ret; 378 379 /* Allocate channel that has access to the graphics engine. */ 380 runm = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR); 381 if (!runm) { 382 NV_DEBUG(drm, "no gr runlist\n"); 383 return; 384 } 385 386 ret = nouveau_channel_new(drm, device, false, runm, NvDmaFB, NvDmaTT, &drm->channel); 387 if (ret) { 388 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); 389 nouveau_accel_gr_fini(drm); 390 return; 391 } 392 393 /* A SW class is used on pre-NV50 HW to assist with handling the 394 * synchronisation of page flips, as well as to implement fences 395 * on TNT/TNT2 HW that lacks any kind of support in host. 396 */ 397 if (!drm->channel->nvsw.client && device->info.family < NV_DEVICE_INFO_V0_TESLA) { 398 ret = nvif_object_ctor(&drm->channel->user, "drmNvsw", 399 NVDRM_NVSW, nouveau_abi16_swclass(drm), 400 NULL, 0, &drm->channel->nvsw); 401 402 if (ret == 0 && device->info.chipset >= 0x11) { 403 ret = nvif_object_ctor(&drm->channel->user, "drmBlit", 404 0x005f, 0x009f, 405 NULL, 0, &drm->channel->blit); 406 } 407 408 if (ret == 0) { 409 struct nvif_push *push = drm->channel->chan.push; 410 ret = PUSH_WAIT(push, 8); 411 if (ret == 0) { 412 if (device->info.chipset >= 0x11) { 413 PUSH_NVSQ(push, NV05F, 0x0000, drm->channel->blit.handle); 414 PUSH_NVSQ(push, NV09F, 0x0120, 0, 415 0x0124, 1, 416 0x0128, 2); 417 } 418 PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle); 419 } 420 } 421 422 if (ret) { 423 NV_ERROR(drm, "failed to allocate sw or blit class, %d\n", ret); 424 nouveau_accel_gr_fini(drm); 425 return; 426 } 427 } 428 429 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason, 430 * even if notification is never requested, so, allocate a ctxdma on 431 * any GPU where it's possible we'll end up using M2MF for BO moves. 432 */ 433 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 434 ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL, 435 &drm->notify); 436 if (ret) { 437 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); 438 nouveau_accel_gr_fini(drm); 439 return; 440 } 441 442 ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy", 443 NvNotify0, NV_DMA_IN_MEMORY, 444 &(struct nv_dma_v0) { 445 .target = NV_DMA_V0_TARGET_VRAM, 446 .access = NV_DMA_V0_ACCESS_RDWR, 447 .start = drm->notify->addr, 448 .limit = drm->notify->addr + 31 449 }, sizeof(struct nv_dma_v0), 450 &drm->ntfy); 451 if (ret) { 452 nouveau_accel_gr_fini(drm); 453 return; 454 } 455 } 456 } 457 458 static void 459 nouveau_accel_fini(struct nouveau_drm *drm) 460 { 461 nouveau_accel_ce_fini(drm); 462 nouveau_accel_gr_fini(drm); 463 if (drm->fence) 464 nouveau_fence(drm)->dtor(drm); 465 nouveau_channels_fini(drm); 466 } 467 468 static void 469 nouveau_accel_init(struct nouveau_drm *drm) 470 { 471 struct nvif_device *device = &drm->client.device; 472 struct nvif_sclass *sclass; 473 int ret, i, n; 474 475 if (nouveau_noaccel) 476 return; 477 478 /* Initialise global support for channels, and synchronisation. */ 479 ret = nouveau_channels_init(drm); 480 if (ret) 481 return; 482 483 /*XXX: this is crap, but the fence/channel stuff is a little 484 * backwards in some places. this will be fixed. 485 */ 486 ret = n = nvif_object_sclass_get(&device->object, &sclass); 487 if (ret < 0) 488 return; 489 490 for (ret = -ENOSYS, i = 0; i < n; i++) { 491 switch (sclass[i].oclass) { 492 case NV03_CHANNEL_DMA: 493 ret = nv04_fence_create(drm); 494 break; 495 case NV10_CHANNEL_DMA: 496 ret = nv10_fence_create(drm); 497 break; 498 case NV17_CHANNEL_DMA: 499 case NV40_CHANNEL_DMA: 500 ret = nv17_fence_create(drm); 501 break; 502 case NV50_CHANNEL_GPFIFO: 503 ret = nv50_fence_create(drm); 504 break; 505 case G82_CHANNEL_GPFIFO: 506 ret = nv84_fence_create(drm); 507 break; 508 case FERMI_CHANNEL_GPFIFO: 509 case KEPLER_CHANNEL_GPFIFO_A: 510 case KEPLER_CHANNEL_GPFIFO_B: 511 case MAXWELL_CHANNEL_GPFIFO_A: 512 case PASCAL_CHANNEL_GPFIFO_A: 513 case VOLTA_CHANNEL_GPFIFO_A: 514 case TURING_CHANNEL_GPFIFO_A: 515 case AMPERE_CHANNEL_GPFIFO_A: 516 case AMPERE_CHANNEL_GPFIFO_B: 517 ret = nvc0_fence_create(drm); 518 break; 519 default: 520 break; 521 } 522 } 523 524 nvif_object_sclass_put(&sclass); 525 if (ret) { 526 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); 527 nouveau_accel_fini(drm); 528 return; 529 } 530 531 /* Volta requires access to a doorbell register for kickoff. */ 532 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) { 533 ret = nvif_user_ctor(device, "drmUsermode"); 534 if (ret) 535 return; 536 } 537 538 /* Allocate channels we need to support various functions. */ 539 nouveau_accel_gr_init(drm); 540 nouveau_accel_ce_init(drm); 541 542 /* Initialise accelerated TTM buffer moves. */ 543 nouveau_bo_move_init(drm); 544 } 545 546 static void __printf(2, 3) 547 nouveau_drm_errorf(struct nvif_object *object, const char *fmt, ...) 548 { 549 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent); 550 struct va_format vaf; 551 va_list va; 552 553 va_start(va, fmt); 554 vaf.fmt = fmt; 555 vaf.va = &va; 556 NV_ERROR(drm, "%pV", &vaf); 557 va_end(va); 558 } 559 560 static void __printf(2, 3) 561 nouveau_drm_debugf(struct nvif_object *object, const char *fmt, ...) 562 { 563 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent); 564 struct va_format vaf; 565 va_list va; 566 567 va_start(va, fmt); 568 vaf.fmt = fmt; 569 vaf.va = &va; 570 NV_DEBUG(drm, "%pV", &vaf); 571 va_end(va); 572 } 573 574 static const struct nvif_parent_func 575 nouveau_parent = { 576 .debugf = nouveau_drm_debugf, 577 .errorf = nouveau_drm_errorf, 578 }; 579 580 static int 581 nouveau_drm_device_init(struct drm_device *dev) 582 { 583 struct nouveau_drm *drm; 584 int ret; 585 586 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL))) 587 return -ENOMEM; 588 dev->dev_private = drm; 589 drm->dev = dev; 590 591 nvif_parent_ctor(&nouveau_parent, &drm->parent); 592 drm->master.base.object.parent = &drm->parent; 593 594 drm->sched_wq = alloc_workqueue("nouveau_sched_wq_shared", 0, 595 WQ_MAX_ACTIVE); 596 if (!drm->sched_wq) { 597 ret = -ENOMEM; 598 goto fail_alloc; 599 } 600 601 ret = nouveau_cli_init(drm, "DRM-master", &drm->master); 602 if (ret) 603 goto fail_wq; 604 605 ret = nouveau_cli_init(drm, "DRM", &drm->client); 606 if (ret) 607 goto fail_master; 608 609 nvxx_client(&drm->client.base)->debug = 610 nvkm_dbgopt(nouveau_debug, "DRM"); 611 612 INIT_LIST_HEAD(&drm->clients); 613 mutex_init(&drm->clients_lock); 614 spin_lock_init(&drm->tile.lock); 615 616 /* workaround an odd issue on nvc1 by disabling the device's 617 * nosnoop capability. hopefully won't cause issues until a 618 * better fix is found - assuming there is one... 619 */ 620 if (drm->client.device.info.chipset == 0xc1) 621 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000); 622 623 nouveau_vga_init(drm); 624 625 ret = nouveau_ttm_init(drm); 626 if (ret) 627 goto fail_ttm; 628 629 ret = nouveau_bios_init(dev); 630 if (ret) 631 goto fail_bios; 632 633 nouveau_accel_init(drm); 634 635 ret = nouveau_display_create(dev); 636 if (ret) 637 goto fail_dispctor; 638 639 if (dev->mode_config.num_crtc) { 640 ret = nouveau_display_init(dev, false, false); 641 if (ret) 642 goto fail_dispinit; 643 } 644 645 nouveau_debugfs_init(drm); 646 nouveau_hwmon_init(dev); 647 nouveau_svm_init(drm); 648 nouveau_dmem_init(drm); 649 nouveau_led_init(dev); 650 651 if (nouveau_pmops_runtime()) { 652 pm_runtime_use_autosuspend(dev->dev); 653 pm_runtime_set_autosuspend_delay(dev->dev, 5000); 654 pm_runtime_set_active(dev->dev); 655 pm_runtime_allow(dev->dev); 656 pm_runtime_mark_last_busy(dev->dev); 657 pm_runtime_put(dev->dev); 658 } 659 660 return 0; 661 fail_dispinit: 662 nouveau_display_destroy(dev); 663 fail_dispctor: 664 nouveau_accel_fini(drm); 665 nouveau_bios_takedown(dev); 666 fail_bios: 667 nouveau_ttm_fini(drm); 668 fail_ttm: 669 nouveau_vga_fini(drm); 670 nouveau_cli_fini(&drm->client); 671 fail_master: 672 nouveau_cli_fini(&drm->master); 673 fail_wq: 674 destroy_workqueue(drm->sched_wq); 675 fail_alloc: 676 nvif_parent_dtor(&drm->parent); 677 kfree(drm); 678 return ret; 679 } 680 681 static void 682 nouveau_drm_device_fini(struct drm_device *dev) 683 { 684 struct nouveau_cli *cli, *temp_cli; 685 struct nouveau_drm *drm = nouveau_drm(dev); 686 687 if (nouveau_pmops_runtime()) { 688 pm_runtime_get_sync(dev->dev); 689 pm_runtime_forbid(dev->dev); 690 } 691 692 nouveau_led_fini(dev); 693 nouveau_dmem_fini(drm); 694 nouveau_svm_fini(drm); 695 nouveau_hwmon_fini(dev); 696 nouveau_debugfs_fini(drm); 697 698 if (dev->mode_config.num_crtc) 699 nouveau_display_fini(dev, false, false); 700 nouveau_display_destroy(dev); 701 702 nouveau_accel_fini(drm); 703 nouveau_bios_takedown(dev); 704 705 nouveau_ttm_fini(drm); 706 nouveau_vga_fini(drm); 707 708 /* 709 * There may be existing clients from as-yet unclosed files. For now, 710 * clean them up here rather than deferring until the file is closed, 711 * but this likely not correct if we want to support hot-unplugging 712 * properly. 713 */ 714 mutex_lock(&drm->clients_lock); 715 list_for_each_entry_safe(cli, temp_cli, &drm->clients, head) { 716 list_del(&cli->head); 717 mutex_lock(&cli->mutex); 718 if (cli->abi16) 719 nouveau_abi16_fini(cli->abi16); 720 mutex_unlock(&cli->mutex); 721 nouveau_cli_fini(cli); 722 kfree(cli); 723 } 724 mutex_unlock(&drm->clients_lock); 725 726 nouveau_cli_fini(&drm->client); 727 nouveau_cli_fini(&drm->master); 728 destroy_workqueue(drm->sched_wq); 729 nvif_parent_dtor(&drm->parent); 730 mutex_destroy(&drm->clients_lock); 731 kfree(drm); 732 } 733 734 /* 735 * On some Intel PCIe bridge controllers doing a 736 * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear. 737 * Skipping the intermediate D3hot step seems to make it work again. This is 738 * probably caused by not meeting the expectation the involved AML code has 739 * when the GPU is put into D3hot state before invoking it. 740 * 741 * This leads to various manifestations of this issue: 742 * - AML code execution to power on the GPU hits an infinite loop (as the 743 * code waits on device memory to change). 744 * - kernel crashes, as all PCI reads return -1, which most code isn't able 745 * to handle well enough. 746 * 747 * In all cases dmesg will contain at least one line like this: 748 * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3' 749 * followed by a lot of nouveau timeouts. 750 * 751 * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not 752 * documented PCI config space register 0x248 of the Intel PCIe bridge 753 * controller (0x1901) in order to change the state of the PCIe link between 754 * the PCIe port and the GPU. There are alternative code paths using other 755 * registers, which seem to work fine (executed pre Windows 8): 756 * - 0xbc bit 0x20 (publicly available documentation claims 'reserved') 757 * - 0xb0 bit 0x10 (link disable) 758 * Changing the conditions inside the firmware by poking into the relevant 759 * addresses does resolve the issue, but it seemed to be ACPI private memory 760 * and not any device accessible memory at all, so there is no portable way of 761 * changing the conditions. 762 * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared. 763 * 764 * The only systems where this behavior can be seen are hybrid graphics laptops 765 * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether 766 * this issue only occurs in combination with listed Intel PCIe bridge 767 * controllers and the mentioned GPUs or other devices as well. 768 * 769 * documentation on the PCIe bridge controller can be found in the 770 * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2" 771 * Section "12 PCI Express* Controller (x16) Registers" 772 */ 773 774 static void quirk_broken_nv_runpm(struct pci_dev *pdev) 775 { 776 struct drm_device *dev = pci_get_drvdata(pdev); 777 struct nouveau_drm *drm = nouveau_drm(dev); 778 struct pci_dev *bridge = pci_upstream_bridge(pdev); 779 780 if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL) 781 return; 782 783 switch (bridge->device) { 784 case 0x1901: 785 drm->old_pm_cap = pdev->pm_cap; 786 pdev->pm_cap = 0; 787 NV_INFO(drm, "Disabling PCI power management to avoid bug\n"); 788 break; 789 } 790 } 791 792 static int nouveau_drm_probe(struct pci_dev *pdev, 793 const struct pci_device_id *pent) 794 { 795 struct nvkm_device *device; 796 struct drm_device *drm_dev; 797 int ret; 798 799 if (vga_switcheroo_client_probe_defer(pdev)) 800 return -EPROBE_DEFER; 801 802 /* We need to check that the chipset is supported before booting 803 * fbdev off the hardware, as there's no way to put it back. 804 */ 805 ret = nvkm_device_pci_new(pdev, nouveau_config, "error", 806 true, false, 0, &device); 807 if (ret) 808 return ret; 809 810 nvkm_device_del(&device); 811 812 /* Remove conflicting drivers (vesafb, efifb etc). */ 813 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &driver_pci); 814 if (ret) 815 return ret; 816 817 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, 818 true, true, ~0ULL, &device); 819 if (ret) 820 return ret; 821 822 pci_set_master(pdev); 823 824 if (nouveau_atomic) 825 driver_pci.driver_features |= DRIVER_ATOMIC; 826 827 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev); 828 if (IS_ERR(drm_dev)) { 829 ret = PTR_ERR(drm_dev); 830 goto fail_nvkm; 831 } 832 833 ret = pci_enable_device(pdev); 834 if (ret) 835 goto fail_drm; 836 837 pci_set_drvdata(pdev, drm_dev); 838 839 ret = nouveau_drm_device_init(drm_dev); 840 if (ret) 841 goto fail_pci; 842 843 ret = drm_dev_register(drm_dev, pent->driver_data); 844 if (ret) 845 goto fail_drm_dev_init; 846 847 if (nouveau_drm(drm_dev)->client.device.info.ram_size <= 32 * 1024 * 1024) 848 drm_fbdev_generic_setup(drm_dev, 8); 849 else 850 drm_fbdev_generic_setup(drm_dev, 32); 851 852 quirk_broken_nv_runpm(pdev); 853 return 0; 854 855 fail_drm_dev_init: 856 nouveau_drm_device_fini(drm_dev); 857 fail_pci: 858 pci_disable_device(pdev); 859 fail_drm: 860 drm_dev_put(drm_dev); 861 fail_nvkm: 862 nvkm_device_del(&device); 863 return ret; 864 } 865 866 void 867 nouveau_drm_device_remove(struct drm_device *dev) 868 { 869 struct nouveau_drm *drm = nouveau_drm(dev); 870 struct nvkm_client *client; 871 struct nvkm_device *device; 872 873 drm_dev_unplug(dev); 874 875 client = nvxx_client(&drm->client.base); 876 device = nvkm_device_find(client->device); 877 878 nouveau_drm_device_fini(dev); 879 drm_dev_put(dev); 880 nvkm_device_del(&device); 881 } 882 883 static void 884 nouveau_drm_remove(struct pci_dev *pdev) 885 { 886 struct drm_device *dev = pci_get_drvdata(pdev); 887 struct nouveau_drm *drm = nouveau_drm(dev); 888 889 /* revert our workaround */ 890 if (drm->old_pm_cap) 891 pdev->pm_cap = drm->old_pm_cap; 892 nouveau_drm_device_remove(dev); 893 pci_disable_device(pdev); 894 } 895 896 static int 897 nouveau_do_suspend(struct drm_device *dev, bool runtime) 898 { 899 struct nouveau_drm *drm = nouveau_drm(dev); 900 struct ttm_resource_manager *man; 901 int ret; 902 903 nouveau_svm_suspend(drm); 904 nouveau_dmem_suspend(drm); 905 nouveau_led_suspend(dev); 906 907 if (dev->mode_config.num_crtc) { 908 NV_DEBUG(drm, "suspending display...\n"); 909 ret = nouveau_display_suspend(dev, runtime); 910 if (ret) 911 return ret; 912 } 913 914 NV_DEBUG(drm, "evicting buffers...\n"); 915 916 man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_VRAM); 917 ttm_resource_manager_evict_all(&drm->ttm.bdev, man); 918 919 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n"); 920 if (drm->cechan) { 921 ret = nouveau_channel_idle(drm->cechan); 922 if (ret) 923 goto fail_display; 924 } 925 926 if (drm->channel) { 927 ret = nouveau_channel_idle(drm->channel); 928 if (ret) 929 goto fail_display; 930 } 931 932 NV_DEBUG(drm, "suspending fence...\n"); 933 if (drm->fence && nouveau_fence(drm)->suspend) { 934 if (!nouveau_fence(drm)->suspend(drm)) { 935 ret = -ENOMEM; 936 goto fail_display; 937 } 938 } 939 940 NV_DEBUG(drm, "suspending object tree...\n"); 941 ret = nvif_client_suspend(&drm->master.base); 942 if (ret) 943 goto fail_client; 944 945 return 0; 946 947 fail_client: 948 if (drm->fence && nouveau_fence(drm)->resume) 949 nouveau_fence(drm)->resume(drm); 950 951 fail_display: 952 if (dev->mode_config.num_crtc) { 953 NV_DEBUG(drm, "resuming display...\n"); 954 nouveau_display_resume(dev, runtime); 955 } 956 return ret; 957 } 958 959 static int 960 nouveau_do_resume(struct drm_device *dev, bool runtime) 961 { 962 int ret = 0; 963 struct nouveau_drm *drm = nouveau_drm(dev); 964 965 NV_DEBUG(drm, "resuming object tree...\n"); 966 ret = nvif_client_resume(&drm->master.base); 967 if (ret) { 968 NV_ERROR(drm, "Client resume failed with error: %d\n", ret); 969 return ret; 970 } 971 972 NV_DEBUG(drm, "resuming fence...\n"); 973 if (drm->fence && nouveau_fence(drm)->resume) 974 nouveau_fence(drm)->resume(drm); 975 976 nouveau_run_vbios_init(dev); 977 978 if (dev->mode_config.num_crtc) { 979 NV_DEBUG(drm, "resuming display...\n"); 980 nouveau_display_resume(dev, runtime); 981 } 982 983 nouveau_led_resume(dev); 984 nouveau_dmem_resume(drm); 985 nouveau_svm_resume(drm); 986 return 0; 987 } 988 989 int 990 nouveau_pmops_suspend(struct device *dev) 991 { 992 struct pci_dev *pdev = to_pci_dev(dev); 993 struct drm_device *drm_dev = pci_get_drvdata(pdev); 994 int ret; 995 996 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 997 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 998 return 0; 999 1000 ret = nouveau_do_suspend(drm_dev, false); 1001 if (ret) 1002 return ret; 1003 1004 pci_save_state(pdev); 1005 pci_disable_device(pdev); 1006 pci_set_power_state(pdev, PCI_D3hot); 1007 udelay(200); 1008 return 0; 1009 } 1010 1011 int 1012 nouveau_pmops_resume(struct device *dev) 1013 { 1014 struct pci_dev *pdev = to_pci_dev(dev); 1015 struct drm_device *drm_dev = pci_get_drvdata(pdev); 1016 int ret; 1017 1018 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 1019 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 1020 return 0; 1021 1022 pci_set_power_state(pdev, PCI_D0); 1023 pci_restore_state(pdev); 1024 ret = pci_enable_device(pdev); 1025 if (ret) 1026 return ret; 1027 pci_set_master(pdev); 1028 1029 ret = nouveau_do_resume(drm_dev, false); 1030 1031 /* Monitors may have been connected / disconnected during suspend */ 1032 nouveau_display_hpd_resume(drm_dev); 1033 1034 return ret; 1035 } 1036 1037 static int 1038 nouveau_pmops_freeze(struct device *dev) 1039 { 1040 struct pci_dev *pdev = to_pci_dev(dev); 1041 struct drm_device *drm_dev = pci_get_drvdata(pdev); 1042 return nouveau_do_suspend(drm_dev, false); 1043 } 1044 1045 static int 1046 nouveau_pmops_thaw(struct device *dev) 1047 { 1048 struct pci_dev *pdev = to_pci_dev(dev); 1049 struct drm_device *drm_dev = pci_get_drvdata(pdev); 1050 return nouveau_do_resume(drm_dev, false); 1051 } 1052 1053 bool 1054 nouveau_pmops_runtime(void) 1055 { 1056 if (nouveau_runtime_pm == -1) 1057 return nouveau_is_optimus() || nouveau_is_v1_dsm(); 1058 return nouveau_runtime_pm == 1; 1059 } 1060 1061 static int 1062 nouveau_pmops_runtime_suspend(struct device *dev) 1063 { 1064 struct pci_dev *pdev = to_pci_dev(dev); 1065 struct drm_device *drm_dev = pci_get_drvdata(pdev); 1066 int ret; 1067 1068 if (!nouveau_pmops_runtime()) { 1069 pm_runtime_forbid(dev); 1070 return -EBUSY; 1071 } 1072 1073 nouveau_switcheroo_optimus_dsm(); 1074 ret = nouveau_do_suspend(drm_dev, true); 1075 pci_save_state(pdev); 1076 pci_disable_device(pdev); 1077 pci_ignore_hotplug(pdev); 1078 pci_set_power_state(pdev, PCI_D3cold); 1079 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 1080 return ret; 1081 } 1082 1083 static int 1084 nouveau_pmops_runtime_resume(struct device *dev) 1085 { 1086 struct pci_dev *pdev = to_pci_dev(dev); 1087 struct drm_device *drm_dev = pci_get_drvdata(pdev); 1088 struct nouveau_drm *drm = nouveau_drm(drm_dev); 1089 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device; 1090 int ret; 1091 1092 if (!nouveau_pmops_runtime()) { 1093 pm_runtime_forbid(dev); 1094 return -EBUSY; 1095 } 1096 1097 pci_set_power_state(pdev, PCI_D0); 1098 pci_restore_state(pdev); 1099 ret = pci_enable_device(pdev); 1100 if (ret) 1101 return ret; 1102 pci_set_master(pdev); 1103 1104 ret = nouveau_do_resume(drm_dev, true); 1105 if (ret) { 1106 NV_ERROR(drm, "resume failed with: %d\n", ret); 1107 return ret; 1108 } 1109 1110 /* do magic */ 1111 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); 1112 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 1113 1114 /* Monitors may have been connected / disconnected during suspend */ 1115 nouveau_display_hpd_resume(drm_dev); 1116 1117 return ret; 1118 } 1119 1120 static int 1121 nouveau_pmops_runtime_idle(struct device *dev) 1122 { 1123 if (!nouveau_pmops_runtime()) { 1124 pm_runtime_forbid(dev); 1125 return -EBUSY; 1126 } 1127 1128 pm_runtime_mark_last_busy(dev); 1129 pm_runtime_autosuspend(dev); 1130 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 1131 return 1; 1132 } 1133 1134 static int 1135 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) 1136 { 1137 struct nouveau_drm *drm = nouveau_drm(dev); 1138 struct nouveau_cli *cli; 1139 char name[32], tmpname[TASK_COMM_LEN]; 1140 int ret; 1141 1142 /* need to bring up power immediately if opening device */ 1143 ret = pm_runtime_get_sync(dev->dev); 1144 if (ret < 0 && ret != -EACCES) { 1145 pm_runtime_put_autosuspend(dev->dev); 1146 return ret; 1147 } 1148 1149 get_task_comm(tmpname, current); 1150 rcu_read_lock(); 1151 snprintf(name, sizeof(name), "%s[%d]", 1152 tmpname, pid_nr(rcu_dereference(fpriv->pid))); 1153 rcu_read_unlock(); 1154 1155 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) { 1156 ret = -ENOMEM; 1157 goto done; 1158 } 1159 1160 ret = nouveau_cli_init(drm, name, cli); 1161 if (ret) 1162 goto done; 1163 1164 fpriv->driver_priv = cli; 1165 1166 mutex_lock(&drm->clients_lock); 1167 list_add(&cli->head, &drm->clients); 1168 mutex_unlock(&drm->clients_lock); 1169 1170 done: 1171 if (ret && cli) { 1172 nouveau_cli_fini(cli); 1173 kfree(cli); 1174 } 1175 1176 pm_runtime_mark_last_busy(dev->dev); 1177 pm_runtime_put_autosuspend(dev->dev); 1178 return ret; 1179 } 1180 1181 static void 1182 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) 1183 { 1184 struct nouveau_cli *cli = nouveau_cli(fpriv); 1185 struct nouveau_drm *drm = nouveau_drm(dev); 1186 int dev_index; 1187 1188 /* 1189 * The device is gone, and as it currently stands all clients are 1190 * cleaned up in the removal codepath. In the future this may change 1191 * so that we can support hot-unplugging, but for now we immediately 1192 * return to avoid a double-free situation. 1193 */ 1194 if (!drm_dev_enter(dev, &dev_index)) 1195 return; 1196 1197 pm_runtime_get_sync(dev->dev); 1198 1199 mutex_lock(&cli->mutex); 1200 if (cli->abi16) 1201 nouveau_abi16_fini(cli->abi16); 1202 mutex_unlock(&cli->mutex); 1203 1204 mutex_lock(&drm->clients_lock); 1205 list_del(&cli->head); 1206 mutex_unlock(&drm->clients_lock); 1207 1208 nouveau_cli_fini(cli); 1209 kfree(cli); 1210 pm_runtime_mark_last_busy(dev->dev); 1211 pm_runtime_put_autosuspend(dev->dev); 1212 drm_dev_exit(dev_index); 1213 } 1214 1215 static const struct drm_ioctl_desc 1216 nouveau_ioctls[] = { 1217 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW), 1218 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 1219 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW), 1220 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW), 1221 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW), 1222 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW), 1223 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW), 1224 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW), 1225 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW), 1226 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW), 1227 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW), 1228 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW), 1229 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW), 1230 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW), 1231 DRM_IOCTL_DEF_DRV(NOUVEAU_VM_INIT, nouveau_uvmm_ioctl_vm_init, DRM_RENDER_ALLOW), 1232 DRM_IOCTL_DEF_DRV(NOUVEAU_VM_BIND, nouveau_uvmm_ioctl_vm_bind, DRM_RENDER_ALLOW), 1233 DRM_IOCTL_DEF_DRV(NOUVEAU_EXEC, nouveau_exec_ioctl_exec, DRM_RENDER_ALLOW), 1234 }; 1235 1236 long 1237 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 1238 { 1239 struct drm_file *filp = file->private_data; 1240 struct drm_device *dev = filp->minor->dev; 1241 long ret; 1242 1243 ret = pm_runtime_get_sync(dev->dev); 1244 if (ret < 0 && ret != -EACCES) { 1245 pm_runtime_put_autosuspend(dev->dev); 1246 return ret; 1247 } 1248 1249 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { 1250 case DRM_NOUVEAU_NVIF: 1251 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); 1252 break; 1253 default: 1254 ret = drm_ioctl(file, cmd, arg); 1255 break; 1256 } 1257 1258 pm_runtime_mark_last_busy(dev->dev); 1259 pm_runtime_put_autosuspend(dev->dev); 1260 return ret; 1261 } 1262 1263 static const struct file_operations 1264 nouveau_driver_fops = { 1265 .owner = THIS_MODULE, 1266 .open = drm_open, 1267 .release = drm_release, 1268 .unlocked_ioctl = nouveau_drm_ioctl, 1269 .mmap = drm_gem_mmap, 1270 .poll = drm_poll, 1271 .read = drm_read, 1272 #if defined(CONFIG_COMPAT) 1273 .compat_ioctl = nouveau_compat_ioctl, 1274 #endif 1275 .llseek = noop_llseek, 1276 }; 1277 1278 static struct drm_driver 1279 driver_stub = { 1280 .driver_features = DRIVER_GEM | 1281 DRIVER_SYNCOBJ | DRIVER_SYNCOBJ_TIMELINE | 1282 DRIVER_GEM_GPUVA | 1283 DRIVER_MODESET | 1284 DRIVER_RENDER, 1285 .open = nouveau_drm_open, 1286 .postclose = nouveau_drm_postclose, 1287 .lastclose = nouveau_vga_lastclose, 1288 1289 #if defined(CONFIG_DEBUG_FS) 1290 .debugfs_init = nouveau_drm_debugfs_init, 1291 #endif 1292 1293 .ioctls = nouveau_ioctls, 1294 .num_ioctls = ARRAY_SIZE(nouveau_ioctls), 1295 .fops = &nouveau_driver_fops, 1296 1297 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, 1298 1299 .dumb_create = nouveau_display_dumb_create, 1300 .dumb_map_offset = drm_gem_ttm_dumb_map_offset, 1301 1302 .name = DRIVER_NAME, 1303 .desc = DRIVER_DESC, 1304 #ifdef GIT_REVISION 1305 .date = GIT_REVISION, 1306 #else 1307 .date = DRIVER_DATE, 1308 #endif 1309 .major = DRIVER_MAJOR, 1310 .minor = DRIVER_MINOR, 1311 .patchlevel = DRIVER_PATCHLEVEL, 1312 }; 1313 1314 static struct pci_device_id 1315 nouveau_drm_pci_table[] = { 1316 { 1317 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), 1318 .class = PCI_BASE_CLASS_DISPLAY << 16, 1319 .class_mask = 0xff << 16, 1320 }, 1321 { 1322 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), 1323 .class = PCI_BASE_CLASS_DISPLAY << 16, 1324 .class_mask = 0xff << 16, 1325 }, 1326 {} 1327 }; 1328 1329 static void nouveau_display_options(void) 1330 { 1331 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); 1332 1333 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); 1334 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); 1335 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); 1336 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); 1337 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); 1338 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); 1339 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); 1340 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); 1341 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); 1342 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz); 1343 } 1344 1345 static const struct dev_pm_ops nouveau_pm_ops = { 1346 .suspend = nouveau_pmops_suspend, 1347 .resume = nouveau_pmops_resume, 1348 .freeze = nouveau_pmops_freeze, 1349 .thaw = nouveau_pmops_thaw, 1350 .poweroff = nouveau_pmops_freeze, 1351 .restore = nouveau_pmops_resume, 1352 .runtime_suspend = nouveau_pmops_runtime_suspend, 1353 .runtime_resume = nouveau_pmops_runtime_resume, 1354 .runtime_idle = nouveau_pmops_runtime_idle, 1355 }; 1356 1357 static struct pci_driver 1358 nouveau_drm_pci_driver = { 1359 .name = "nouveau", 1360 .id_table = nouveau_drm_pci_table, 1361 .probe = nouveau_drm_probe, 1362 .remove = nouveau_drm_remove, 1363 .driver.pm = &nouveau_pm_ops, 1364 }; 1365 1366 struct drm_device * 1367 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, 1368 struct platform_device *pdev, 1369 struct nvkm_device **pdevice) 1370 { 1371 struct drm_device *drm; 1372 int err; 1373 1374 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, 1375 true, true, ~0ULL, pdevice); 1376 if (err) 1377 goto err_free; 1378 1379 drm = drm_dev_alloc(&driver_platform, &pdev->dev); 1380 if (IS_ERR(drm)) { 1381 err = PTR_ERR(drm); 1382 goto err_free; 1383 } 1384 1385 err = nouveau_drm_device_init(drm); 1386 if (err) 1387 goto err_put; 1388 1389 platform_set_drvdata(pdev, drm); 1390 1391 return drm; 1392 1393 err_put: 1394 drm_dev_put(drm); 1395 err_free: 1396 nvkm_device_del(pdevice); 1397 1398 return ERR_PTR(err); 1399 } 1400 1401 static int __init 1402 nouveau_drm_init(void) 1403 { 1404 driver_pci = driver_stub; 1405 driver_platform = driver_stub; 1406 1407 nouveau_display_options(); 1408 1409 if (nouveau_modeset == -1) { 1410 if (drm_firmware_drivers_only()) 1411 nouveau_modeset = 0; 1412 } 1413 1414 if (!nouveau_modeset) 1415 return 0; 1416 1417 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1418 platform_driver_register(&nouveau_platform_driver); 1419 #endif 1420 1421 nouveau_register_dsm_handler(); 1422 nouveau_backlight_ctor(); 1423 1424 #ifdef CONFIG_PCI 1425 return pci_register_driver(&nouveau_drm_pci_driver); 1426 #else 1427 return 0; 1428 #endif 1429 } 1430 1431 static void __exit 1432 nouveau_drm_exit(void) 1433 { 1434 if (!nouveau_modeset) 1435 return; 1436 1437 #ifdef CONFIG_PCI 1438 pci_unregister_driver(&nouveau_drm_pci_driver); 1439 #endif 1440 nouveau_backlight_dtor(); 1441 nouveau_unregister_dsm_handler(); 1442 1443 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1444 platform_driver_unregister(&nouveau_platform_driver); 1445 #endif 1446 if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM)) 1447 mmu_notifier_synchronize(); 1448 } 1449 1450 module_init(nouveau_drm_init); 1451 module_exit(nouveau_drm_exit); 1452 1453 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); 1454 MODULE_AUTHOR(DRIVER_AUTHOR); 1455 MODULE_DESCRIPTION(DRIVER_DESC); 1456 MODULE_LICENSE("GPL and additional rights"); 1457