1 /* 2 * Copyright (C) 2007 Ben Skeggs. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 * 25 */ 26 27 #ifndef __NOUVEAU_DMA_H__ 28 #define __NOUVEAU_DMA_H__ 29 30 #include "nouveau_bo.h" 31 #include "nouveau_chan.h" 32 33 int nouveau_dma_wait(struct nouveau_channel *, int size); 34 35 /* 36 * There's a hw race condition where you can't jump to your PUT offset, 37 * to avoid this we jump to offset + SKIPS and fill the difference with 38 * NOPs. 39 * 40 * xf86-video-nv configures the DMA fetch size to 32 bytes, and uses 41 * a SKIPS value of 8. Lets assume that the race condition is to do 42 * with writing into the fetch area, we configure a fetch size of 128 43 * bytes so we need a larger SKIPS value. 44 */ 45 #define NOUVEAU_DMA_SKIPS (128 / 4) 46 47 /* Maximum push buffer size. */ 48 #define NV50_DMA_PUSH_MAX_LENGTH 0x7fffff 49 50 /* Maximum IBs per ring. */ 51 #define NV50_DMA_IB_MAX ((0x02000 / 8) - 1) 52 53 /* Object handles - for stuff that's doesn't use handle == oclass. */ 54 enum { 55 NvDmaFB = 0x80000002, 56 NvDmaTT = 0x80000003, 57 NvNotify0 = 0x80000006, 58 NvSema = 0x8000000f, 59 NvEvoSema0 = 0x80000010, 60 NvEvoSema1 = 0x80000011, 61 }; 62 63 static __must_check inline int 64 RING_SPACE(struct nouveau_channel *chan, int size) 65 { 66 int ret; 67 68 ret = nouveau_dma_wait(chan, size); 69 if (ret) 70 return ret; 71 72 chan->dma.free -= size; 73 return 0; 74 } 75 76 static inline void 77 OUT_RING(struct nouveau_channel *chan, int data) 78 { 79 nouveau_bo_wr32(chan->push.buffer, chan->dma.cur++, data); 80 } 81 82 #define WRITE_PUT(val) do { \ 83 mb(); \ 84 nouveau_bo_rd32(chan->push.buffer, 0); \ 85 nvif_wr32(&chan->user, chan->user_put, ((val) << 2) + chan->push.addr);\ 86 } while (0) 87 88 static inline void 89 FIRE_RING(struct nouveau_channel *chan) 90 { 91 if (chan->dma.cur == chan->dma.put) 92 return; 93 chan->accel_done = true; 94 95 WRITE_PUT(chan->dma.cur); 96 97 chan->dma.put = chan->dma.cur; 98 } 99 100 static inline void 101 WIND_RING(struct nouveau_channel *chan) 102 { 103 chan->dma.cur = chan->dma.put; 104 } 105 106 /* NV_SW object class */ 107 #define NV_SW_DMA_VBLSEM 0x0000018c 108 #define NV_SW_VBLSEM_OFFSET 0x00000400 109 #define NV_SW_VBLSEM_RELEASE_VALUE 0x00000404 110 #define NV_SW_VBLSEM_RELEASE 0x00000408 111 #define NV_SW_PAGE_FLIP 0x00000500 112 113 #endif 114