xref: /linux/drivers/gpu/drm/nouveau/nouveau_bo85b5.c (revision 55d0969c451159cff86949b38c39171cab962069)
1 /*
2  * Copyright 2007 Dave Airlied
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  */
24 /*
25  * Authors: Dave Airlied <airlied@linux.ie>
26  *	    Ben Skeggs   <darktama@iinet.net.au>
27  *	    Jeremy Kolb  <jkolb@brandeis.edu>
28  */
29 #include "nouveau_bo.h"
30 #include "nouveau_dma.h"
31 #include "nouveau_mem.h"
32 
33 #include <nvif/push206e.h>
34 
35 /*XXX: Fixup class to be compatible with NVIDIA's, which will allow sharing
36  *     code with KeplerDmaCopyA.
37  */
38 
39 int
40 nva3_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
41 		  struct ttm_resource *old_reg, struct ttm_resource *new_reg)
42 {
43 	struct nouveau_mem *mem = nouveau_mem(old_reg);
44 	struct nvif_push *push = &chan->chan.push;
45 	u64 src_offset = mem->vma[0].addr;
46 	u64 dst_offset = mem->vma[1].addr;
47 	u32 page_count = PFN_UP(new_reg->size);
48 	int ret;
49 
50 	page_count = PFN_UP(new_reg->size);
51 	while (page_count) {
52 		int line_count = (page_count > 8191) ? 8191 : page_count;
53 
54 		ret = PUSH_WAIT(push, 11);
55 		if (ret)
56 			return ret;
57 
58 		PUSH_NVSQ(push, NV85B5, 0x030c, upper_32_bits(src_offset),
59 					0x0310, lower_32_bits(src_offset),
60 					0x0314, upper_32_bits(dst_offset),
61 					0x0318, lower_32_bits(dst_offset),
62 					0x031c, PAGE_SIZE,
63 					0x0320, PAGE_SIZE,
64 					0x0324, PAGE_SIZE,
65 					0x0328, line_count);
66 		PUSH_NVSQ(push, NV85B5, 0x0300, 0x00000110);
67 
68 		page_count -= line_count;
69 		src_offset += (PAGE_SIZE * line_count);
70 		dst_offset += (PAGE_SIZE * line_count);
71 	}
72 
73 	return 0;
74 }
75