1 /* 2 * Copyright 2005-2006 Erik Waling 3 * Copyright 2006 Stephane Marchesin 4 * Copyright 2007-2009 Stuart Bennett 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 20 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF 21 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 25 #include <drm/drmP.h> 26 27 #include "nouveau_drv.h" 28 #include "nouveau_reg.h" 29 #include "dispnv04/hw.h" 30 #include "nouveau_encoder.h" 31 32 #include <linux/io-mapping.h> 33 #include <linux/firmware.h> 34 35 /* these defines are made up */ 36 #define NV_CIO_CRE_44_HEADA 0x0 37 #define NV_CIO_CRE_44_HEADB 0x3 38 #define FEATURE_MOBILE 0x10 /* also FEATURE_QUADRO for BMP */ 39 40 #define EDID1_LEN 128 41 42 #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg) 43 #define LOG_OLD_VALUE(x) 44 45 struct init_exec { 46 bool execute; 47 bool repeat; 48 }; 49 50 static bool nv_cksum(const uint8_t *data, unsigned int length) 51 { 52 /* 53 * There's a few checksums in the BIOS, so here's a generic checking 54 * function. 55 */ 56 int i; 57 uint8_t sum = 0; 58 59 for (i = 0; i < length; i++) 60 sum += data[i]; 61 62 if (sum) 63 return true; 64 65 return false; 66 } 67 68 static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk) 69 { 70 int compare_record_len, i = 0; 71 uint16_t compareclk, scriptptr = 0; 72 73 if (bios->major_version < 5) /* pre BIT */ 74 compare_record_len = 3; 75 else 76 compare_record_len = 4; 77 78 do { 79 compareclk = ROM16(bios->data[clktable + compare_record_len * i]); 80 if (pxclk >= compareclk * 10) { 81 if (bios->major_version < 5) { 82 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i]; 83 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]); 84 } else 85 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]); 86 break; 87 } 88 i++; 89 } while (compareclk); 90 91 return scriptptr; 92 } 93 94 static void 95 run_digital_op_script(struct drm_device *dev, uint16_t scriptptr, 96 struct dcb_output *dcbent, int head, bool dl) 97 { 98 struct nouveau_drm *drm = nouveau_drm(dev); 99 100 NV_INFO(drm, "0x%04X: Parsing digital output script table\n", 101 scriptptr); 102 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_44, head ? NV_CIO_CRE_44_HEADB : 103 NV_CIO_CRE_44_HEADA); 104 nouveau_bios_run_init_table(dev, scriptptr, dcbent, head); 105 106 nv04_dfp_bind_head(dev, dcbent, head, dl); 107 } 108 109 static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script) 110 { 111 struct nouveau_drm *drm = nouveau_drm(dev); 112 struct nvbios *bios = &drm->vbios; 113 uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0); 114 uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]); 115 116 if (!bios->fp.xlated_entry || !sub || !scriptofs) 117 return -EINVAL; 118 119 run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link); 120 121 if (script == LVDS_PANEL_OFF) { 122 /* off-on delay in ms */ 123 mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7])); 124 } 125 #ifdef __powerpc__ 126 /* Powerbook specific quirks */ 127 if (script == LVDS_RESET && 128 (dev->pdev->device == 0x0179 || dev->pdev->device == 0x0189 || 129 dev->pdev->device == 0x0329)) 130 nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72); 131 #endif 132 133 return 0; 134 } 135 136 static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk) 137 { 138 /* 139 * The BIT LVDS table's header has the information to setup the 140 * necessary registers. Following the standard 4 byte header are: 141 * A bitmask byte and a dual-link transition pxclk value for use in 142 * selecting the init script when not using straps; 4 script pointers 143 * for panel power, selected by output and on/off; and 8 table pointers 144 * for panel init, the needed one determined by output, and bits in the 145 * conf byte. These tables are similar to the TMDS tables, consisting 146 * of a list of pxclks and script pointers. 147 */ 148 struct nouveau_drm *drm = nouveau_drm(dev); 149 struct nvbios *bios = &drm->vbios; 150 unsigned int outputset = (dcbent->or == 4) ? 1 : 0; 151 uint16_t scriptptr = 0, clktable; 152 153 /* 154 * For now we assume version 3.0 table - g80 support will need some 155 * changes 156 */ 157 158 switch (script) { 159 case LVDS_INIT: 160 return -ENOSYS; 161 case LVDS_BACKLIGHT_ON: 162 case LVDS_PANEL_ON: 163 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]); 164 break; 165 case LVDS_BACKLIGHT_OFF: 166 case LVDS_PANEL_OFF: 167 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]); 168 break; 169 case LVDS_RESET: 170 clktable = bios->fp.lvdsmanufacturerpointer + 15; 171 if (dcbent->or == 4) 172 clktable += 8; 173 174 if (dcbent->lvdsconf.use_straps_for_mode) { 175 if (bios->fp.dual_link) 176 clktable += 4; 177 if (bios->fp.if_is_24bit) 178 clktable += 2; 179 } else { 180 /* using EDID */ 181 int cmpval_24bit = (dcbent->or == 4) ? 4 : 1; 182 183 if (bios->fp.dual_link) { 184 clktable += 4; 185 cmpval_24bit <<= 1; 186 } 187 188 if (bios->fp.strapless_is_24bit & cmpval_24bit) 189 clktable += 2; 190 } 191 192 clktable = ROM16(bios->data[clktable]); 193 if (!clktable) { 194 NV_ERROR(drm, "Pixel clock comparison table not found\n"); 195 return -ENOENT; 196 } 197 scriptptr = clkcmptable(bios, clktable, pxclk); 198 } 199 200 if (!scriptptr) { 201 NV_ERROR(drm, "LVDS output init script not found\n"); 202 return -ENOENT; 203 } 204 run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link); 205 206 return 0; 207 } 208 209 int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk) 210 { 211 /* 212 * LVDS operations are multiplexed in an effort to present a single API 213 * which works with two vastly differing underlying structures. 214 * This acts as the demux 215 */ 216 217 struct nouveau_drm *drm = nouveau_drm(dev); 218 struct nvif_object *device = &drm->client.device.object; 219 struct nvbios *bios = &drm->vbios; 220 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; 221 uint32_t sel_clk_binding, sel_clk; 222 int ret; 223 224 if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver || 225 (lvds_ver >= 0x30 && script == LVDS_INIT)) 226 return 0; 227 228 if (!bios->fp.lvds_init_run) { 229 bios->fp.lvds_init_run = true; 230 call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk); 231 } 232 233 if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change) 234 call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk); 235 if (script == LVDS_RESET && bios->fp.power_off_for_reset) 236 call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk); 237 238 NV_INFO(drm, "Calling LVDS script %d:\n", script); 239 240 /* don't let script change pll->head binding */ 241 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000; 242 243 if (lvds_ver < 0x30) 244 ret = call_lvds_manufacturer_script(dev, dcbent, head, script); 245 else 246 ret = run_lvds_table(dev, dcbent, head, script, pxclk); 247 248 bios->fp.last_script_invoc = (script << 1 | head); 249 250 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; 251 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding); 252 /* some scripts set a value in NV_PBUS_POWERCTRL_2 and break video overlay */ 253 nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0); 254 255 return ret; 256 } 257 258 struct lvdstableheader { 259 uint8_t lvds_ver, headerlen, recordlen; 260 }; 261 262 static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth) 263 { 264 /* 265 * BMP version (0xa) LVDS table has a simple header of version and 266 * record length. The BIT LVDS table has the typical BIT table header: 267 * version byte, header length byte, record length byte, and a byte for 268 * the maximum number of records that can be held in the table. 269 */ 270 271 struct nouveau_drm *drm = nouveau_drm(dev); 272 uint8_t lvds_ver, headerlen, recordlen; 273 274 memset(lth, 0, sizeof(struct lvdstableheader)); 275 276 if (bios->fp.lvdsmanufacturerpointer == 0x0) { 277 NV_ERROR(drm, "Pointer to LVDS manufacturer table invalid\n"); 278 return -EINVAL; 279 } 280 281 lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; 282 283 switch (lvds_ver) { 284 case 0x0a: /* pre NV40 */ 285 headerlen = 2; 286 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 287 break; 288 case 0x30: /* NV4x */ 289 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 290 if (headerlen < 0x1f) { 291 NV_ERROR(drm, "LVDS table header not understood\n"); 292 return -EINVAL; 293 } 294 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2]; 295 break; 296 case 0x40: /* G80/G90 */ 297 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 298 if (headerlen < 0x7) { 299 NV_ERROR(drm, "LVDS table header not understood\n"); 300 return -EINVAL; 301 } 302 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2]; 303 break; 304 default: 305 NV_ERROR(drm, 306 "LVDS table revision %d.%d not currently supported\n", 307 lvds_ver >> 4, lvds_ver & 0xf); 308 return -ENOSYS; 309 } 310 311 lth->lvds_ver = lvds_ver; 312 lth->headerlen = headerlen; 313 lth->recordlen = recordlen; 314 315 return 0; 316 } 317 318 static int 319 get_fp_strap(struct drm_device *dev, struct nvbios *bios) 320 { 321 struct nouveau_drm *drm = nouveau_drm(dev); 322 struct nvif_object *device = &drm->client.device.object; 323 324 /* 325 * The fp strap is normally dictated by the "User Strap" in 326 * PEXTDEV_BOOT_0[20:16], but on BMP cards when bit 2 of the 327 * Internal_Flags struct at 0x48 is set, the user strap gets overriden 328 * by the PCI subsystem ID during POST, but not before the previous user 329 * strap has been committed to CR58 for CR57=0xf on head A, which may be 330 * read and used instead 331 */ 332 333 if (bios->major_version < 5 && bios->data[0x48] & 0x4) 334 return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf; 335 336 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_MAXWELL) 337 return nvif_rd32(device, 0x001800) & 0x0000000f; 338 else 339 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) 340 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf; 341 else 342 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf; 343 } 344 345 static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios) 346 { 347 struct nouveau_drm *drm = nouveau_drm(dev); 348 uint8_t *fptable; 349 uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex; 350 int ret, ofs, fpstrapping; 351 struct lvdstableheader lth; 352 353 if (bios->fp.fptablepointer == 0x0) { 354 /* Most laptop cards lack an fp table. They use DDC. */ 355 NV_DEBUG(drm, "Pointer to flat panel table invalid\n"); 356 bios->digital_min_front_porch = 0x4b; 357 return 0; 358 } 359 360 fptable = &bios->data[bios->fp.fptablepointer]; 361 fptable_ver = fptable[0]; 362 363 switch (fptable_ver) { 364 /* 365 * BMP version 0x5.0x11 BIOSen have version 1 like tables, but no 366 * version field, and miss one of the spread spectrum/PWM bytes. 367 * This could affect early GF2Go parts (not seen any appropriate ROMs 368 * though). Here we assume that a version of 0x05 matches this case 369 * (combining with a BMP version check would be better), as the 370 * common case for the panel type field is 0x0005, and that is in 371 * fact what we are reading the first byte of. 372 */ 373 case 0x05: /* some NV10, 11, 15, 16 */ 374 recordlen = 42; 375 ofs = -1; 376 break; 377 case 0x10: /* some NV15/16, and NV11+ */ 378 recordlen = 44; 379 ofs = 0; 380 break; 381 case 0x20: /* NV40+ */ 382 headerlen = fptable[1]; 383 recordlen = fptable[2]; 384 fpentries = fptable[3]; 385 /* 386 * fptable[4] is the minimum 387 * RAMDAC_FP_HCRTC -> RAMDAC_FP_HSYNC_START gap 388 */ 389 bios->digital_min_front_porch = fptable[4]; 390 ofs = -7; 391 break; 392 default: 393 NV_ERROR(drm, 394 "FP table revision %d.%d not currently supported\n", 395 fptable_ver >> 4, fptable_ver & 0xf); 396 return -ENOSYS; 397 } 398 399 if (!bios->is_mobile) /* !mobile only needs digital_min_front_porch */ 400 return 0; 401 402 ret = parse_lvds_manufacturer_table_header(dev, bios, <h); 403 if (ret) 404 return ret; 405 406 if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) { 407 bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer + 408 lth.headerlen + 1; 409 bios->fp.xlatwidth = lth.recordlen; 410 } 411 if (bios->fp.fpxlatetableptr == 0x0) { 412 NV_ERROR(drm, "Pointer to flat panel xlat table invalid\n"); 413 return -EINVAL; 414 } 415 416 fpstrapping = get_fp_strap(dev, bios); 417 418 fpindex = bios->data[bios->fp.fpxlatetableptr + 419 fpstrapping * bios->fp.xlatwidth]; 420 421 if (fpindex > fpentries) { 422 NV_ERROR(drm, "Bad flat panel table index\n"); 423 return -ENOENT; 424 } 425 426 /* nv4x cards need both a strap value and fpindex of 0xf to use DDC */ 427 if (lth.lvds_ver > 0x10) 428 bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf; 429 430 /* 431 * If either the strap or xlated fpindex value are 0xf there is no 432 * panel using a strap-derived bios mode present. this condition 433 * includes, but is different from, the DDC panel indicator above 434 */ 435 if (fpstrapping == 0xf || fpindex == 0xf) 436 return 0; 437 438 bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen + 439 recordlen * fpindex + ofs; 440 441 NV_INFO(drm, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n", 442 ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1, 443 ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1, 444 ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10); 445 446 return 0; 447 } 448 449 bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode) 450 { 451 struct nouveau_drm *drm = nouveau_drm(dev); 452 struct nvbios *bios = &drm->vbios; 453 uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr]; 454 455 if (!mode) /* just checking whether we can produce a mode */ 456 return bios->fp.mode_ptr; 457 458 memset(mode, 0, sizeof(struct drm_display_mode)); 459 /* 460 * For version 1.0 (version in byte 0): 461 * bytes 1-2 are "panel type", including bits on whether Colour/mono, 462 * single/dual link, and type (TFT etc.) 463 * bytes 3-6 are bits per colour in RGBX 464 */ 465 mode->clock = ROM16(mode_entry[7]) * 10; 466 /* bytes 9-10 is HActive */ 467 mode->hdisplay = ROM16(mode_entry[11]) + 1; 468 /* 469 * bytes 13-14 is HValid Start 470 * bytes 15-16 is HValid End 471 */ 472 mode->hsync_start = ROM16(mode_entry[17]) + 1; 473 mode->hsync_end = ROM16(mode_entry[19]) + 1; 474 mode->htotal = ROM16(mode_entry[21]) + 1; 475 /* bytes 23-24, 27-30 similarly, but vertical */ 476 mode->vdisplay = ROM16(mode_entry[25]) + 1; 477 mode->vsync_start = ROM16(mode_entry[31]) + 1; 478 mode->vsync_end = ROM16(mode_entry[33]) + 1; 479 mode->vtotal = ROM16(mode_entry[35]) + 1; 480 mode->flags |= (mode_entry[37] & 0x10) ? 481 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 482 mode->flags |= (mode_entry[37] & 0x1) ? 483 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 484 /* 485 * bytes 38-39 relate to spread spectrum settings 486 * bytes 40-43 are something to do with PWM 487 */ 488 489 mode->status = MODE_OK; 490 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 491 drm_mode_set_name(mode); 492 return bios->fp.mode_ptr; 493 } 494 495 int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit) 496 { 497 /* 498 * The LVDS table header is (mostly) described in 499 * parse_lvds_manufacturer_table_header(): the BIT header additionally 500 * contains the dual-link transition pxclk (in 10s kHz), at byte 5 - if 501 * straps are not being used for the panel, this specifies the frequency 502 * at which modes should be set up in the dual link style. 503 * 504 * Following the header, the BMP (ver 0xa) table has several records, 505 * indexed by a separate xlat table, indexed in turn by the fp strap in 506 * EXTDEV_BOOT. Each record had a config byte, followed by 6 script 507 * numbers for use by INIT_SUB which controlled panel init and power, 508 * and finally a dword of ms to sleep between power off and on 509 * operations. 510 * 511 * In the BIT versions, the table following the header serves as an 512 * integrated config and xlat table: the records in the table are 513 * indexed by the FP strap nibble in EXTDEV_BOOT, and each record has 514 * two bytes - the first as a config byte, the second for indexing the 515 * fp mode table pointed to by the BIT 'D' table 516 * 517 * DDC is not used until after card init, so selecting the correct table 518 * entry and setting the dual link flag for EDID equipped panels, 519 * requiring tests against the native-mode pixel clock, cannot be done 520 * until later, when this function should be called with non-zero pxclk 521 */ 522 struct nouveau_drm *drm = nouveau_drm(dev); 523 struct nvbios *bios = &drm->vbios; 524 int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0; 525 struct lvdstableheader lth; 526 uint16_t lvdsofs; 527 int ret, chip_version = bios->chip_version; 528 529 ret = parse_lvds_manufacturer_table_header(dev, bios, <h); 530 if (ret) 531 return ret; 532 533 switch (lth.lvds_ver) { 534 case 0x0a: /* pre NV40 */ 535 lvdsmanufacturerindex = bios->data[ 536 bios->fp.fpxlatemanufacturertableptr + 537 fpstrapping]; 538 539 /* we're done if this isn't the EDID panel case */ 540 if (!pxclk) 541 break; 542 543 if (chip_version < 0x25) { 544 /* nv17 behaviour 545 * 546 * It seems the old style lvds script pointer is reused 547 * to select 18/24 bit colour depth for EDID panels. 548 */ 549 lvdsmanufacturerindex = 550 (bios->legacy.lvds_single_a_script_ptr & 1) ? 551 2 : 0; 552 if (pxclk >= bios->fp.duallink_transition_clk) 553 lvdsmanufacturerindex++; 554 } else if (chip_version < 0x30) { 555 /* nv28 behaviour (off-chip encoder) 556 * 557 * nv28 does a complex dance of first using byte 121 of 558 * the EDID to choose the lvdsmanufacturerindex, then 559 * later attempting to match the EDID manufacturer and 560 * product IDs in a table (signature 'pidt' (panel id 561 * table?)), setting an lvdsmanufacturerindex of 0 and 562 * an fp strap of the match index (or 0xf if none) 563 */ 564 lvdsmanufacturerindex = 0; 565 } else { 566 /* nv31, nv34 behaviour */ 567 lvdsmanufacturerindex = 0; 568 if (pxclk >= bios->fp.duallink_transition_clk) 569 lvdsmanufacturerindex = 2; 570 if (pxclk >= 140000) 571 lvdsmanufacturerindex = 3; 572 } 573 574 /* 575 * nvidia set the high nibble of (cr57=f, cr58) to 576 * lvdsmanufacturerindex in this case; we don't 577 */ 578 break; 579 case 0x30: /* NV4x */ 580 case 0x40: /* G80/G90 */ 581 lvdsmanufacturerindex = fpstrapping; 582 break; 583 default: 584 NV_ERROR(drm, "LVDS table revision not currently supported\n"); 585 return -ENOSYS; 586 } 587 588 lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex; 589 switch (lth.lvds_ver) { 590 case 0x0a: 591 bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1; 592 bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2; 593 bios->fp.dual_link = bios->data[lvdsofs] & 4; 594 bios->fp.link_c_increment = bios->data[lvdsofs] & 8; 595 *if_is_24bit = bios->data[lvdsofs] & 16; 596 break; 597 case 0x30: 598 case 0x40: 599 /* 600 * No sign of the "power off for reset" or "reset for panel 601 * on" bits, but it's safer to assume we should 602 */ 603 bios->fp.power_off_for_reset = true; 604 bios->fp.reset_after_pclk_change = true; 605 606 /* 607 * It's ok lvdsofs is wrong for nv4x edid case; dual_link is 608 * over-written, and if_is_24bit isn't used 609 */ 610 bios->fp.dual_link = bios->data[lvdsofs] & 1; 611 bios->fp.if_is_24bit = bios->data[lvdsofs] & 2; 612 bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4]; 613 bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10; 614 break; 615 } 616 617 /* set dual_link flag for EDID case */ 618 if (pxclk && (chip_version < 0x25 || chip_version > 0x28)) 619 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk); 620 621 *dl = bios->fp.dual_link; 622 623 return 0; 624 } 625 626 int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk) 627 { 628 /* 629 * the pxclk parameter is in kHz 630 * 631 * This runs the TMDS regs setting code found on BIT bios cards 632 * 633 * For ffs(or) == 1 use the first table, for ffs(or) == 2 and 634 * ffs(or) == 3, use the second. 635 */ 636 637 struct nouveau_drm *drm = nouveau_drm(dev); 638 struct nvif_object *device = &drm->client.device.object; 639 struct nvbios *bios = &drm->vbios; 640 int cv = bios->chip_version; 641 uint16_t clktable = 0, scriptptr; 642 uint32_t sel_clk_binding, sel_clk; 643 644 /* pre-nv17 off-chip tmds uses scripts, post nv17 doesn't */ 645 if (cv >= 0x17 && cv != 0x1a && cv != 0x20 && 646 dcbent->location != DCB_LOC_ON_CHIP) 647 return 0; 648 649 switch (ffs(dcbent->or)) { 650 case 1: 651 clktable = bios->tmds.output0_script_ptr; 652 break; 653 case 2: 654 case 3: 655 clktable = bios->tmds.output1_script_ptr; 656 break; 657 } 658 659 if (!clktable) { 660 NV_ERROR(drm, "Pixel clock comparison table not found\n"); 661 return -EINVAL; 662 } 663 664 scriptptr = clkcmptable(bios, clktable, pxclk); 665 666 if (!scriptptr) { 667 NV_ERROR(drm, "TMDS output init script not found\n"); 668 return -ENOENT; 669 } 670 671 /* don't let script change pll->head binding */ 672 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000; 673 run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000); 674 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; 675 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding); 676 677 return 0; 678 } 679 680 static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset) 681 { 682 /* 683 * Parses the init table segment for pointers used in script execution. 684 * 685 * offset + 0 (16 bits): init script tables pointer 686 * offset + 2 (16 bits): macro index table pointer 687 * offset + 4 (16 bits): macro table pointer 688 * offset + 6 (16 bits): condition table pointer 689 * offset + 8 (16 bits): io condition table pointer 690 * offset + 10 (16 bits): io flag condition table pointer 691 * offset + 12 (16 bits): init function table pointer 692 */ 693 694 bios->init_script_tbls_ptr = ROM16(bios->data[offset]); 695 } 696 697 static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 698 { 699 /* 700 * Parses the load detect values for g80 cards. 701 * 702 * offset + 0 (16 bits): loadval table pointer 703 */ 704 705 struct nouveau_drm *drm = nouveau_drm(dev); 706 uint16_t load_table_ptr; 707 uint8_t version, headerlen, entrylen, num_entries; 708 709 if (bitentry->length != 3) { 710 NV_ERROR(drm, "Do not understand BIT A table\n"); 711 return -EINVAL; 712 } 713 714 load_table_ptr = ROM16(bios->data[bitentry->offset]); 715 716 if (load_table_ptr == 0x0) { 717 NV_DEBUG(drm, "Pointer to BIT loadval table invalid\n"); 718 return -EINVAL; 719 } 720 721 version = bios->data[load_table_ptr]; 722 723 if (version != 0x10) { 724 NV_ERROR(drm, "BIT loadval table version %d.%d not supported\n", 725 version >> 4, version & 0xF); 726 return -ENOSYS; 727 } 728 729 headerlen = bios->data[load_table_ptr + 1]; 730 entrylen = bios->data[load_table_ptr + 2]; 731 num_entries = bios->data[load_table_ptr + 3]; 732 733 if (headerlen != 4 || entrylen != 4 || num_entries != 2) { 734 NV_ERROR(drm, "Do not understand BIT loadval table\n"); 735 return -EINVAL; 736 } 737 738 /* First entry is normal dac, 2nd tv-out perhaps? */ 739 bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff; 740 741 return 0; 742 } 743 744 static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 745 { 746 /* 747 * Parses the flat panel table segment that the bit entry points to. 748 * Starting at bitentry->offset: 749 * 750 * offset + 0 (16 bits): ??? table pointer - seems to have 18 byte 751 * records beginning with a freq. 752 * offset + 2 (16 bits): mode table pointer 753 */ 754 struct nouveau_drm *drm = nouveau_drm(dev); 755 756 if (bitentry->length != 4) { 757 NV_ERROR(drm, "Do not understand BIT display table\n"); 758 return -EINVAL; 759 } 760 761 bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]); 762 763 return 0; 764 } 765 766 static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 767 { 768 /* 769 * Parses the init table segment that the bit entry points to. 770 * 771 * See parse_script_table_pointers for layout 772 */ 773 struct nouveau_drm *drm = nouveau_drm(dev); 774 775 if (bitentry->length < 14) { 776 NV_ERROR(drm, "Do not understand init table\n"); 777 return -EINVAL; 778 } 779 780 parse_script_table_pointers(bios, bitentry->offset); 781 return 0; 782 } 783 784 static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 785 { 786 /* 787 * BIT 'i' (info?) table 788 * 789 * offset + 0 (32 bits): BIOS version dword (as in B table) 790 * offset + 5 (8 bits): BIOS feature byte (same as for BMP?) 791 * offset + 13 (16 bits): pointer to table containing DAC load 792 * detection comparison values 793 * 794 * There's other things in the table, purpose unknown 795 */ 796 797 struct nouveau_drm *drm = nouveau_drm(dev); 798 uint16_t daccmpoffset; 799 uint8_t dacver, dacheaderlen; 800 801 if (bitentry->length < 6) { 802 NV_ERROR(drm, "BIT i table too short for needed information\n"); 803 return -EINVAL; 804 } 805 806 /* 807 * bit 4 seems to indicate a mobile bios (doesn't suffer from BMP's 808 * Quadro identity crisis), other bits possibly as for BMP feature byte 809 */ 810 bios->feature_byte = bios->data[bitentry->offset + 5]; 811 bios->is_mobile = bios->feature_byte & FEATURE_MOBILE; 812 813 if (bitentry->length < 15) { 814 NV_WARN(drm, "BIT i table not long enough for DAC load " 815 "detection comparison table\n"); 816 return -EINVAL; 817 } 818 819 daccmpoffset = ROM16(bios->data[bitentry->offset + 13]); 820 821 /* doesn't exist on g80 */ 822 if (!daccmpoffset) 823 return 0; 824 825 /* 826 * The first value in the table, following the header, is the 827 * comparison value, the second entry is a comparison value for 828 * TV load detection. 829 */ 830 831 dacver = bios->data[daccmpoffset]; 832 dacheaderlen = bios->data[daccmpoffset + 1]; 833 834 if (dacver != 0x00 && dacver != 0x10) { 835 NV_WARN(drm, "DAC load detection comparison table version " 836 "%d.%d not known\n", dacver >> 4, dacver & 0xf); 837 return -ENOSYS; 838 } 839 840 bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]); 841 bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]); 842 843 return 0; 844 } 845 846 static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 847 { 848 /* 849 * Parses the LVDS table segment that the bit entry points to. 850 * Starting at bitentry->offset: 851 * 852 * offset + 0 (16 bits): LVDS strap xlate table pointer 853 */ 854 855 struct nouveau_drm *drm = nouveau_drm(dev); 856 857 if (bitentry->length != 2) { 858 NV_ERROR(drm, "Do not understand BIT LVDS table\n"); 859 return -EINVAL; 860 } 861 862 /* 863 * No idea if it's still called the LVDS manufacturer table, but 864 * the concept's close enough. 865 */ 866 bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]); 867 868 return 0; 869 } 870 871 static int 872 parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios, 873 struct bit_entry *bitentry) 874 { 875 /* 876 * offset + 2 (8 bits): number of options in an 877 * INIT_RAM_RESTRICT_ZM_REG_GROUP opcode option set 878 * offset + 3 (16 bits): pointer to strap xlate table for RAM 879 * restrict option selection 880 * 881 * There's a bunch of bits in this table other than the RAM restrict 882 * stuff that we don't use - their use currently unknown 883 */ 884 885 /* 886 * Older bios versions don't have a sufficiently long table for 887 * what we want 888 */ 889 if (bitentry->length < 0x5) 890 return 0; 891 892 if (bitentry->version < 2) { 893 bios->ram_restrict_group_count = bios->data[bitentry->offset + 2]; 894 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]); 895 } else { 896 bios->ram_restrict_group_count = bios->data[bitentry->offset + 0]; 897 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]); 898 } 899 900 return 0; 901 } 902 903 static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 904 { 905 /* 906 * Parses the pointer to the TMDS table 907 * 908 * Starting at bitentry->offset: 909 * 910 * offset + 0 (16 bits): TMDS table pointer 911 * 912 * The TMDS table is typically found just before the DCB table, with a 913 * characteristic signature of 0x11,0x13 (1.1 being version, 0x13 being 914 * length?) 915 * 916 * At offset +7 is a pointer to a script, which I don't know how to 917 * run yet. 918 * At offset +9 is a pointer to another script, likewise 919 * Offset +11 has a pointer to a table where the first word is a pxclk 920 * frequency and the second word a pointer to a script, which should be 921 * run if the comparison pxclk frequency is less than the pxclk desired. 922 * This repeats for decreasing comparison frequencies 923 * Offset +13 has a pointer to a similar table 924 * The selection of table (and possibly +7/+9 script) is dictated by 925 * "or" from the DCB. 926 */ 927 928 struct nouveau_drm *drm = nouveau_drm(dev); 929 uint16_t tmdstableptr, script1, script2; 930 931 if (bitentry->length != 2) { 932 NV_ERROR(drm, "Do not understand BIT TMDS table\n"); 933 return -EINVAL; 934 } 935 936 tmdstableptr = ROM16(bios->data[bitentry->offset]); 937 if (!tmdstableptr) { 938 NV_ERROR(drm, "Pointer to TMDS table invalid\n"); 939 return -EINVAL; 940 } 941 942 NV_INFO(drm, "TMDS table version %d.%d\n", 943 bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf); 944 945 /* nv50+ has v2.0, but we don't parse it atm */ 946 if (bios->data[tmdstableptr] != 0x11) 947 return -ENOSYS; 948 949 /* 950 * These two scripts are odd: they don't seem to get run even when 951 * they are not stubbed. 952 */ 953 script1 = ROM16(bios->data[tmdstableptr + 7]); 954 script2 = ROM16(bios->data[tmdstableptr + 9]); 955 if (bios->data[script1] != 'q' || bios->data[script2] != 'q') 956 NV_WARN(drm, "TMDS table script pointers not stubbed\n"); 957 958 bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]); 959 bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]); 960 961 return 0; 962 } 963 964 struct bit_table { 965 const char id; 966 int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *); 967 }; 968 969 #define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry }) 970 971 int 972 bit_table(struct drm_device *dev, u8 id, struct bit_entry *bit) 973 { 974 struct nouveau_drm *drm = nouveau_drm(dev); 975 struct nvbios *bios = &drm->vbios; 976 u8 entries, *entry; 977 978 if (bios->type != NVBIOS_BIT) 979 return -ENODEV; 980 981 entries = bios->data[bios->offset + 10]; 982 entry = &bios->data[bios->offset + 12]; 983 while (entries--) { 984 if (entry[0] == id) { 985 bit->id = entry[0]; 986 bit->version = entry[1]; 987 bit->length = ROM16(entry[2]); 988 bit->offset = ROM16(entry[4]); 989 bit->data = ROMPTR(dev, entry[4]); 990 return 0; 991 } 992 993 entry += bios->data[bios->offset + 9]; 994 } 995 996 return -ENOENT; 997 } 998 999 static int 1000 parse_bit_table(struct nvbios *bios, const uint16_t bitoffset, 1001 struct bit_table *table) 1002 { 1003 struct drm_device *dev = bios->dev; 1004 struct nouveau_drm *drm = nouveau_drm(dev); 1005 struct bit_entry bitentry; 1006 1007 if (bit_table(dev, table->id, &bitentry) == 0) 1008 return table->parse_fn(dev, bios, &bitentry); 1009 1010 NV_INFO(drm, "BIT table '%c' not found\n", table->id); 1011 return -ENOSYS; 1012 } 1013 1014 static int 1015 parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset) 1016 { 1017 int ret; 1018 1019 /* 1020 * The only restriction on parsing order currently is having 'i' first 1021 * for use of bios->*_version or bios->feature_byte while parsing; 1022 * functions shouldn't be actually *doing* anything apart from pulling 1023 * data from the image into the bios struct, thus no interdependencies 1024 */ 1025 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i)); 1026 if (ret) /* info? */ 1027 return ret; 1028 if (bios->major_version >= 0x60) /* g80+ */ 1029 parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A)); 1030 parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display)); 1031 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init)); 1032 if (ret) 1033 return ret; 1034 parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M)); /* memory? */ 1035 parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds)); 1036 parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds)); 1037 1038 return 0; 1039 } 1040 1041 static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset) 1042 { 1043 /* 1044 * Parses the BMP structure for useful things, but does not act on them 1045 * 1046 * offset + 5: BMP major version 1047 * offset + 6: BMP minor version 1048 * offset + 9: BMP feature byte 1049 * offset + 10: BCD encoded BIOS version 1050 * 1051 * offset + 18: init script table pointer (for bios versions < 5.10h) 1052 * offset + 20: extra init script table pointer (for bios 1053 * versions < 5.10h) 1054 * 1055 * offset + 24: memory init table pointer (used on early bios versions) 1056 * offset + 26: SDR memory sequencing setup data table 1057 * offset + 28: DDR memory sequencing setup data table 1058 * 1059 * offset + 54: index of I2C CRTC pair to use for CRT output 1060 * offset + 55: index of I2C CRTC pair to use for TV output 1061 * offset + 56: index of I2C CRTC pair to use for flat panel output 1062 * offset + 58: write CRTC index for I2C pair 0 1063 * offset + 59: read CRTC index for I2C pair 0 1064 * offset + 60: write CRTC index for I2C pair 1 1065 * offset + 61: read CRTC index for I2C pair 1 1066 * 1067 * offset + 67: maximum internal PLL frequency (single stage PLL) 1068 * offset + 71: minimum internal PLL frequency (single stage PLL) 1069 * 1070 * offset + 75: script table pointers, as described in 1071 * parse_script_table_pointers 1072 * 1073 * offset + 89: TMDS single link output A table pointer 1074 * offset + 91: TMDS single link output B table pointer 1075 * offset + 95: LVDS single link output A table pointer 1076 * offset + 105: flat panel timings table pointer 1077 * offset + 107: flat panel strapping translation table pointer 1078 * offset + 117: LVDS manufacturer panel config table pointer 1079 * offset + 119: LVDS manufacturer strapping translation table pointer 1080 * 1081 * offset + 142: PLL limits table pointer 1082 * 1083 * offset + 156: minimum pixel clock for LVDS dual link 1084 */ 1085 1086 struct nouveau_drm *drm = nouveau_drm(dev); 1087 uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor; 1088 uint16_t bmplength; 1089 uint16_t legacy_scripts_offset, legacy_i2c_offset; 1090 1091 /* load needed defaults in case we can't parse this info */ 1092 bios->digital_min_front_porch = 0x4b; 1093 bios->fmaxvco = 256000; 1094 bios->fminvco = 128000; 1095 bios->fp.duallink_transition_clk = 90000; 1096 1097 bmp_version_major = bmp[5]; 1098 bmp_version_minor = bmp[6]; 1099 1100 NV_INFO(drm, "BMP version %d.%d\n", 1101 bmp_version_major, bmp_version_minor); 1102 1103 /* 1104 * Make sure that 0x36 is blank and can't be mistaken for a DCB 1105 * pointer on early versions 1106 */ 1107 if (bmp_version_major < 5) 1108 *(uint16_t *)&bios->data[0x36] = 0; 1109 1110 /* 1111 * Seems that the minor version was 1 for all major versions prior 1112 * to 5. Version 6 could theoretically exist, but I suspect BIT 1113 * happened instead. 1114 */ 1115 if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) { 1116 NV_ERROR(drm, "You have an unsupported BMP version. " 1117 "Please send in your bios\n"); 1118 return -ENOSYS; 1119 } 1120 1121 if (bmp_version_major == 0) 1122 /* nothing that's currently useful in this version */ 1123 return 0; 1124 else if (bmp_version_major == 1) 1125 bmplength = 44; /* exact for 1.01 */ 1126 else if (bmp_version_major == 2) 1127 bmplength = 48; /* exact for 2.01 */ 1128 else if (bmp_version_major == 3) 1129 bmplength = 54; 1130 /* guessed - mem init tables added in this version */ 1131 else if (bmp_version_major == 4 || bmp_version_minor < 0x1) 1132 /* don't know if 5.0 exists... */ 1133 bmplength = 62; 1134 /* guessed - BMP I2C indices added in version 4*/ 1135 else if (bmp_version_minor < 0x6) 1136 bmplength = 67; /* exact for 5.01 */ 1137 else if (bmp_version_minor < 0x10) 1138 bmplength = 75; /* exact for 5.06 */ 1139 else if (bmp_version_minor == 0x10) 1140 bmplength = 89; /* exact for 5.10h */ 1141 else if (bmp_version_minor < 0x14) 1142 bmplength = 118; /* exact for 5.11h */ 1143 else if (bmp_version_minor < 0x24) 1144 /* 1145 * Not sure of version where pll limits came in; 1146 * certainly exist by 0x24 though. 1147 */ 1148 /* length not exact: this is long enough to get lvds members */ 1149 bmplength = 123; 1150 else if (bmp_version_minor < 0x27) 1151 /* 1152 * Length not exact: this is long enough to get pll limit 1153 * member 1154 */ 1155 bmplength = 144; 1156 else 1157 /* 1158 * Length not exact: this is long enough to get dual link 1159 * transition clock. 1160 */ 1161 bmplength = 158; 1162 1163 /* checksum */ 1164 if (nv_cksum(bmp, 8)) { 1165 NV_ERROR(drm, "Bad BMP checksum\n"); 1166 return -EINVAL; 1167 } 1168 1169 /* 1170 * Bit 4 seems to indicate either a mobile bios or a quadro card -- 1171 * mobile behaviour consistent (nv11+), quadro only seen nv18gl-nv36gl 1172 * (not nv10gl), bit 5 that the flat panel tables are present, and 1173 * bit 6 a tv bios. 1174 */ 1175 bios->feature_byte = bmp[9]; 1176 1177 if (bmp_version_major < 5 || bmp_version_minor < 0x10) 1178 bios->old_style_init = true; 1179 legacy_scripts_offset = 18; 1180 if (bmp_version_major < 2) 1181 legacy_scripts_offset -= 4; 1182 bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]); 1183 bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]); 1184 1185 if (bmp_version_major > 2) { /* appears in BMP 3 */ 1186 bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]); 1187 bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]); 1188 bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]); 1189 } 1190 1191 legacy_i2c_offset = 0x48; /* BMP version 2 & 3 */ 1192 if (bmplength > 61) 1193 legacy_i2c_offset = offset + 54; 1194 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset]; 1195 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1]; 1196 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2]; 1197 1198 if (bmplength > 74) { 1199 bios->fmaxvco = ROM32(bmp[67]); 1200 bios->fminvco = ROM32(bmp[71]); 1201 } 1202 if (bmplength > 88) 1203 parse_script_table_pointers(bios, offset + 75); 1204 if (bmplength > 94) { 1205 bios->tmds.output0_script_ptr = ROM16(bmp[89]); 1206 bios->tmds.output1_script_ptr = ROM16(bmp[91]); 1207 /* 1208 * Never observed in use with lvds scripts, but is reused for 1209 * 18/24 bit panel interface default for EDID equipped panels 1210 * (if_is_24bit not set directly to avoid any oscillation). 1211 */ 1212 bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]); 1213 } 1214 if (bmplength > 108) { 1215 bios->fp.fptablepointer = ROM16(bmp[105]); 1216 bios->fp.fpxlatetableptr = ROM16(bmp[107]); 1217 bios->fp.xlatwidth = 1; 1218 } 1219 if (bmplength > 120) { 1220 bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]); 1221 bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]); 1222 } 1223 #if 0 1224 if (bmplength > 143) 1225 bios->pll_limit_tbl_ptr = ROM16(bmp[142]); 1226 #endif 1227 1228 if (bmplength > 157) 1229 bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10; 1230 1231 return 0; 1232 } 1233 1234 static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len) 1235 { 1236 int i, j; 1237 1238 for (i = 0; i <= (n - len); i++) { 1239 for (j = 0; j < len; j++) 1240 if (data[i + j] != str[j]) 1241 break; 1242 if (j == len) 1243 return i; 1244 } 1245 1246 return 0; 1247 } 1248 1249 void * 1250 olddcb_table(struct drm_device *dev) 1251 { 1252 struct nouveau_drm *drm = nouveau_drm(dev); 1253 u8 *dcb = NULL; 1254 1255 if (drm->client.device.info.family > NV_DEVICE_INFO_V0_TNT) 1256 dcb = ROMPTR(dev, drm->vbios.data[0x36]); 1257 if (!dcb) { 1258 NV_WARN(drm, "No DCB data found in VBIOS\n"); 1259 return NULL; 1260 } 1261 1262 if (dcb[0] >= 0x42) { 1263 NV_WARN(drm, "DCB version 0x%02x unknown\n", dcb[0]); 1264 return NULL; 1265 } else 1266 if (dcb[0] >= 0x30) { 1267 if (ROM32(dcb[6]) == 0x4edcbdcb) 1268 return dcb; 1269 } else 1270 if (dcb[0] >= 0x20) { 1271 if (ROM32(dcb[4]) == 0x4edcbdcb) 1272 return dcb; 1273 } else 1274 if (dcb[0] >= 0x15) { 1275 if (!memcmp(&dcb[-7], "DEV_REC", 7)) 1276 return dcb; 1277 } else { 1278 /* 1279 * v1.4 (some NV15/16, NV11+) seems the same as v1.5, but 1280 * always has the same single (crt) entry, even when tv-out 1281 * present, so the conclusion is this version cannot really 1282 * be used. 1283 * 1284 * v1.2 tables (some NV6/10, and NV15+) normally have the 1285 * same 5 entries, which are not specific to the card and so 1286 * no use. 1287 * 1288 * v1.2 does have an I2C table that read_dcb_i2c_table can 1289 * handle, but cards exist (nv11 in #14821) with a bad i2c 1290 * table pointer, so use the indices parsed in 1291 * parse_bmp_structure. 1292 * 1293 * v1.1 (NV5+, maybe some NV4) is entirely unhelpful 1294 */ 1295 NV_WARN(drm, "No useful DCB data in VBIOS\n"); 1296 return NULL; 1297 } 1298 1299 NV_WARN(drm, "DCB header validation failed\n"); 1300 return NULL; 1301 } 1302 1303 void * 1304 olddcb_outp(struct drm_device *dev, u8 idx) 1305 { 1306 u8 *dcb = olddcb_table(dev); 1307 if (dcb && dcb[0] >= 0x30) { 1308 if (idx < dcb[2]) 1309 return dcb + dcb[1] + (idx * dcb[3]); 1310 } else 1311 if (dcb && dcb[0] >= 0x20) { 1312 u8 *i2c = ROMPTR(dev, dcb[2]); 1313 u8 *ent = dcb + 8 + (idx * 8); 1314 if (i2c && ent < i2c) 1315 return ent; 1316 } else 1317 if (dcb && dcb[0] >= 0x15) { 1318 u8 *i2c = ROMPTR(dev, dcb[2]); 1319 u8 *ent = dcb + 4 + (idx * 10); 1320 if (i2c && ent < i2c) 1321 return ent; 1322 } 1323 1324 return NULL; 1325 } 1326 1327 int 1328 olddcb_outp_foreach(struct drm_device *dev, void *data, 1329 int (*exec)(struct drm_device *, void *, int idx, u8 *outp)) 1330 { 1331 int ret, idx = -1; 1332 u8 *outp = NULL; 1333 while ((outp = olddcb_outp(dev, ++idx))) { 1334 if (ROM32(outp[0]) == 0x00000000) 1335 break; /* seen on an NV11 with DCB v1.5 */ 1336 if (ROM32(outp[0]) == 0xffffffff) 1337 break; /* seen on an NV17 with DCB v2.0 */ 1338 1339 if ((outp[0] & 0x0f) == DCB_OUTPUT_UNUSED) 1340 continue; 1341 if ((outp[0] & 0x0f) == DCB_OUTPUT_EOL) 1342 break; 1343 1344 ret = exec(dev, data, idx, outp); 1345 if (ret) 1346 return ret; 1347 } 1348 1349 return 0; 1350 } 1351 1352 u8 * 1353 olddcb_conntab(struct drm_device *dev) 1354 { 1355 u8 *dcb = olddcb_table(dev); 1356 if (dcb && dcb[0] >= 0x30 && dcb[1] >= 0x16) { 1357 u8 *conntab = ROMPTR(dev, dcb[0x14]); 1358 if (conntab && conntab[0] >= 0x30 && conntab[0] <= 0x40) 1359 return conntab; 1360 } 1361 return NULL; 1362 } 1363 1364 u8 * 1365 olddcb_conn(struct drm_device *dev, u8 idx) 1366 { 1367 u8 *conntab = olddcb_conntab(dev); 1368 if (conntab && idx < conntab[2]) 1369 return conntab + conntab[1] + (idx * conntab[3]); 1370 return NULL; 1371 } 1372 1373 static struct dcb_output *new_dcb_entry(struct dcb_table *dcb) 1374 { 1375 struct dcb_output *entry = &dcb->entry[dcb->entries]; 1376 1377 memset(entry, 0, sizeof(struct dcb_output)); 1378 entry->index = dcb->entries++; 1379 1380 return entry; 1381 } 1382 1383 static void fabricate_dcb_output(struct dcb_table *dcb, int type, int i2c, 1384 int heads, int or) 1385 { 1386 struct dcb_output *entry = new_dcb_entry(dcb); 1387 1388 entry->type = type; 1389 entry->i2c_index = i2c; 1390 entry->heads = heads; 1391 if (type != DCB_OUTPUT_ANALOG) 1392 entry->location = !DCB_LOC_ON_CHIP; /* ie OFF CHIP */ 1393 entry->or = or; 1394 } 1395 1396 static bool 1397 parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb, 1398 uint32_t conn, uint32_t conf, struct dcb_output *entry) 1399 { 1400 struct nouveau_drm *drm = nouveau_drm(dev); 1401 int link = 0; 1402 1403 entry->type = conn & 0xf; 1404 entry->i2c_index = (conn >> 4) & 0xf; 1405 entry->heads = (conn >> 8) & 0xf; 1406 entry->connector = (conn >> 12) & 0xf; 1407 entry->bus = (conn >> 16) & 0xf; 1408 entry->location = (conn >> 20) & 0x3; 1409 entry->or = (conn >> 24) & 0xf; 1410 1411 switch (entry->type) { 1412 case DCB_OUTPUT_ANALOG: 1413 /* 1414 * Although the rest of a CRT conf dword is usually 1415 * zeros, mac biosen have stuff there so we must mask 1416 */ 1417 entry->crtconf.maxfreq = (dcb->version < 0x30) ? 1418 (conf & 0xffff) * 10 : 1419 (conf & 0xff) * 10000; 1420 break; 1421 case DCB_OUTPUT_LVDS: 1422 { 1423 uint32_t mask; 1424 if (conf & 0x1) 1425 entry->lvdsconf.use_straps_for_mode = true; 1426 if (dcb->version < 0x22) { 1427 mask = ~0xd; 1428 /* 1429 * The laptop in bug 14567 lies and claims to not use 1430 * straps when it does, so assume all DCB 2.0 laptops 1431 * use straps, until a broken EDID using one is produced 1432 */ 1433 entry->lvdsconf.use_straps_for_mode = true; 1434 /* 1435 * Both 0x4 and 0x8 show up in v2.0 tables; assume they 1436 * mean the same thing (probably wrong, but might work) 1437 */ 1438 if (conf & 0x4 || conf & 0x8) 1439 entry->lvdsconf.use_power_scripts = true; 1440 } else { 1441 mask = ~0x7; 1442 if (conf & 0x2) 1443 entry->lvdsconf.use_acpi_for_edid = true; 1444 if (conf & 0x4) 1445 entry->lvdsconf.use_power_scripts = true; 1446 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4; 1447 link = entry->lvdsconf.sor.link; 1448 } 1449 if (conf & mask) { 1450 /* 1451 * Until we even try to use these on G8x, it's 1452 * useless reporting unknown bits. They all are. 1453 */ 1454 if (dcb->version >= 0x40) 1455 break; 1456 1457 NV_ERROR(drm, "Unknown LVDS configuration bits, " 1458 "please report\n"); 1459 } 1460 break; 1461 } 1462 case DCB_OUTPUT_TV: 1463 { 1464 if (dcb->version >= 0x30) 1465 entry->tvconf.has_component_output = conf & (0x8 << 4); 1466 else 1467 entry->tvconf.has_component_output = false; 1468 1469 break; 1470 } 1471 case DCB_OUTPUT_DP: 1472 entry->dpconf.sor.link = (conf & 0x00000030) >> 4; 1473 entry->extdev = (conf & 0x0000ff00) >> 8; 1474 switch ((conf & 0x00e00000) >> 21) { 1475 case 0: 1476 entry->dpconf.link_bw = 162000; 1477 break; 1478 case 1: 1479 entry->dpconf.link_bw = 270000; 1480 break; 1481 case 2: 1482 entry->dpconf.link_bw = 540000; 1483 break; 1484 case 3: 1485 default: 1486 entry->dpconf.link_bw = 810000; 1487 break; 1488 } 1489 switch ((conf & 0x0f000000) >> 24) { 1490 case 0xf: 1491 case 0x4: 1492 entry->dpconf.link_nr = 4; 1493 break; 1494 case 0x3: 1495 case 0x2: 1496 entry->dpconf.link_nr = 2; 1497 break; 1498 default: 1499 entry->dpconf.link_nr = 1; 1500 break; 1501 } 1502 link = entry->dpconf.sor.link; 1503 break; 1504 case DCB_OUTPUT_TMDS: 1505 if (dcb->version >= 0x40) { 1506 entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4; 1507 entry->extdev = (conf & 0x0000ff00) >> 8; 1508 link = entry->tmdsconf.sor.link; 1509 } 1510 else if (dcb->version >= 0x30) 1511 entry->tmdsconf.slave_addr = (conf & 0x00000700) >> 8; 1512 else if (dcb->version >= 0x22) 1513 entry->tmdsconf.slave_addr = (conf & 0x00000070) >> 4; 1514 break; 1515 case DCB_OUTPUT_EOL: 1516 /* weird g80 mobile type that "nv" treats as a terminator */ 1517 dcb->entries--; 1518 return false; 1519 default: 1520 break; 1521 } 1522 1523 if (dcb->version < 0x40) { 1524 /* Normal entries consist of a single bit, but dual link has 1525 * the next most significant bit set too 1526 */ 1527 entry->duallink_possible = 1528 ((1 << (ffs(entry->or) - 1)) * 3 == entry->or); 1529 } else { 1530 entry->duallink_possible = (entry->sorconf.link == 3); 1531 } 1532 1533 /* unsure what DCB version introduces this, 3.0? */ 1534 if (conf & 0x100000) 1535 entry->i2c_upper_default = true; 1536 1537 entry->hasht = (entry->extdev << 8) | (entry->location << 4) | 1538 entry->type; 1539 entry->hashm = (entry->heads << 8) | (link << 6) | entry->or; 1540 return true; 1541 } 1542 1543 static bool 1544 parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb, 1545 uint32_t conn, uint32_t conf, struct dcb_output *entry) 1546 { 1547 struct nouveau_drm *drm = nouveau_drm(dev); 1548 1549 switch (conn & 0x0000000f) { 1550 case 0: 1551 entry->type = DCB_OUTPUT_ANALOG; 1552 break; 1553 case 1: 1554 entry->type = DCB_OUTPUT_TV; 1555 break; 1556 case 2: 1557 case 4: 1558 if (conn & 0x10) 1559 entry->type = DCB_OUTPUT_LVDS; 1560 else 1561 entry->type = DCB_OUTPUT_TMDS; 1562 break; 1563 case 3: 1564 entry->type = DCB_OUTPUT_LVDS; 1565 break; 1566 default: 1567 NV_ERROR(drm, "Unknown DCB type %d\n", conn & 0x0000000f); 1568 return false; 1569 } 1570 1571 entry->i2c_index = (conn & 0x0003c000) >> 14; 1572 entry->heads = ((conn & 0x001c0000) >> 18) + 1; 1573 entry->or = entry->heads; /* same as heads, hopefully safe enough */ 1574 entry->location = (conn & 0x01e00000) >> 21; 1575 entry->bus = (conn & 0x0e000000) >> 25; 1576 entry->duallink_possible = false; 1577 1578 switch (entry->type) { 1579 case DCB_OUTPUT_ANALOG: 1580 entry->crtconf.maxfreq = (conf & 0xffff) * 10; 1581 break; 1582 case DCB_OUTPUT_TV: 1583 entry->tvconf.has_component_output = false; 1584 break; 1585 case DCB_OUTPUT_LVDS: 1586 if ((conn & 0x00003f00) >> 8 != 0x10) 1587 entry->lvdsconf.use_straps_for_mode = true; 1588 entry->lvdsconf.use_power_scripts = true; 1589 break; 1590 default: 1591 break; 1592 } 1593 1594 return true; 1595 } 1596 1597 static 1598 void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb) 1599 { 1600 /* 1601 * DCB v2.0 lists each output combination separately. 1602 * Here we merge compatible entries to have fewer outputs, with 1603 * more options 1604 */ 1605 1606 struct nouveau_drm *drm = nouveau_drm(dev); 1607 int i, newentries = 0; 1608 1609 for (i = 0; i < dcb->entries; i++) { 1610 struct dcb_output *ient = &dcb->entry[i]; 1611 int j; 1612 1613 for (j = i + 1; j < dcb->entries; j++) { 1614 struct dcb_output *jent = &dcb->entry[j]; 1615 1616 if (jent->type == 100) /* already merged entry */ 1617 continue; 1618 1619 /* merge heads field when all other fields the same */ 1620 if (jent->i2c_index == ient->i2c_index && 1621 jent->type == ient->type && 1622 jent->location == ient->location && 1623 jent->or == ient->or) { 1624 NV_INFO(drm, "Merging DCB entries %d and %d\n", 1625 i, j); 1626 ient->heads |= jent->heads; 1627 jent->type = 100; /* dummy value */ 1628 } 1629 } 1630 } 1631 1632 /* Compact entries merged into others out of dcb */ 1633 for (i = 0; i < dcb->entries; i++) { 1634 if (dcb->entry[i].type == 100) 1635 continue; 1636 1637 if (newentries != i) { 1638 dcb->entry[newentries] = dcb->entry[i]; 1639 dcb->entry[newentries].index = newentries; 1640 } 1641 newentries++; 1642 } 1643 1644 dcb->entries = newentries; 1645 } 1646 1647 static bool 1648 apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf) 1649 { 1650 struct nouveau_drm *drm = nouveau_drm(dev); 1651 struct dcb_table *dcb = &drm->vbios.dcb; 1652 1653 /* Dell Precision M6300 1654 * DCB entry 2: 02025312 00000010 1655 * DCB entry 3: 02026312 00000020 1656 * 1657 * Identical, except apparently a different connector on a 1658 * different SOR link. Not a clue how we're supposed to know 1659 * which one is in use if it even shares an i2c line... 1660 * 1661 * Ignore the connector on the second SOR link to prevent 1662 * nasty problems until this is sorted (assuming it's not a 1663 * VBIOS bug). 1664 */ 1665 if (nv_match_device(dev, 0x040d, 0x1028, 0x019b)) { 1666 if (*conn == 0x02026312 && *conf == 0x00000020) 1667 return false; 1668 } 1669 1670 /* GeForce3 Ti 200 1671 * 1672 * DCB reports an LVDS output that should be TMDS: 1673 * DCB entry 1: f2005014 ffffffff 1674 */ 1675 if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) { 1676 if (*conn == 0xf2005014 && *conf == 0xffffffff) { 1677 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, 1); 1678 return false; 1679 } 1680 } 1681 1682 /* XFX GT-240X-YA 1683 * 1684 * So many things wrong here, replace the entire encoder table.. 1685 */ 1686 if (nv_match_device(dev, 0x0ca3, 0x1682, 0x3003)) { 1687 if (idx == 0) { 1688 *conn = 0x02001300; /* VGA, connector 1 */ 1689 *conf = 0x00000028; 1690 } else 1691 if (idx == 1) { 1692 *conn = 0x01010312; /* DVI, connector 0 */ 1693 *conf = 0x00020030; 1694 } else 1695 if (idx == 2) { 1696 *conn = 0x01010310; /* VGA, connector 0 */ 1697 *conf = 0x00000028; 1698 } else 1699 if (idx == 3) { 1700 *conn = 0x02022362; /* HDMI, connector 2 */ 1701 *conf = 0x00020010; 1702 } else { 1703 *conn = 0x0000000e; /* EOL */ 1704 *conf = 0x00000000; 1705 } 1706 } 1707 1708 /* Some other twisted XFX board (rhbz#694914) 1709 * 1710 * The DVI/VGA encoder combo that's supposed to represent the 1711 * DVI-I connector actually point at two different ones, and 1712 * the HDMI connector ends up paired with the VGA instead. 1713 * 1714 * Connector table is missing anything for VGA at all, pointing it 1715 * an invalid conntab entry 2 so we figure it out ourself. 1716 */ 1717 if (nv_match_device(dev, 0x0615, 0x1682, 0x2605)) { 1718 if (idx == 0) { 1719 *conn = 0x02002300; /* VGA, connector 2 */ 1720 *conf = 0x00000028; 1721 } else 1722 if (idx == 1) { 1723 *conn = 0x01010312; /* DVI, connector 0 */ 1724 *conf = 0x00020030; 1725 } else 1726 if (idx == 2) { 1727 *conn = 0x04020310; /* VGA, connector 0 */ 1728 *conf = 0x00000028; 1729 } else 1730 if (idx == 3) { 1731 *conn = 0x02021322; /* HDMI, connector 1 */ 1732 *conf = 0x00020010; 1733 } else { 1734 *conn = 0x0000000e; /* EOL */ 1735 *conf = 0x00000000; 1736 } 1737 } 1738 1739 /* fdo#50830: connector indices for VGA and DVI-I are backwards */ 1740 if (nv_match_device(dev, 0x0421, 0x3842, 0xc793)) { 1741 if (idx == 0 && *conn == 0x02000300) 1742 *conn = 0x02011300; 1743 else 1744 if (idx == 1 && *conn == 0x04011310) 1745 *conn = 0x04000310; 1746 else 1747 if (idx == 2 && *conn == 0x02011312) 1748 *conn = 0x02000312; 1749 } 1750 1751 return true; 1752 } 1753 1754 static void 1755 fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios) 1756 { 1757 struct dcb_table *dcb = &bios->dcb; 1758 int all_heads = (nv_two_heads(dev) ? 3 : 1); 1759 1760 #ifdef __powerpc__ 1761 /* Apple iMac G4 NV17 */ 1762 if (of_machine_is_compatible("PowerMac4,5")) { 1763 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, 1); 1764 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, 2); 1765 return; 1766 } 1767 #endif 1768 1769 /* Make up some sane defaults */ 1770 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1771 bios->legacy.i2c_indices.crt, 1, 1); 1772 1773 if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0) 1774 fabricate_dcb_output(dcb, DCB_OUTPUT_TV, 1775 bios->legacy.i2c_indices.tv, 1776 all_heads, 0); 1777 1778 else if (bios->tmds.output0_script_ptr || 1779 bios->tmds.output1_script_ptr) 1780 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1781 bios->legacy.i2c_indices.panel, 1782 all_heads, 1); 1783 } 1784 1785 static int 1786 parse_dcb_entry(struct drm_device *dev, void *data, int idx, u8 *outp) 1787 { 1788 struct nouveau_drm *drm = nouveau_drm(dev); 1789 struct dcb_table *dcb = &drm->vbios.dcb; 1790 u32 conf = (dcb->version >= 0x20) ? ROM32(outp[4]) : ROM32(outp[6]); 1791 u32 conn = ROM32(outp[0]); 1792 bool ret; 1793 1794 if (apply_dcb_encoder_quirks(dev, idx, &conn, &conf)) { 1795 struct dcb_output *entry = new_dcb_entry(dcb); 1796 1797 NV_INFO(drm, "DCB outp %02d: %08x %08x\n", idx, conn, conf); 1798 1799 if (dcb->version >= 0x20) 1800 ret = parse_dcb20_entry(dev, dcb, conn, conf, entry); 1801 else 1802 ret = parse_dcb15_entry(dev, dcb, conn, conf, entry); 1803 if (!ret) 1804 return 1; /* stop parsing */ 1805 1806 /* Ignore the I2C index for on-chip TV-out, as there 1807 * are cards with bogus values (nv31m in bug 23212), 1808 * and it's otherwise useless. 1809 */ 1810 if (entry->type == DCB_OUTPUT_TV && 1811 entry->location == DCB_LOC_ON_CHIP) 1812 entry->i2c_index = 0x0f; 1813 } 1814 1815 return 0; 1816 } 1817 1818 static void 1819 dcb_fake_connectors(struct nvbios *bios) 1820 { 1821 struct dcb_table *dcbt = &bios->dcb; 1822 u8 map[16] = { }; 1823 int i, idx = 0; 1824 1825 /* heuristic: if we ever get a non-zero connector field, assume 1826 * that all the indices are valid and we don't need fake them. 1827 * 1828 * and, as usual, a blacklist of boards with bad bios data.. 1829 */ 1830 if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) { 1831 for (i = 0; i < dcbt->entries; i++) { 1832 if (dcbt->entry[i].connector) 1833 return; 1834 } 1835 } 1836 1837 /* no useful connector info available, we need to make it up 1838 * ourselves. the rule here is: anything on the same i2c bus 1839 * is considered to be on the same connector. any output 1840 * without an associated i2c bus is assigned its own unique 1841 * connector index. 1842 */ 1843 for (i = 0; i < dcbt->entries; i++) { 1844 u8 i2c = dcbt->entry[i].i2c_index; 1845 if (i2c == 0x0f) { 1846 dcbt->entry[i].connector = idx++; 1847 } else { 1848 if (!map[i2c]) 1849 map[i2c] = ++idx; 1850 dcbt->entry[i].connector = map[i2c] - 1; 1851 } 1852 } 1853 1854 /* if we created more than one connector, destroy the connector 1855 * table - just in case it has random, rather than stub, entries. 1856 */ 1857 if (i > 1) { 1858 u8 *conntab = olddcb_conntab(bios->dev); 1859 if (conntab) 1860 conntab[0] = 0x00; 1861 } 1862 } 1863 1864 static int 1865 parse_dcb_table(struct drm_device *dev, struct nvbios *bios) 1866 { 1867 struct nouveau_drm *drm = nouveau_drm(dev); 1868 struct dcb_table *dcb = &bios->dcb; 1869 u8 *dcbt, *conn; 1870 int idx; 1871 1872 dcbt = olddcb_table(dev); 1873 if (!dcbt) { 1874 /* handle pre-DCB boards */ 1875 if (bios->type == NVBIOS_BMP) { 1876 fabricate_dcb_encoder_table(dev, bios); 1877 return 0; 1878 } 1879 1880 return -EINVAL; 1881 } 1882 1883 NV_INFO(drm, "DCB version %d.%d\n", dcbt[0] >> 4, dcbt[0] & 0xf); 1884 1885 dcb->version = dcbt[0]; 1886 olddcb_outp_foreach(dev, NULL, parse_dcb_entry); 1887 1888 /* 1889 * apart for v2.1+ not being known for requiring merging, this 1890 * guarantees dcbent->index is the index of the entry in the rom image 1891 */ 1892 if (dcb->version < 0x21) 1893 merge_like_dcb_entries(dev, dcb); 1894 1895 /* dump connector table entries to log, if any exist */ 1896 idx = -1; 1897 while ((conn = olddcb_conn(dev, ++idx))) { 1898 if (conn[0] != 0xff) { 1899 if (olddcb_conntab(dev)[3] < 4) 1900 NV_INFO(drm, "DCB conn %02d: %04x\n", 1901 idx, ROM16(conn[0])); 1902 else 1903 NV_INFO(drm, "DCB conn %02d: %08x\n", 1904 idx, ROM32(conn[0])); 1905 } 1906 } 1907 dcb_fake_connectors(bios); 1908 return 0; 1909 } 1910 1911 static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry) 1912 { 1913 /* 1914 * The header following the "HWSQ" signature has the number of entries, 1915 * and the entry size 1916 * 1917 * An entry consists of a dword to write to the sequencer control reg 1918 * (0x00001304), followed by the ucode bytes, written sequentially, 1919 * starting at reg 0x00001400 1920 */ 1921 1922 struct nouveau_drm *drm = nouveau_drm(dev); 1923 struct nvif_object *device = &drm->client.device.object; 1924 uint8_t bytes_to_write; 1925 uint16_t hwsq_entry_offset; 1926 int i; 1927 1928 if (bios->data[hwsq_offset] <= entry) { 1929 NV_ERROR(drm, "Too few entries in HW sequencer table for " 1930 "requested entry\n"); 1931 return -ENOENT; 1932 } 1933 1934 bytes_to_write = bios->data[hwsq_offset + 1]; 1935 1936 if (bytes_to_write != 36) { 1937 NV_ERROR(drm, "Unknown HW sequencer entry size\n"); 1938 return -EINVAL; 1939 } 1940 1941 NV_INFO(drm, "Loading NV17 power sequencing microcode\n"); 1942 1943 hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write; 1944 1945 /* set sequencer control */ 1946 nvif_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset])); 1947 bytes_to_write -= 4; 1948 1949 /* write ucode */ 1950 for (i = 0; i < bytes_to_write; i += 4) 1951 nvif_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4])); 1952 1953 /* twiddle NV_PBUS_DEBUG_4 */ 1954 nvif_wr32(device, NV_PBUS_DEBUG_4, nvif_rd32(device, NV_PBUS_DEBUG_4) | 0x18); 1955 1956 return 0; 1957 } 1958 1959 static int load_nv17_hw_sequencer_ucode(struct drm_device *dev, 1960 struct nvbios *bios) 1961 { 1962 /* 1963 * BMP based cards, from NV17, need a microcode loading to correctly 1964 * control the GPIO etc for LVDS panels 1965 * 1966 * BIT based cards seem to do this directly in the init scripts 1967 * 1968 * The microcode entries are found by the "HWSQ" signature. 1969 */ 1970 1971 static const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' }; 1972 const int sz = sizeof(hwsq_signature); 1973 int hwsq_offset; 1974 1975 hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz); 1976 if (!hwsq_offset) 1977 return 0; 1978 1979 /* always use entry 0? */ 1980 return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0); 1981 } 1982 1983 uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev) 1984 { 1985 struct nouveau_drm *drm = nouveau_drm(dev); 1986 struct nvbios *bios = &drm->vbios; 1987 static const uint8_t edid_sig[] = { 1988 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 }; 1989 uint16_t offset = 0; 1990 uint16_t newoffset; 1991 int searchlen = NV_PROM_SIZE; 1992 1993 if (bios->fp.edid) 1994 return bios->fp.edid; 1995 1996 while (searchlen) { 1997 newoffset = findstr(&bios->data[offset], searchlen, 1998 edid_sig, 8); 1999 if (!newoffset) 2000 return NULL; 2001 offset += newoffset; 2002 if (!nv_cksum(&bios->data[offset], EDID1_LEN)) 2003 break; 2004 2005 searchlen -= offset; 2006 offset++; 2007 } 2008 2009 NV_INFO(drm, "Found EDID in BIOS\n"); 2010 2011 return bios->fp.edid = &bios->data[offset]; 2012 } 2013 2014 static bool NVInitVBIOS(struct drm_device *dev) 2015 { 2016 struct nouveau_drm *drm = nouveau_drm(dev); 2017 struct nvkm_bios *bios = nvxx_bios(&drm->client.device); 2018 struct nvbios *legacy = &drm->vbios; 2019 2020 memset(legacy, 0, sizeof(struct nvbios)); 2021 spin_lock_init(&legacy->lock); 2022 legacy->dev = dev; 2023 2024 legacy->data = bios->data; 2025 legacy->length = bios->size; 2026 legacy->major_version = bios->version.major; 2027 legacy->chip_version = bios->version.chip; 2028 if (bios->bit_offset) { 2029 legacy->type = NVBIOS_BIT; 2030 legacy->offset = bios->bit_offset; 2031 return !parse_bit_structure(legacy, legacy->offset + 6); 2032 } else 2033 if (bios->bmp_offset) { 2034 legacy->type = NVBIOS_BMP; 2035 legacy->offset = bios->bmp_offset; 2036 return !parse_bmp_structure(dev, legacy, legacy->offset); 2037 } 2038 2039 return false; 2040 } 2041 2042 int 2043 nouveau_run_vbios_init(struct drm_device *dev) 2044 { 2045 struct nouveau_drm *drm = nouveau_drm(dev); 2046 struct nvbios *bios = &drm->vbios; 2047 int ret = 0; 2048 2049 /* Reset the BIOS head to 0. */ 2050 bios->state.crtchead = 0; 2051 2052 if (bios->major_version < 5) /* BMP only */ 2053 load_nv17_hw_sequencer_ucode(dev, bios); 2054 2055 if (bios->execute) { 2056 bios->fp.last_script_invoc = 0; 2057 bios->fp.lvds_init_run = false; 2058 } 2059 2060 return ret; 2061 } 2062 2063 static bool 2064 nouveau_bios_posted(struct drm_device *dev) 2065 { 2066 struct nouveau_drm *drm = nouveau_drm(dev); 2067 unsigned htotal; 2068 2069 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) 2070 return true; 2071 2072 htotal = NVReadVgaCrtc(dev, 0, 0x06); 2073 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8; 2074 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4; 2075 htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10; 2076 htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11; 2077 return (htotal != 0); 2078 } 2079 2080 int 2081 nouveau_bios_init(struct drm_device *dev) 2082 { 2083 struct nouveau_drm *drm = nouveau_drm(dev); 2084 struct nvbios *bios = &drm->vbios; 2085 int ret; 2086 2087 /* only relevant for PCI devices */ 2088 if (!dev->pdev) 2089 return 0; 2090 2091 if (!NVInitVBIOS(dev)) 2092 return -ENODEV; 2093 2094 ret = parse_dcb_table(dev, bios); 2095 if (ret) 2096 return ret; 2097 2098 if (!bios->major_version) /* we don't run version 0 bios */ 2099 return 0; 2100 2101 /* init script execution disabled */ 2102 bios->execute = false; 2103 2104 /* ... unless card isn't POSTed already */ 2105 if (!nouveau_bios_posted(dev)) { 2106 NV_INFO(drm, "Adaptor not initialised, " 2107 "running VBIOS init tables.\n"); 2108 bios->execute = true; 2109 } 2110 2111 ret = nouveau_run_vbios_init(dev); 2112 if (ret) 2113 return ret; 2114 2115 /* feature_byte on BMP is poor, but init always sets CR4B */ 2116 if (bios->major_version < 5) 2117 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40; 2118 2119 /* all BIT systems need p_f_m_t for digital_min_front_porch */ 2120 if (bios->is_mobile || bios->major_version >= 5) 2121 ret = parse_fp_mode_table(dev, bios); 2122 2123 /* allow subsequent scripts to execute */ 2124 bios->execute = true; 2125 2126 return 0; 2127 } 2128 2129 void 2130 nouveau_bios_takedown(struct drm_device *dev) 2131 { 2132 } 2133