1 /* 2 * Copyright 2005-2006 Erik Waling 3 * Copyright 2006 Stephane Marchesin 4 * Copyright 2007-2009 Stuart Bennett 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 20 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF 21 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 25 #include "nouveau_drv.h" 26 #include "nouveau_reg.h" 27 #include "dispnv04/hw.h" 28 #include "nouveau_encoder.h" 29 30 #include <linux/io-mapping.h> 31 #include <linux/firmware.h> 32 33 /* these defines are made up */ 34 #define NV_CIO_CRE_44_HEADA 0x0 35 #define NV_CIO_CRE_44_HEADB 0x3 36 #define FEATURE_MOBILE 0x10 /* also FEATURE_QUADRO for BMP */ 37 38 #define EDID1_LEN 128 39 40 #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg) 41 #define LOG_OLD_VALUE(x) 42 43 struct init_exec { 44 bool execute; 45 bool repeat; 46 }; 47 48 static bool nv_cksum(const uint8_t *data, unsigned int length) 49 { 50 /* 51 * There's a few checksums in the BIOS, so here's a generic checking 52 * function. 53 */ 54 int i; 55 uint8_t sum = 0; 56 57 for (i = 0; i < length; i++) 58 sum += data[i]; 59 60 if (sum) 61 return true; 62 63 return false; 64 } 65 66 static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk) 67 { 68 int compare_record_len, i = 0; 69 uint16_t compareclk, scriptptr = 0; 70 71 if (bios->major_version < 5) /* pre BIT */ 72 compare_record_len = 3; 73 else 74 compare_record_len = 4; 75 76 do { 77 compareclk = ROM16(bios->data[clktable + compare_record_len * i]); 78 if (pxclk >= compareclk * 10) { 79 if (bios->major_version < 5) { 80 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i]; 81 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]); 82 } else 83 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]); 84 break; 85 } 86 i++; 87 } while (compareclk); 88 89 return scriptptr; 90 } 91 92 static void 93 run_digital_op_script(struct drm_device *dev, uint16_t scriptptr, 94 struct dcb_output *dcbent, int head, bool dl) 95 { 96 struct nouveau_drm *drm = nouveau_drm(dev); 97 98 NV_INFO(drm, "0x%04X: Parsing digital output script table\n", 99 scriptptr); 100 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_44, head ? NV_CIO_CRE_44_HEADB : 101 NV_CIO_CRE_44_HEADA); 102 nouveau_bios_run_init_table(dev, scriptptr, dcbent, head); 103 104 nv04_dfp_bind_head(dev, dcbent, head, dl); 105 } 106 107 static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script) 108 { 109 struct nouveau_drm *drm = nouveau_drm(dev); 110 struct nvbios *bios = &drm->vbios; 111 uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0); 112 uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]); 113 114 if (!bios->fp.xlated_entry || !sub || !scriptofs) 115 return -EINVAL; 116 117 run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link); 118 119 if (script == LVDS_PANEL_OFF) { 120 /* off-on delay in ms */ 121 mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7])); 122 } 123 #ifdef __powerpc__ 124 /* Powerbook specific quirks */ 125 if (script == LVDS_RESET && 126 (dev->pdev->device == 0x0179 || dev->pdev->device == 0x0189 || 127 dev->pdev->device == 0x0329)) 128 nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72); 129 #endif 130 131 return 0; 132 } 133 134 static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk) 135 { 136 /* 137 * The BIT LVDS table's header has the information to setup the 138 * necessary registers. Following the standard 4 byte header are: 139 * A bitmask byte and a dual-link transition pxclk value for use in 140 * selecting the init script when not using straps; 4 script pointers 141 * for panel power, selected by output and on/off; and 8 table pointers 142 * for panel init, the needed one determined by output, and bits in the 143 * conf byte. These tables are similar to the TMDS tables, consisting 144 * of a list of pxclks and script pointers. 145 */ 146 struct nouveau_drm *drm = nouveau_drm(dev); 147 struct nvbios *bios = &drm->vbios; 148 unsigned int outputset = (dcbent->or == 4) ? 1 : 0; 149 uint16_t scriptptr = 0, clktable; 150 151 /* 152 * For now we assume version 3.0 table - g80 support will need some 153 * changes 154 */ 155 156 switch (script) { 157 case LVDS_INIT: 158 return -ENOSYS; 159 case LVDS_BACKLIGHT_ON: 160 case LVDS_PANEL_ON: 161 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]); 162 break; 163 case LVDS_BACKLIGHT_OFF: 164 case LVDS_PANEL_OFF: 165 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]); 166 break; 167 case LVDS_RESET: 168 clktable = bios->fp.lvdsmanufacturerpointer + 15; 169 if (dcbent->or == 4) 170 clktable += 8; 171 172 if (dcbent->lvdsconf.use_straps_for_mode) { 173 if (bios->fp.dual_link) 174 clktable += 4; 175 if (bios->fp.if_is_24bit) 176 clktable += 2; 177 } else { 178 /* using EDID */ 179 int cmpval_24bit = (dcbent->or == 4) ? 4 : 1; 180 181 if (bios->fp.dual_link) { 182 clktable += 4; 183 cmpval_24bit <<= 1; 184 } 185 186 if (bios->fp.strapless_is_24bit & cmpval_24bit) 187 clktable += 2; 188 } 189 190 clktable = ROM16(bios->data[clktable]); 191 if (!clktable) { 192 NV_ERROR(drm, "Pixel clock comparison table not found\n"); 193 return -ENOENT; 194 } 195 scriptptr = clkcmptable(bios, clktable, pxclk); 196 } 197 198 if (!scriptptr) { 199 NV_ERROR(drm, "LVDS output init script not found\n"); 200 return -ENOENT; 201 } 202 run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link); 203 204 return 0; 205 } 206 207 int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk) 208 { 209 /* 210 * LVDS operations are multiplexed in an effort to present a single API 211 * which works with two vastly differing underlying structures. 212 * This acts as the demux 213 */ 214 215 struct nouveau_drm *drm = nouveau_drm(dev); 216 struct nvif_object *device = &drm->client.device.object; 217 struct nvbios *bios = &drm->vbios; 218 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; 219 uint32_t sel_clk_binding, sel_clk; 220 int ret; 221 222 if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver || 223 (lvds_ver >= 0x30 && script == LVDS_INIT)) 224 return 0; 225 226 if (!bios->fp.lvds_init_run) { 227 bios->fp.lvds_init_run = true; 228 call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk); 229 } 230 231 if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change) 232 call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk); 233 if (script == LVDS_RESET && bios->fp.power_off_for_reset) 234 call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk); 235 236 NV_INFO(drm, "Calling LVDS script %d:\n", script); 237 238 /* don't let script change pll->head binding */ 239 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000; 240 241 if (lvds_ver < 0x30) 242 ret = call_lvds_manufacturer_script(dev, dcbent, head, script); 243 else 244 ret = run_lvds_table(dev, dcbent, head, script, pxclk); 245 246 bios->fp.last_script_invoc = (script << 1 | head); 247 248 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; 249 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding); 250 /* some scripts set a value in NV_PBUS_POWERCTRL_2 and break video overlay */ 251 nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0); 252 253 return ret; 254 } 255 256 struct lvdstableheader { 257 uint8_t lvds_ver, headerlen, recordlen; 258 }; 259 260 static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth) 261 { 262 /* 263 * BMP version (0xa) LVDS table has a simple header of version and 264 * record length. The BIT LVDS table has the typical BIT table header: 265 * version byte, header length byte, record length byte, and a byte for 266 * the maximum number of records that can be held in the table. 267 */ 268 269 struct nouveau_drm *drm = nouveau_drm(dev); 270 uint8_t lvds_ver, headerlen, recordlen; 271 272 memset(lth, 0, sizeof(struct lvdstableheader)); 273 274 if (bios->fp.lvdsmanufacturerpointer == 0x0) { 275 NV_ERROR(drm, "Pointer to LVDS manufacturer table invalid\n"); 276 return -EINVAL; 277 } 278 279 lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; 280 281 switch (lvds_ver) { 282 case 0x0a: /* pre NV40 */ 283 headerlen = 2; 284 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 285 break; 286 case 0x30: /* NV4x */ 287 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 288 if (headerlen < 0x1f) { 289 NV_ERROR(drm, "LVDS table header not understood\n"); 290 return -EINVAL; 291 } 292 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2]; 293 break; 294 case 0x40: /* G80/G90 */ 295 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 296 if (headerlen < 0x7) { 297 NV_ERROR(drm, "LVDS table header not understood\n"); 298 return -EINVAL; 299 } 300 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2]; 301 break; 302 default: 303 NV_ERROR(drm, 304 "LVDS table revision %d.%d not currently supported\n", 305 lvds_ver >> 4, lvds_ver & 0xf); 306 return -ENOSYS; 307 } 308 309 lth->lvds_ver = lvds_ver; 310 lth->headerlen = headerlen; 311 lth->recordlen = recordlen; 312 313 return 0; 314 } 315 316 static int 317 get_fp_strap(struct drm_device *dev, struct nvbios *bios) 318 { 319 struct nouveau_drm *drm = nouveau_drm(dev); 320 struct nvif_object *device = &drm->client.device.object; 321 322 /* 323 * The fp strap is normally dictated by the "User Strap" in 324 * PEXTDEV_BOOT_0[20:16], but on BMP cards when bit 2 of the 325 * Internal_Flags struct at 0x48 is set, the user strap gets overriden 326 * by the PCI subsystem ID during POST, but not before the previous user 327 * strap has been committed to CR58 for CR57=0xf on head A, which may be 328 * read and used instead 329 */ 330 331 if (bios->major_version < 5 && bios->data[0x48] & 0x4) 332 return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf; 333 334 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_MAXWELL) 335 return nvif_rd32(device, 0x001800) & 0x0000000f; 336 else 337 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) 338 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf; 339 else 340 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf; 341 } 342 343 static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios) 344 { 345 struct nouveau_drm *drm = nouveau_drm(dev); 346 uint8_t *fptable; 347 uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex; 348 int ret, ofs, fpstrapping; 349 struct lvdstableheader lth; 350 351 if (bios->fp.fptablepointer == 0x0) { 352 /* Most laptop cards lack an fp table. They use DDC. */ 353 NV_DEBUG(drm, "Pointer to flat panel table invalid\n"); 354 bios->digital_min_front_porch = 0x4b; 355 return 0; 356 } 357 358 fptable = &bios->data[bios->fp.fptablepointer]; 359 fptable_ver = fptable[0]; 360 361 switch (fptable_ver) { 362 /* 363 * BMP version 0x5.0x11 BIOSen have version 1 like tables, but no 364 * version field, and miss one of the spread spectrum/PWM bytes. 365 * This could affect early GF2Go parts (not seen any appropriate ROMs 366 * though). Here we assume that a version of 0x05 matches this case 367 * (combining with a BMP version check would be better), as the 368 * common case for the panel type field is 0x0005, and that is in 369 * fact what we are reading the first byte of. 370 */ 371 case 0x05: /* some NV10, 11, 15, 16 */ 372 recordlen = 42; 373 ofs = -1; 374 break; 375 case 0x10: /* some NV15/16, and NV11+ */ 376 recordlen = 44; 377 ofs = 0; 378 break; 379 case 0x20: /* NV40+ */ 380 headerlen = fptable[1]; 381 recordlen = fptable[2]; 382 fpentries = fptable[3]; 383 /* 384 * fptable[4] is the minimum 385 * RAMDAC_FP_HCRTC -> RAMDAC_FP_HSYNC_START gap 386 */ 387 bios->digital_min_front_porch = fptable[4]; 388 ofs = -7; 389 break; 390 default: 391 NV_ERROR(drm, 392 "FP table revision %d.%d not currently supported\n", 393 fptable_ver >> 4, fptable_ver & 0xf); 394 return -ENOSYS; 395 } 396 397 if (!bios->is_mobile) /* !mobile only needs digital_min_front_porch */ 398 return 0; 399 400 ret = parse_lvds_manufacturer_table_header(dev, bios, <h); 401 if (ret) 402 return ret; 403 404 if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) { 405 bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer + 406 lth.headerlen + 1; 407 bios->fp.xlatwidth = lth.recordlen; 408 } 409 if (bios->fp.fpxlatetableptr == 0x0) { 410 NV_ERROR(drm, "Pointer to flat panel xlat table invalid\n"); 411 return -EINVAL; 412 } 413 414 fpstrapping = get_fp_strap(dev, bios); 415 416 fpindex = bios->data[bios->fp.fpxlatetableptr + 417 fpstrapping * bios->fp.xlatwidth]; 418 419 if (fpindex > fpentries) { 420 NV_ERROR(drm, "Bad flat panel table index\n"); 421 return -ENOENT; 422 } 423 424 /* nv4x cards need both a strap value and fpindex of 0xf to use DDC */ 425 if (lth.lvds_ver > 0x10) 426 bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf; 427 428 /* 429 * If either the strap or xlated fpindex value are 0xf there is no 430 * panel using a strap-derived bios mode present. this condition 431 * includes, but is different from, the DDC panel indicator above 432 */ 433 if (fpstrapping == 0xf || fpindex == 0xf) 434 return 0; 435 436 bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen + 437 recordlen * fpindex + ofs; 438 439 NV_INFO(drm, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n", 440 ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1, 441 ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1, 442 ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10); 443 444 return 0; 445 } 446 447 bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode) 448 { 449 struct nouveau_drm *drm = nouveau_drm(dev); 450 struct nvbios *bios = &drm->vbios; 451 uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr]; 452 453 if (!mode) /* just checking whether we can produce a mode */ 454 return bios->fp.mode_ptr; 455 456 memset(mode, 0, sizeof(struct drm_display_mode)); 457 /* 458 * For version 1.0 (version in byte 0): 459 * bytes 1-2 are "panel type", including bits on whether Colour/mono, 460 * single/dual link, and type (TFT etc.) 461 * bytes 3-6 are bits per colour in RGBX 462 */ 463 mode->clock = ROM16(mode_entry[7]) * 10; 464 /* bytes 9-10 is HActive */ 465 mode->hdisplay = ROM16(mode_entry[11]) + 1; 466 /* 467 * bytes 13-14 is HValid Start 468 * bytes 15-16 is HValid End 469 */ 470 mode->hsync_start = ROM16(mode_entry[17]) + 1; 471 mode->hsync_end = ROM16(mode_entry[19]) + 1; 472 mode->htotal = ROM16(mode_entry[21]) + 1; 473 /* bytes 23-24, 27-30 similarly, but vertical */ 474 mode->vdisplay = ROM16(mode_entry[25]) + 1; 475 mode->vsync_start = ROM16(mode_entry[31]) + 1; 476 mode->vsync_end = ROM16(mode_entry[33]) + 1; 477 mode->vtotal = ROM16(mode_entry[35]) + 1; 478 mode->flags |= (mode_entry[37] & 0x10) ? 479 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 480 mode->flags |= (mode_entry[37] & 0x1) ? 481 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 482 /* 483 * bytes 38-39 relate to spread spectrum settings 484 * bytes 40-43 are something to do with PWM 485 */ 486 487 mode->status = MODE_OK; 488 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 489 drm_mode_set_name(mode); 490 return bios->fp.mode_ptr; 491 } 492 493 int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit) 494 { 495 /* 496 * The LVDS table header is (mostly) described in 497 * parse_lvds_manufacturer_table_header(): the BIT header additionally 498 * contains the dual-link transition pxclk (in 10s kHz), at byte 5 - if 499 * straps are not being used for the panel, this specifies the frequency 500 * at which modes should be set up in the dual link style. 501 * 502 * Following the header, the BMP (ver 0xa) table has several records, 503 * indexed by a separate xlat table, indexed in turn by the fp strap in 504 * EXTDEV_BOOT. Each record had a config byte, followed by 6 script 505 * numbers for use by INIT_SUB which controlled panel init and power, 506 * and finally a dword of ms to sleep between power off and on 507 * operations. 508 * 509 * In the BIT versions, the table following the header serves as an 510 * integrated config and xlat table: the records in the table are 511 * indexed by the FP strap nibble in EXTDEV_BOOT, and each record has 512 * two bytes - the first as a config byte, the second for indexing the 513 * fp mode table pointed to by the BIT 'D' table 514 * 515 * DDC is not used until after card init, so selecting the correct table 516 * entry and setting the dual link flag for EDID equipped panels, 517 * requiring tests against the native-mode pixel clock, cannot be done 518 * until later, when this function should be called with non-zero pxclk 519 */ 520 struct nouveau_drm *drm = nouveau_drm(dev); 521 struct nvbios *bios = &drm->vbios; 522 int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0; 523 struct lvdstableheader lth; 524 uint16_t lvdsofs; 525 int ret, chip_version = bios->chip_version; 526 527 ret = parse_lvds_manufacturer_table_header(dev, bios, <h); 528 if (ret) 529 return ret; 530 531 switch (lth.lvds_ver) { 532 case 0x0a: /* pre NV40 */ 533 lvdsmanufacturerindex = bios->data[ 534 bios->fp.fpxlatemanufacturertableptr + 535 fpstrapping]; 536 537 /* we're done if this isn't the EDID panel case */ 538 if (!pxclk) 539 break; 540 541 if (chip_version < 0x25) { 542 /* nv17 behaviour 543 * 544 * It seems the old style lvds script pointer is reused 545 * to select 18/24 bit colour depth for EDID panels. 546 */ 547 lvdsmanufacturerindex = 548 (bios->legacy.lvds_single_a_script_ptr & 1) ? 549 2 : 0; 550 if (pxclk >= bios->fp.duallink_transition_clk) 551 lvdsmanufacturerindex++; 552 } else if (chip_version < 0x30) { 553 /* nv28 behaviour (off-chip encoder) 554 * 555 * nv28 does a complex dance of first using byte 121 of 556 * the EDID to choose the lvdsmanufacturerindex, then 557 * later attempting to match the EDID manufacturer and 558 * product IDs in a table (signature 'pidt' (panel id 559 * table?)), setting an lvdsmanufacturerindex of 0 and 560 * an fp strap of the match index (or 0xf if none) 561 */ 562 lvdsmanufacturerindex = 0; 563 } else { 564 /* nv31, nv34 behaviour */ 565 lvdsmanufacturerindex = 0; 566 if (pxclk >= bios->fp.duallink_transition_clk) 567 lvdsmanufacturerindex = 2; 568 if (pxclk >= 140000) 569 lvdsmanufacturerindex = 3; 570 } 571 572 /* 573 * nvidia set the high nibble of (cr57=f, cr58) to 574 * lvdsmanufacturerindex in this case; we don't 575 */ 576 break; 577 case 0x30: /* NV4x */ 578 case 0x40: /* G80/G90 */ 579 lvdsmanufacturerindex = fpstrapping; 580 break; 581 default: 582 NV_ERROR(drm, "LVDS table revision not currently supported\n"); 583 return -ENOSYS; 584 } 585 586 lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex; 587 switch (lth.lvds_ver) { 588 case 0x0a: 589 bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1; 590 bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2; 591 bios->fp.dual_link = bios->data[lvdsofs] & 4; 592 bios->fp.link_c_increment = bios->data[lvdsofs] & 8; 593 *if_is_24bit = bios->data[lvdsofs] & 16; 594 break; 595 case 0x30: 596 case 0x40: 597 /* 598 * No sign of the "power off for reset" or "reset for panel 599 * on" bits, but it's safer to assume we should 600 */ 601 bios->fp.power_off_for_reset = true; 602 bios->fp.reset_after_pclk_change = true; 603 604 /* 605 * It's ok lvdsofs is wrong for nv4x edid case; dual_link is 606 * over-written, and if_is_24bit isn't used 607 */ 608 bios->fp.dual_link = bios->data[lvdsofs] & 1; 609 bios->fp.if_is_24bit = bios->data[lvdsofs] & 2; 610 bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4]; 611 bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10; 612 break; 613 } 614 615 /* set dual_link flag for EDID case */ 616 if (pxclk && (chip_version < 0x25 || chip_version > 0x28)) 617 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk); 618 619 *dl = bios->fp.dual_link; 620 621 return 0; 622 } 623 624 int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk) 625 { 626 /* 627 * the pxclk parameter is in kHz 628 * 629 * This runs the TMDS regs setting code found on BIT bios cards 630 * 631 * For ffs(or) == 1 use the first table, for ffs(or) == 2 and 632 * ffs(or) == 3, use the second. 633 */ 634 635 struct nouveau_drm *drm = nouveau_drm(dev); 636 struct nvif_object *device = &drm->client.device.object; 637 struct nvbios *bios = &drm->vbios; 638 int cv = bios->chip_version; 639 uint16_t clktable = 0, scriptptr; 640 uint32_t sel_clk_binding, sel_clk; 641 642 /* pre-nv17 off-chip tmds uses scripts, post nv17 doesn't */ 643 if (cv >= 0x17 && cv != 0x1a && cv != 0x20 && 644 dcbent->location != DCB_LOC_ON_CHIP) 645 return 0; 646 647 switch (ffs(dcbent->or)) { 648 case 1: 649 clktable = bios->tmds.output0_script_ptr; 650 break; 651 case 2: 652 case 3: 653 clktable = bios->tmds.output1_script_ptr; 654 break; 655 } 656 657 if (!clktable) { 658 NV_ERROR(drm, "Pixel clock comparison table not found\n"); 659 return -EINVAL; 660 } 661 662 scriptptr = clkcmptable(bios, clktable, pxclk); 663 664 if (!scriptptr) { 665 NV_ERROR(drm, "TMDS output init script not found\n"); 666 return -ENOENT; 667 } 668 669 /* don't let script change pll->head binding */ 670 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000; 671 run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000); 672 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; 673 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding); 674 675 return 0; 676 } 677 678 static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset) 679 { 680 /* 681 * Parses the init table segment for pointers used in script execution. 682 * 683 * offset + 0 (16 bits): init script tables pointer 684 * offset + 2 (16 bits): macro index table pointer 685 * offset + 4 (16 bits): macro table pointer 686 * offset + 6 (16 bits): condition table pointer 687 * offset + 8 (16 bits): io condition table pointer 688 * offset + 10 (16 bits): io flag condition table pointer 689 * offset + 12 (16 bits): init function table pointer 690 */ 691 692 bios->init_script_tbls_ptr = ROM16(bios->data[offset]); 693 } 694 695 static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 696 { 697 /* 698 * Parses the load detect values for g80 cards. 699 * 700 * offset + 0 (16 bits): loadval table pointer 701 */ 702 703 struct nouveau_drm *drm = nouveau_drm(dev); 704 uint16_t load_table_ptr; 705 uint8_t version, headerlen, entrylen, num_entries; 706 707 if (bitentry->length != 3) { 708 NV_ERROR(drm, "Do not understand BIT A table\n"); 709 return -EINVAL; 710 } 711 712 load_table_ptr = ROM16(bios->data[bitentry->offset]); 713 714 if (load_table_ptr == 0x0) { 715 NV_DEBUG(drm, "Pointer to BIT loadval table invalid\n"); 716 return -EINVAL; 717 } 718 719 version = bios->data[load_table_ptr]; 720 721 if (version != 0x10) { 722 NV_ERROR(drm, "BIT loadval table version %d.%d not supported\n", 723 version >> 4, version & 0xF); 724 return -ENOSYS; 725 } 726 727 headerlen = bios->data[load_table_ptr + 1]; 728 entrylen = bios->data[load_table_ptr + 2]; 729 num_entries = bios->data[load_table_ptr + 3]; 730 731 if (headerlen != 4 || entrylen != 4 || num_entries != 2) { 732 NV_ERROR(drm, "Do not understand BIT loadval table\n"); 733 return -EINVAL; 734 } 735 736 /* First entry is normal dac, 2nd tv-out perhaps? */ 737 bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff; 738 739 return 0; 740 } 741 742 static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 743 { 744 /* 745 * Parses the flat panel table segment that the bit entry points to. 746 * Starting at bitentry->offset: 747 * 748 * offset + 0 (16 bits): ??? table pointer - seems to have 18 byte 749 * records beginning with a freq. 750 * offset + 2 (16 bits): mode table pointer 751 */ 752 struct nouveau_drm *drm = nouveau_drm(dev); 753 754 if (bitentry->length != 4) { 755 NV_ERROR(drm, "Do not understand BIT display table\n"); 756 return -EINVAL; 757 } 758 759 bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]); 760 761 return 0; 762 } 763 764 static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 765 { 766 /* 767 * Parses the init table segment that the bit entry points to. 768 * 769 * See parse_script_table_pointers for layout 770 */ 771 struct nouveau_drm *drm = nouveau_drm(dev); 772 773 if (bitentry->length < 14) { 774 NV_ERROR(drm, "Do not understand init table\n"); 775 return -EINVAL; 776 } 777 778 parse_script_table_pointers(bios, bitentry->offset); 779 return 0; 780 } 781 782 static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 783 { 784 /* 785 * BIT 'i' (info?) table 786 * 787 * offset + 0 (32 bits): BIOS version dword (as in B table) 788 * offset + 5 (8 bits): BIOS feature byte (same as for BMP?) 789 * offset + 13 (16 bits): pointer to table containing DAC load 790 * detection comparison values 791 * 792 * There's other things in the table, purpose unknown 793 */ 794 795 struct nouveau_drm *drm = nouveau_drm(dev); 796 uint16_t daccmpoffset; 797 uint8_t dacver, dacheaderlen; 798 799 if (bitentry->length < 6) { 800 NV_ERROR(drm, "BIT i table too short for needed information\n"); 801 return -EINVAL; 802 } 803 804 /* 805 * bit 4 seems to indicate a mobile bios (doesn't suffer from BMP's 806 * Quadro identity crisis), other bits possibly as for BMP feature byte 807 */ 808 bios->feature_byte = bios->data[bitentry->offset + 5]; 809 bios->is_mobile = bios->feature_byte & FEATURE_MOBILE; 810 811 if (bitentry->length < 15) { 812 NV_WARN(drm, "BIT i table not long enough for DAC load " 813 "detection comparison table\n"); 814 return -EINVAL; 815 } 816 817 daccmpoffset = ROM16(bios->data[bitentry->offset + 13]); 818 819 /* doesn't exist on g80 */ 820 if (!daccmpoffset) 821 return 0; 822 823 /* 824 * The first value in the table, following the header, is the 825 * comparison value, the second entry is a comparison value for 826 * TV load detection. 827 */ 828 829 dacver = bios->data[daccmpoffset]; 830 dacheaderlen = bios->data[daccmpoffset + 1]; 831 832 if (dacver != 0x00 && dacver != 0x10) { 833 NV_WARN(drm, "DAC load detection comparison table version " 834 "%d.%d not known\n", dacver >> 4, dacver & 0xf); 835 return -ENOSYS; 836 } 837 838 bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]); 839 bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]); 840 841 return 0; 842 } 843 844 static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 845 { 846 /* 847 * Parses the LVDS table segment that the bit entry points to. 848 * Starting at bitentry->offset: 849 * 850 * offset + 0 (16 bits): LVDS strap xlate table pointer 851 */ 852 853 struct nouveau_drm *drm = nouveau_drm(dev); 854 855 if (bitentry->length != 2) { 856 NV_ERROR(drm, "Do not understand BIT LVDS table\n"); 857 return -EINVAL; 858 } 859 860 /* 861 * No idea if it's still called the LVDS manufacturer table, but 862 * the concept's close enough. 863 */ 864 bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]); 865 866 return 0; 867 } 868 869 static int 870 parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios, 871 struct bit_entry *bitentry) 872 { 873 /* 874 * offset + 2 (8 bits): number of options in an 875 * INIT_RAM_RESTRICT_ZM_REG_GROUP opcode option set 876 * offset + 3 (16 bits): pointer to strap xlate table for RAM 877 * restrict option selection 878 * 879 * There's a bunch of bits in this table other than the RAM restrict 880 * stuff that we don't use - their use currently unknown 881 */ 882 883 /* 884 * Older bios versions don't have a sufficiently long table for 885 * what we want 886 */ 887 if (bitentry->length < 0x5) 888 return 0; 889 890 if (bitentry->version < 2) { 891 bios->ram_restrict_group_count = bios->data[bitentry->offset + 2]; 892 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]); 893 } else { 894 bios->ram_restrict_group_count = bios->data[bitentry->offset + 0]; 895 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]); 896 } 897 898 return 0; 899 } 900 901 static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 902 { 903 /* 904 * Parses the pointer to the TMDS table 905 * 906 * Starting at bitentry->offset: 907 * 908 * offset + 0 (16 bits): TMDS table pointer 909 * 910 * The TMDS table is typically found just before the DCB table, with a 911 * characteristic signature of 0x11,0x13 (1.1 being version, 0x13 being 912 * length?) 913 * 914 * At offset +7 is a pointer to a script, which I don't know how to 915 * run yet. 916 * At offset +9 is a pointer to another script, likewise 917 * Offset +11 has a pointer to a table where the first word is a pxclk 918 * frequency and the second word a pointer to a script, which should be 919 * run if the comparison pxclk frequency is less than the pxclk desired. 920 * This repeats for decreasing comparison frequencies 921 * Offset +13 has a pointer to a similar table 922 * The selection of table (and possibly +7/+9 script) is dictated by 923 * "or" from the DCB. 924 */ 925 926 struct nouveau_drm *drm = nouveau_drm(dev); 927 uint16_t tmdstableptr, script1, script2; 928 929 if (bitentry->length != 2) { 930 NV_ERROR(drm, "Do not understand BIT TMDS table\n"); 931 return -EINVAL; 932 } 933 934 tmdstableptr = ROM16(bios->data[bitentry->offset]); 935 if (!tmdstableptr) { 936 NV_INFO(drm, "Pointer to TMDS table not found\n"); 937 return -EINVAL; 938 } 939 940 NV_INFO(drm, "TMDS table version %d.%d\n", 941 bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf); 942 943 /* nv50+ has v2.0, but we don't parse it atm */ 944 if (bios->data[tmdstableptr] != 0x11) 945 return -ENOSYS; 946 947 /* 948 * These two scripts are odd: they don't seem to get run even when 949 * they are not stubbed. 950 */ 951 script1 = ROM16(bios->data[tmdstableptr + 7]); 952 script2 = ROM16(bios->data[tmdstableptr + 9]); 953 if (bios->data[script1] != 'q' || bios->data[script2] != 'q') 954 NV_WARN(drm, "TMDS table script pointers not stubbed\n"); 955 956 bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]); 957 bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]); 958 959 return 0; 960 } 961 962 struct bit_table { 963 const char id; 964 int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *); 965 }; 966 967 #define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry }) 968 969 int 970 bit_table(struct drm_device *dev, u8 id, struct bit_entry *bit) 971 { 972 struct nouveau_drm *drm = nouveau_drm(dev); 973 struct nvbios *bios = &drm->vbios; 974 u8 entries, *entry; 975 976 if (bios->type != NVBIOS_BIT) 977 return -ENODEV; 978 979 entries = bios->data[bios->offset + 10]; 980 entry = &bios->data[bios->offset + 12]; 981 while (entries--) { 982 if (entry[0] == id) { 983 bit->id = entry[0]; 984 bit->version = entry[1]; 985 bit->length = ROM16(entry[2]); 986 bit->offset = ROM16(entry[4]); 987 bit->data = ROMPTR(dev, entry[4]); 988 return 0; 989 } 990 991 entry += bios->data[bios->offset + 9]; 992 } 993 994 return -ENOENT; 995 } 996 997 static int 998 parse_bit_table(struct nvbios *bios, const uint16_t bitoffset, 999 struct bit_table *table) 1000 { 1001 struct drm_device *dev = bios->dev; 1002 struct nouveau_drm *drm = nouveau_drm(dev); 1003 struct bit_entry bitentry; 1004 1005 if (bit_table(dev, table->id, &bitentry) == 0) 1006 return table->parse_fn(dev, bios, &bitentry); 1007 1008 NV_INFO(drm, "BIT table '%c' not found\n", table->id); 1009 return -ENOSYS; 1010 } 1011 1012 static int 1013 parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset) 1014 { 1015 int ret; 1016 1017 /* 1018 * The only restriction on parsing order currently is having 'i' first 1019 * for use of bios->*_version or bios->feature_byte while parsing; 1020 * functions shouldn't be actually *doing* anything apart from pulling 1021 * data from the image into the bios struct, thus no interdependencies 1022 */ 1023 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i)); 1024 if (ret) /* info? */ 1025 return ret; 1026 if (bios->major_version >= 0x60) /* g80+ */ 1027 parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A)); 1028 parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display)); 1029 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init)); 1030 if (ret) 1031 return ret; 1032 parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M)); /* memory? */ 1033 parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds)); 1034 parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds)); 1035 1036 return 0; 1037 } 1038 1039 static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset) 1040 { 1041 /* 1042 * Parses the BMP structure for useful things, but does not act on them 1043 * 1044 * offset + 5: BMP major version 1045 * offset + 6: BMP minor version 1046 * offset + 9: BMP feature byte 1047 * offset + 10: BCD encoded BIOS version 1048 * 1049 * offset + 18: init script table pointer (for bios versions < 5.10h) 1050 * offset + 20: extra init script table pointer (for bios 1051 * versions < 5.10h) 1052 * 1053 * offset + 24: memory init table pointer (used on early bios versions) 1054 * offset + 26: SDR memory sequencing setup data table 1055 * offset + 28: DDR memory sequencing setup data table 1056 * 1057 * offset + 54: index of I2C CRTC pair to use for CRT output 1058 * offset + 55: index of I2C CRTC pair to use for TV output 1059 * offset + 56: index of I2C CRTC pair to use for flat panel output 1060 * offset + 58: write CRTC index for I2C pair 0 1061 * offset + 59: read CRTC index for I2C pair 0 1062 * offset + 60: write CRTC index for I2C pair 1 1063 * offset + 61: read CRTC index for I2C pair 1 1064 * 1065 * offset + 67: maximum internal PLL frequency (single stage PLL) 1066 * offset + 71: minimum internal PLL frequency (single stage PLL) 1067 * 1068 * offset + 75: script table pointers, as described in 1069 * parse_script_table_pointers 1070 * 1071 * offset + 89: TMDS single link output A table pointer 1072 * offset + 91: TMDS single link output B table pointer 1073 * offset + 95: LVDS single link output A table pointer 1074 * offset + 105: flat panel timings table pointer 1075 * offset + 107: flat panel strapping translation table pointer 1076 * offset + 117: LVDS manufacturer panel config table pointer 1077 * offset + 119: LVDS manufacturer strapping translation table pointer 1078 * 1079 * offset + 142: PLL limits table pointer 1080 * 1081 * offset + 156: minimum pixel clock for LVDS dual link 1082 */ 1083 1084 struct nouveau_drm *drm = nouveau_drm(dev); 1085 uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor; 1086 uint16_t bmplength; 1087 uint16_t legacy_scripts_offset, legacy_i2c_offset; 1088 1089 /* load needed defaults in case we can't parse this info */ 1090 bios->digital_min_front_porch = 0x4b; 1091 bios->fmaxvco = 256000; 1092 bios->fminvco = 128000; 1093 bios->fp.duallink_transition_clk = 90000; 1094 1095 bmp_version_major = bmp[5]; 1096 bmp_version_minor = bmp[6]; 1097 1098 NV_INFO(drm, "BMP version %d.%d\n", 1099 bmp_version_major, bmp_version_minor); 1100 1101 /* 1102 * Make sure that 0x36 is blank and can't be mistaken for a DCB 1103 * pointer on early versions 1104 */ 1105 if (bmp_version_major < 5) 1106 *(uint16_t *)&bios->data[0x36] = 0; 1107 1108 /* 1109 * Seems that the minor version was 1 for all major versions prior 1110 * to 5. Version 6 could theoretically exist, but I suspect BIT 1111 * happened instead. 1112 */ 1113 if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) { 1114 NV_ERROR(drm, "You have an unsupported BMP version. " 1115 "Please send in your bios\n"); 1116 return -ENOSYS; 1117 } 1118 1119 if (bmp_version_major == 0) 1120 /* nothing that's currently useful in this version */ 1121 return 0; 1122 else if (bmp_version_major == 1) 1123 bmplength = 44; /* exact for 1.01 */ 1124 else if (bmp_version_major == 2) 1125 bmplength = 48; /* exact for 2.01 */ 1126 else if (bmp_version_major == 3) 1127 bmplength = 54; 1128 /* guessed - mem init tables added in this version */ 1129 else if (bmp_version_major == 4 || bmp_version_minor < 0x1) 1130 /* don't know if 5.0 exists... */ 1131 bmplength = 62; 1132 /* guessed - BMP I2C indices added in version 4*/ 1133 else if (bmp_version_minor < 0x6) 1134 bmplength = 67; /* exact for 5.01 */ 1135 else if (bmp_version_minor < 0x10) 1136 bmplength = 75; /* exact for 5.06 */ 1137 else if (bmp_version_minor == 0x10) 1138 bmplength = 89; /* exact for 5.10h */ 1139 else if (bmp_version_minor < 0x14) 1140 bmplength = 118; /* exact for 5.11h */ 1141 else if (bmp_version_minor < 0x24) 1142 /* 1143 * Not sure of version where pll limits came in; 1144 * certainly exist by 0x24 though. 1145 */ 1146 /* length not exact: this is long enough to get lvds members */ 1147 bmplength = 123; 1148 else if (bmp_version_minor < 0x27) 1149 /* 1150 * Length not exact: this is long enough to get pll limit 1151 * member 1152 */ 1153 bmplength = 144; 1154 else 1155 /* 1156 * Length not exact: this is long enough to get dual link 1157 * transition clock. 1158 */ 1159 bmplength = 158; 1160 1161 /* checksum */ 1162 if (nv_cksum(bmp, 8)) { 1163 NV_ERROR(drm, "Bad BMP checksum\n"); 1164 return -EINVAL; 1165 } 1166 1167 /* 1168 * Bit 4 seems to indicate either a mobile bios or a quadro card -- 1169 * mobile behaviour consistent (nv11+), quadro only seen nv18gl-nv36gl 1170 * (not nv10gl), bit 5 that the flat panel tables are present, and 1171 * bit 6 a tv bios. 1172 */ 1173 bios->feature_byte = bmp[9]; 1174 1175 if (bmp_version_major < 5 || bmp_version_minor < 0x10) 1176 bios->old_style_init = true; 1177 legacy_scripts_offset = 18; 1178 if (bmp_version_major < 2) 1179 legacy_scripts_offset -= 4; 1180 bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]); 1181 bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]); 1182 1183 if (bmp_version_major > 2) { /* appears in BMP 3 */ 1184 bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]); 1185 bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]); 1186 bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]); 1187 } 1188 1189 legacy_i2c_offset = 0x48; /* BMP version 2 & 3 */ 1190 if (bmplength > 61) 1191 legacy_i2c_offset = offset + 54; 1192 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset]; 1193 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1]; 1194 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2]; 1195 1196 if (bmplength > 74) { 1197 bios->fmaxvco = ROM32(bmp[67]); 1198 bios->fminvco = ROM32(bmp[71]); 1199 } 1200 if (bmplength > 88) 1201 parse_script_table_pointers(bios, offset + 75); 1202 if (bmplength > 94) { 1203 bios->tmds.output0_script_ptr = ROM16(bmp[89]); 1204 bios->tmds.output1_script_ptr = ROM16(bmp[91]); 1205 /* 1206 * Never observed in use with lvds scripts, but is reused for 1207 * 18/24 bit panel interface default for EDID equipped panels 1208 * (if_is_24bit not set directly to avoid any oscillation). 1209 */ 1210 bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]); 1211 } 1212 if (bmplength > 108) { 1213 bios->fp.fptablepointer = ROM16(bmp[105]); 1214 bios->fp.fpxlatetableptr = ROM16(bmp[107]); 1215 bios->fp.xlatwidth = 1; 1216 } 1217 if (bmplength > 120) { 1218 bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]); 1219 bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]); 1220 } 1221 #if 0 1222 if (bmplength > 143) 1223 bios->pll_limit_tbl_ptr = ROM16(bmp[142]); 1224 #endif 1225 1226 if (bmplength > 157) 1227 bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10; 1228 1229 return 0; 1230 } 1231 1232 static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len) 1233 { 1234 int i, j; 1235 1236 for (i = 0; i <= (n - len); i++) { 1237 for (j = 0; j < len; j++) 1238 if (data[i + j] != str[j]) 1239 break; 1240 if (j == len) 1241 return i; 1242 } 1243 1244 return 0; 1245 } 1246 1247 void * 1248 olddcb_table(struct drm_device *dev) 1249 { 1250 struct nouveau_drm *drm = nouveau_drm(dev); 1251 u8 *dcb = NULL; 1252 1253 if (drm->client.device.info.family > NV_DEVICE_INFO_V0_TNT) 1254 dcb = ROMPTR(dev, drm->vbios.data[0x36]); 1255 if (!dcb) { 1256 NV_WARN(drm, "No DCB data found in VBIOS\n"); 1257 return NULL; 1258 } 1259 1260 if (dcb[0] >= 0x42) { 1261 NV_WARN(drm, "DCB version 0x%02x unknown\n", dcb[0]); 1262 return NULL; 1263 } else 1264 if (dcb[0] >= 0x30) { 1265 if (ROM32(dcb[6]) == 0x4edcbdcb) 1266 return dcb; 1267 } else 1268 if (dcb[0] >= 0x20) { 1269 if (ROM32(dcb[4]) == 0x4edcbdcb) 1270 return dcb; 1271 } else 1272 if (dcb[0] >= 0x15) { 1273 if (!memcmp(&dcb[-7], "DEV_REC", 7)) 1274 return dcb; 1275 } else { 1276 /* 1277 * v1.4 (some NV15/16, NV11+) seems the same as v1.5, but 1278 * always has the same single (crt) entry, even when tv-out 1279 * present, so the conclusion is this version cannot really 1280 * be used. 1281 * 1282 * v1.2 tables (some NV6/10, and NV15+) normally have the 1283 * same 5 entries, which are not specific to the card and so 1284 * no use. 1285 * 1286 * v1.2 does have an I2C table that read_dcb_i2c_table can 1287 * handle, but cards exist (nv11 in #14821) with a bad i2c 1288 * table pointer, so use the indices parsed in 1289 * parse_bmp_structure. 1290 * 1291 * v1.1 (NV5+, maybe some NV4) is entirely unhelpful 1292 */ 1293 NV_WARN(drm, "No useful DCB data in VBIOS\n"); 1294 return NULL; 1295 } 1296 1297 NV_WARN(drm, "DCB header validation failed\n"); 1298 return NULL; 1299 } 1300 1301 void * 1302 olddcb_outp(struct drm_device *dev, u8 idx) 1303 { 1304 u8 *dcb = olddcb_table(dev); 1305 if (dcb && dcb[0] >= 0x30) { 1306 if (idx < dcb[2]) 1307 return dcb + dcb[1] + (idx * dcb[3]); 1308 } else 1309 if (dcb && dcb[0] >= 0x20) { 1310 u8 *i2c = ROMPTR(dev, dcb[2]); 1311 u8 *ent = dcb + 8 + (idx * 8); 1312 if (i2c && ent < i2c) 1313 return ent; 1314 } else 1315 if (dcb && dcb[0] >= 0x15) { 1316 u8 *i2c = ROMPTR(dev, dcb[2]); 1317 u8 *ent = dcb + 4 + (idx * 10); 1318 if (i2c && ent < i2c) 1319 return ent; 1320 } 1321 1322 return NULL; 1323 } 1324 1325 int 1326 olddcb_outp_foreach(struct drm_device *dev, void *data, 1327 int (*exec)(struct drm_device *, void *, int idx, u8 *outp)) 1328 { 1329 int ret, idx = -1; 1330 u8 *outp = NULL; 1331 while ((outp = olddcb_outp(dev, ++idx))) { 1332 if (ROM32(outp[0]) == 0x00000000) 1333 break; /* seen on an NV11 with DCB v1.5 */ 1334 if (ROM32(outp[0]) == 0xffffffff) 1335 break; /* seen on an NV17 with DCB v2.0 */ 1336 1337 if ((outp[0] & 0x0f) == DCB_OUTPUT_UNUSED) 1338 continue; 1339 if ((outp[0] & 0x0f) == DCB_OUTPUT_EOL) 1340 break; 1341 1342 ret = exec(dev, data, idx, outp); 1343 if (ret) 1344 return ret; 1345 } 1346 1347 return 0; 1348 } 1349 1350 u8 * 1351 olddcb_conntab(struct drm_device *dev) 1352 { 1353 u8 *dcb = olddcb_table(dev); 1354 if (dcb && dcb[0] >= 0x30 && dcb[1] >= 0x16) { 1355 u8 *conntab = ROMPTR(dev, dcb[0x14]); 1356 if (conntab && conntab[0] >= 0x30 && conntab[0] <= 0x40) 1357 return conntab; 1358 } 1359 return NULL; 1360 } 1361 1362 u8 * 1363 olddcb_conn(struct drm_device *dev, u8 idx) 1364 { 1365 u8 *conntab = olddcb_conntab(dev); 1366 if (conntab && idx < conntab[2]) 1367 return conntab + conntab[1] + (idx * conntab[3]); 1368 return NULL; 1369 } 1370 1371 static struct dcb_output *new_dcb_entry(struct dcb_table *dcb) 1372 { 1373 struct dcb_output *entry = &dcb->entry[dcb->entries]; 1374 1375 memset(entry, 0, sizeof(struct dcb_output)); 1376 entry->index = dcb->entries++; 1377 1378 return entry; 1379 } 1380 1381 static void fabricate_dcb_output(struct dcb_table *dcb, int type, int i2c, 1382 int heads, int or) 1383 { 1384 struct dcb_output *entry = new_dcb_entry(dcb); 1385 1386 entry->type = type; 1387 entry->i2c_index = i2c; 1388 entry->heads = heads; 1389 if (type != DCB_OUTPUT_ANALOG) 1390 entry->location = !DCB_LOC_ON_CHIP; /* ie OFF CHIP */ 1391 entry->or = or; 1392 } 1393 1394 static bool 1395 parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb, 1396 uint32_t conn, uint32_t conf, struct dcb_output *entry) 1397 { 1398 struct nouveau_drm *drm = nouveau_drm(dev); 1399 int link = 0; 1400 1401 entry->type = conn & 0xf; 1402 entry->i2c_index = (conn >> 4) & 0xf; 1403 entry->heads = (conn >> 8) & 0xf; 1404 entry->connector = (conn >> 12) & 0xf; 1405 entry->bus = (conn >> 16) & 0xf; 1406 entry->location = (conn >> 20) & 0x3; 1407 entry->or = (conn >> 24) & 0xf; 1408 1409 switch (entry->type) { 1410 case DCB_OUTPUT_ANALOG: 1411 /* 1412 * Although the rest of a CRT conf dword is usually 1413 * zeros, mac biosen have stuff there so we must mask 1414 */ 1415 entry->crtconf.maxfreq = (dcb->version < 0x30) ? 1416 (conf & 0xffff) * 10 : 1417 (conf & 0xff) * 10000; 1418 break; 1419 case DCB_OUTPUT_LVDS: 1420 { 1421 uint32_t mask; 1422 if (conf & 0x1) 1423 entry->lvdsconf.use_straps_for_mode = true; 1424 if (dcb->version < 0x22) { 1425 mask = ~0xd; 1426 /* 1427 * The laptop in bug 14567 lies and claims to not use 1428 * straps when it does, so assume all DCB 2.0 laptops 1429 * use straps, until a broken EDID using one is produced 1430 */ 1431 entry->lvdsconf.use_straps_for_mode = true; 1432 /* 1433 * Both 0x4 and 0x8 show up in v2.0 tables; assume they 1434 * mean the same thing (probably wrong, but might work) 1435 */ 1436 if (conf & 0x4 || conf & 0x8) 1437 entry->lvdsconf.use_power_scripts = true; 1438 } else { 1439 mask = ~0x7; 1440 if (conf & 0x2) 1441 entry->lvdsconf.use_acpi_for_edid = true; 1442 if (conf & 0x4) 1443 entry->lvdsconf.use_power_scripts = true; 1444 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4; 1445 link = entry->lvdsconf.sor.link; 1446 } 1447 if (conf & mask) { 1448 /* 1449 * Until we even try to use these on G8x, it's 1450 * useless reporting unknown bits. They all are. 1451 */ 1452 if (dcb->version >= 0x40) 1453 break; 1454 1455 NV_ERROR(drm, "Unknown LVDS configuration bits, " 1456 "please report\n"); 1457 } 1458 break; 1459 } 1460 case DCB_OUTPUT_TV: 1461 { 1462 if (dcb->version >= 0x30) 1463 entry->tvconf.has_component_output = conf & (0x8 << 4); 1464 else 1465 entry->tvconf.has_component_output = false; 1466 1467 break; 1468 } 1469 case DCB_OUTPUT_DP: 1470 entry->dpconf.sor.link = (conf & 0x00000030) >> 4; 1471 entry->extdev = (conf & 0x0000ff00) >> 8; 1472 switch ((conf & 0x00e00000) >> 21) { 1473 case 0: 1474 entry->dpconf.link_bw = 162000; 1475 break; 1476 case 1: 1477 entry->dpconf.link_bw = 270000; 1478 break; 1479 case 2: 1480 entry->dpconf.link_bw = 540000; 1481 break; 1482 case 3: 1483 default: 1484 entry->dpconf.link_bw = 810000; 1485 break; 1486 } 1487 switch ((conf & 0x0f000000) >> 24) { 1488 case 0xf: 1489 case 0x4: 1490 entry->dpconf.link_nr = 4; 1491 break; 1492 case 0x3: 1493 case 0x2: 1494 entry->dpconf.link_nr = 2; 1495 break; 1496 default: 1497 entry->dpconf.link_nr = 1; 1498 break; 1499 } 1500 link = entry->dpconf.sor.link; 1501 break; 1502 case DCB_OUTPUT_TMDS: 1503 if (dcb->version >= 0x40) { 1504 entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4; 1505 entry->extdev = (conf & 0x0000ff00) >> 8; 1506 link = entry->tmdsconf.sor.link; 1507 } 1508 else if (dcb->version >= 0x30) 1509 entry->tmdsconf.slave_addr = (conf & 0x00000700) >> 8; 1510 else if (dcb->version >= 0x22) 1511 entry->tmdsconf.slave_addr = (conf & 0x00000070) >> 4; 1512 break; 1513 case DCB_OUTPUT_EOL: 1514 /* weird g80 mobile type that "nv" treats as a terminator */ 1515 dcb->entries--; 1516 return false; 1517 default: 1518 break; 1519 } 1520 1521 if (dcb->version < 0x40) { 1522 /* Normal entries consist of a single bit, but dual link has 1523 * the next most significant bit set too 1524 */ 1525 entry->duallink_possible = 1526 ((1 << (ffs(entry->or) - 1)) * 3 == entry->or); 1527 } else { 1528 entry->duallink_possible = (entry->sorconf.link == 3); 1529 } 1530 1531 /* unsure what DCB version introduces this, 3.0? */ 1532 if (conf & 0x100000) 1533 entry->i2c_upper_default = true; 1534 1535 entry->hasht = (entry->extdev << 8) | (entry->location << 4) | 1536 entry->type; 1537 entry->hashm = (entry->heads << 8) | (link << 6) | entry->or; 1538 return true; 1539 } 1540 1541 static bool 1542 parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb, 1543 uint32_t conn, uint32_t conf, struct dcb_output *entry) 1544 { 1545 struct nouveau_drm *drm = nouveau_drm(dev); 1546 1547 switch (conn & 0x0000000f) { 1548 case 0: 1549 entry->type = DCB_OUTPUT_ANALOG; 1550 break; 1551 case 1: 1552 entry->type = DCB_OUTPUT_TV; 1553 break; 1554 case 2: 1555 case 4: 1556 if (conn & 0x10) 1557 entry->type = DCB_OUTPUT_LVDS; 1558 else 1559 entry->type = DCB_OUTPUT_TMDS; 1560 break; 1561 case 3: 1562 entry->type = DCB_OUTPUT_LVDS; 1563 break; 1564 default: 1565 NV_ERROR(drm, "Unknown DCB type %d\n", conn & 0x0000000f); 1566 return false; 1567 } 1568 1569 entry->i2c_index = (conn & 0x0003c000) >> 14; 1570 entry->heads = ((conn & 0x001c0000) >> 18) + 1; 1571 entry->or = entry->heads; /* same as heads, hopefully safe enough */ 1572 entry->location = (conn & 0x01e00000) >> 21; 1573 entry->bus = (conn & 0x0e000000) >> 25; 1574 entry->duallink_possible = false; 1575 1576 switch (entry->type) { 1577 case DCB_OUTPUT_ANALOG: 1578 entry->crtconf.maxfreq = (conf & 0xffff) * 10; 1579 break; 1580 case DCB_OUTPUT_TV: 1581 entry->tvconf.has_component_output = false; 1582 break; 1583 case DCB_OUTPUT_LVDS: 1584 if ((conn & 0x00003f00) >> 8 != 0x10) 1585 entry->lvdsconf.use_straps_for_mode = true; 1586 entry->lvdsconf.use_power_scripts = true; 1587 break; 1588 default: 1589 break; 1590 } 1591 1592 return true; 1593 } 1594 1595 static 1596 void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb) 1597 { 1598 /* 1599 * DCB v2.0 lists each output combination separately. 1600 * Here we merge compatible entries to have fewer outputs, with 1601 * more options 1602 */ 1603 1604 struct nouveau_drm *drm = nouveau_drm(dev); 1605 int i, newentries = 0; 1606 1607 for (i = 0; i < dcb->entries; i++) { 1608 struct dcb_output *ient = &dcb->entry[i]; 1609 int j; 1610 1611 for (j = i + 1; j < dcb->entries; j++) { 1612 struct dcb_output *jent = &dcb->entry[j]; 1613 1614 if (jent->type == 100) /* already merged entry */ 1615 continue; 1616 1617 /* merge heads field when all other fields the same */ 1618 if (jent->i2c_index == ient->i2c_index && 1619 jent->type == ient->type && 1620 jent->location == ient->location && 1621 jent->or == ient->or) { 1622 NV_INFO(drm, "Merging DCB entries %d and %d\n", 1623 i, j); 1624 ient->heads |= jent->heads; 1625 jent->type = 100; /* dummy value */ 1626 } 1627 } 1628 } 1629 1630 /* Compact entries merged into others out of dcb */ 1631 for (i = 0; i < dcb->entries; i++) { 1632 if (dcb->entry[i].type == 100) 1633 continue; 1634 1635 if (newentries != i) { 1636 dcb->entry[newentries] = dcb->entry[i]; 1637 dcb->entry[newentries].index = newentries; 1638 } 1639 newentries++; 1640 } 1641 1642 dcb->entries = newentries; 1643 } 1644 1645 static bool 1646 apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf) 1647 { 1648 struct nouveau_drm *drm = nouveau_drm(dev); 1649 struct dcb_table *dcb = &drm->vbios.dcb; 1650 1651 /* Dell Precision M6300 1652 * DCB entry 2: 02025312 00000010 1653 * DCB entry 3: 02026312 00000020 1654 * 1655 * Identical, except apparently a different connector on a 1656 * different SOR link. Not a clue how we're supposed to know 1657 * which one is in use if it even shares an i2c line... 1658 * 1659 * Ignore the connector on the second SOR link to prevent 1660 * nasty problems until this is sorted (assuming it's not a 1661 * VBIOS bug). 1662 */ 1663 if (nv_match_device(dev, 0x040d, 0x1028, 0x019b)) { 1664 if (*conn == 0x02026312 && *conf == 0x00000020) 1665 return false; 1666 } 1667 1668 /* GeForce3 Ti 200 1669 * 1670 * DCB reports an LVDS output that should be TMDS: 1671 * DCB entry 1: f2005014 ffffffff 1672 */ 1673 if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) { 1674 if (*conn == 0xf2005014 && *conf == 0xffffffff) { 1675 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, 1); 1676 return false; 1677 } 1678 } 1679 1680 /* XFX GT-240X-YA 1681 * 1682 * So many things wrong here, replace the entire encoder table.. 1683 */ 1684 if (nv_match_device(dev, 0x0ca3, 0x1682, 0x3003)) { 1685 if (idx == 0) { 1686 *conn = 0x02001300; /* VGA, connector 1 */ 1687 *conf = 0x00000028; 1688 } else 1689 if (idx == 1) { 1690 *conn = 0x01010312; /* DVI, connector 0 */ 1691 *conf = 0x00020030; 1692 } else 1693 if (idx == 2) { 1694 *conn = 0x01010310; /* VGA, connector 0 */ 1695 *conf = 0x00000028; 1696 } else 1697 if (idx == 3) { 1698 *conn = 0x02022362; /* HDMI, connector 2 */ 1699 *conf = 0x00020010; 1700 } else { 1701 *conn = 0x0000000e; /* EOL */ 1702 *conf = 0x00000000; 1703 } 1704 } 1705 1706 /* Some other twisted XFX board (rhbz#694914) 1707 * 1708 * The DVI/VGA encoder combo that's supposed to represent the 1709 * DVI-I connector actually point at two different ones, and 1710 * the HDMI connector ends up paired with the VGA instead. 1711 * 1712 * Connector table is missing anything for VGA at all, pointing it 1713 * an invalid conntab entry 2 so we figure it out ourself. 1714 */ 1715 if (nv_match_device(dev, 0x0615, 0x1682, 0x2605)) { 1716 if (idx == 0) { 1717 *conn = 0x02002300; /* VGA, connector 2 */ 1718 *conf = 0x00000028; 1719 } else 1720 if (idx == 1) { 1721 *conn = 0x01010312; /* DVI, connector 0 */ 1722 *conf = 0x00020030; 1723 } else 1724 if (idx == 2) { 1725 *conn = 0x04020310; /* VGA, connector 0 */ 1726 *conf = 0x00000028; 1727 } else 1728 if (idx == 3) { 1729 *conn = 0x02021322; /* HDMI, connector 1 */ 1730 *conf = 0x00020010; 1731 } else { 1732 *conn = 0x0000000e; /* EOL */ 1733 *conf = 0x00000000; 1734 } 1735 } 1736 1737 /* fdo#50830: connector indices for VGA and DVI-I are backwards */ 1738 if (nv_match_device(dev, 0x0421, 0x3842, 0xc793)) { 1739 if (idx == 0 && *conn == 0x02000300) 1740 *conn = 0x02011300; 1741 else 1742 if (idx == 1 && *conn == 0x04011310) 1743 *conn = 0x04000310; 1744 else 1745 if (idx == 2 && *conn == 0x02011312) 1746 *conn = 0x02000312; 1747 } 1748 1749 return true; 1750 } 1751 1752 static void 1753 fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios) 1754 { 1755 struct dcb_table *dcb = &bios->dcb; 1756 int all_heads = (nv_two_heads(dev) ? 3 : 1); 1757 1758 #ifdef __powerpc__ 1759 /* Apple iMac G4 NV17 */ 1760 if (of_machine_is_compatible("PowerMac4,5")) { 1761 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, 1); 1762 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, 2); 1763 return; 1764 } 1765 #endif 1766 1767 /* Make up some sane defaults */ 1768 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1769 bios->legacy.i2c_indices.crt, 1, 1); 1770 1771 if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0) 1772 fabricate_dcb_output(dcb, DCB_OUTPUT_TV, 1773 bios->legacy.i2c_indices.tv, 1774 all_heads, 0); 1775 1776 else if (bios->tmds.output0_script_ptr || 1777 bios->tmds.output1_script_ptr) 1778 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1779 bios->legacy.i2c_indices.panel, 1780 all_heads, 1); 1781 } 1782 1783 static int 1784 parse_dcb_entry(struct drm_device *dev, void *data, int idx, u8 *outp) 1785 { 1786 struct nouveau_drm *drm = nouveau_drm(dev); 1787 struct dcb_table *dcb = &drm->vbios.dcb; 1788 u32 conf = (dcb->version >= 0x20) ? ROM32(outp[4]) : ROM32(outp[6]); 1789 u32 conn = ROM32(outp[0]); 1790 bool ret; 1791 1792 if (apply_dcb_encoder_quirks(dev, idx, &conn, &conf)) { 1793 struct dcb_output *entry = new_dcb_entry(dcb); 1794 1795 NV_INFO(drm, "DCB outp %02d: %08x %08x\n", idx, conn, conf); 1796 1797 if (dcb->version >= 0x20) 1798 ret = parse_dcb20_entry(dev, dcb, conn, conf, entry); 1799 else 1800 ret = parse_dcb15_entry(dev, dcb, conn, conf, entry); 1801 if (!ret) 1802 return 1; /* stop parsing */ 1803 1804 /* Ignore the I2C index for on-chip TV-out, as there 1805 * are cards with bogus values (nv31m in bug 23212), 1806 * and it's otherwise useless. 1807 */ 1808 if (entry->type == DCB_OUTPUT_TV && 1809 entry->location == DCB_LOC_ON_CHIP) 1810 entry->i2c_index = 0x0f; 1811 } 1812 1813 return 0; 1814 } 1815 1816 static void 1817 dcb_fake_connectors(struct nvbios *bios) 1818 { 1819 struct dcb_table *dcbt = &bios->dcb; 1820 u8 map[16] = { }; 1821 int i, idx = 0; 1822 1823 /* heuristic: if we ever get a non-zero connector field, assume 1824 * that all the indices are valid and we don't need fake them. 1825 * 1826 * and, as usual, a blacklist of boards with bad bios data.. 1827 */ 1828 if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) { 1829 for (i = 0; i < dcbt->entries; i++) { 1830 if (dcbt->entry[i].connector) 1831 return; 1832 } 1833 } 1834 1835 /* no useful connector info available, we need to make it up 1836 * ourselves. the rule here is: anything on the same i2c bus 1837 * is considered to be on the same connector. any output 1838 * without an associated i2c bus is assigned its own unique 1839 * connector index. 1840 */ 1841 for (i = 0; i < dcbt->entries; i++) { 1842 u8 i2c = dcbt->entry[i].i2c_index; 1843 if (i2c == 0x0f) { 1844 dcbt->entry[i].connector = idx++; 1845 } else { 1846 if (!map[i2c]) 1847 map[i2c] = ++idx; 1848 dcbt->entry[i].connector = map[i2c] - 1; 1849 } 1850 } 1851 1852 /* if we created more than one connector, destroy the connector 1853 * table - just in case it has random, rather than stub, entries. 1854 */ 1855 if (i > 1) { 1856 u8 *conntab = olddcb_conntab(bios->dev); 1857 if (conntab) 1858 conntab[0] = 0x00; 1859 } 1860 } 1861 1862 static int 1863 parse_dcb_table(struct drm_device *dev, struct nvbios *bios) 1864 { 1865 struct nouveau_drm *drm = nouveau_drm(dev); 1866 struct dcb_table *dcb = &bios->dcb; 1867 u8 *dcbt, *conn; 1868 int idx; 1869 1870 dcbt = olddcb_table(dev); 1871 if (!dcbt) { 1872 /* handle pre-DCB boards */ 1873 if (bios->type == NVBIOS_BMP) { 1874 fabricate_dcb_encoder_table(dev, bios); 1875 return 0; 1876 } 1877 1878 return -EINVAL; 1879 } 1880 1881 NV_INFO(drm, "DCB version %d.%d\n", dcbt[0] >> 4, dcbt[0] & 0xf); 1882 1883 dcb->version = dcbt[0]; 1884 olddcb_outp_foreach(dev, NULL, parse_dcb_entry); 1885 1886 /* 1887 * apart for v2.1+ not being known for requiring merging, this 1888 * guarantees dcbent->index is the index of the entry in the rom image 1889 */ 1890 if (dcb->version < 0x21) 1891 merge_like_dcb_entries(dev, dcb); 1892 1893 /* dump connector table entries to log, if any exist */ 1894 idx = -1; 1895 while ((conn = olddcb_conn(dev, ++idx))) { 1896 if (conn[0] != 0xff) { 1897 if (olddcb_conntab(dev)[3] < 4) 1898 NV_INFO(drm, "DCB conn %02d: %04x\n", 1899 idx, ROM16(conn[0])); 1900 else 1901 NV_INFO(drm, "DCB conn %02d: %08x\n", 1902 idx, ROM32(conn[0])); 1903 } 1904 } 1905 dcb_fake_connectors(bios); 1906 return 0; 1907 } 1908 1909 static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry) 1910 { 1911 /* 1912 * The header following the "HWSQ" signature has the number of entries, 1913 * and the entry size 1914 * 1915 * An entry consists of a dword to write to the sequencer control reg 1916 * (0x00001304), followed by the ucode bytes, written sequentially, 1917 * starting at reg 0x00001400 1918 */ 1919 1920 struct nouveau_drm *drm = nouveau_drm(dev); 1921 struct nvif_object *device = &drm->client.device.object; 1922 uint8_t bytes_to_write; 1923 uint16_t hwsq_entry_offset; 1924 int i; 1925 1926 if (bios->data[hwsq_offset] <= entry) { 1927 NV_ERROR(drm, "Too few entries in HW sequencer table for " 1928 "requested entry\n"); 1929 return -ENOENT; 1930 } 1931 1932 bytes_to_write = bios->data[hwsq_offset + 1]; 1933 1934 if (bytes_to_write != 36) { 1935 NV_ERROR(drm, "Unknown HW sequencer entry size\n"); 1936 return -EINVAL; 1937 } 1938 1939 NV_INFO(drm, "Loading NV17 power sequencing microcode\n"); 1940 1941 hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write; 1942 1943 /* set sequencer control */ 1944 nvif_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset])); 1945 bytes_to_write -= 4; 1946 1947 /* write ucode */ 1948 for (i = 0; i < bytes_to_write; i += 4) 1949 nvif_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4])); 1950 1951 /* twiddle NV_PBUS_DEBUG_4 */ 1952 nvif_wr32(device, NV_PBUS_DEBUG_4, nvif_rd32(device, NV_PBUS_DEBUG_4) | 0x18); 1953 1954 return 0; 1955 } 1956 1957 static int load_nv17_hw_sequencer_ucode(struct drm_device *dev, 1958 struct nvbios *bios) 1959 { 1960 /* 1961 * BMP based cards, from NV17, need a microcode loading to correctly 1962 * control the GPIO etc for LVDS panels 1963 * 1964 * BIT based cards seem to do this directly in the init scripts 1965 * 1966 * The microcode entries are found by the "HWSQ" signature. 1967 */ 1968 1969 static const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' }; 1970 const int sz = sizeof(hwsq_signature); 1971 int hwsq_offset; 1972 1973 hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz); 1974 if (!hwsq_offset) 1975 return 0; 1976 1977 /* always use entry 0? */ 1978 return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0); 1979 } 1980 1981 uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev) 1982 { 1983 struct nouveau_drm *drm = nouveau_drm(dev); 1984 struct nvbios *bios = &drm->vbios; 1985 static const uint8_t edid_sig[] = { 1986 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 }; 1987 uint16_t offset = 0; 1988 uint16_t newoffset; 1989 int searchlen = NV_PROM_SIZE; 1990 1991 if (bios->fp.edid) 1992 return bios->fp.edid; 1993 1994 while (searchlen) { 1995 newoffset = findstr(&bios->data[offset], searchlen, 1996 edid_sig, 8); 1997 if (!newoffset) 1998 return NULL; 1999 offset += newoffset; 2000 if (!nv_cksum(&bios->data[offset], EDID1_LEN)) 2001 break; 2002 2003 searchlen -= offset; 2004 offset++; 2005 } 2006 2007 NV_INFO(drm, "Found EDID in BIOS\n"); 2008 2009 return bios->fp.edid = &bios->data[offset]; 2010 } 2011 2012 static bool NVInitVBIOS(struct drm_device *dev) 2013 { 2014 struct nouveau_drm *drm = nouveau_drm(dev); 2015 struct nvkm_bios *bios = nvxx_bios(&drm->client.device); 2016 struct nvbios *legacy = &drm->vbios; 2017 2018 memset(legacy, 0, sizeof(struct nvbios)); 2019 spin_lock_init(&legacy->lock); 2020 legacy->dev = dev; 2021 2022 legacy->data = bios->data; 2023 legacy->length = bios->size; 2024 legacy->major_version = bios->version.major; 2025 legacy->chip_version = bios->version.chip; 2026 if (bios->bit_offset) { 2027 legacy->type = NVBIOS_BIT; 2028 legacy->offset = bios->bit_offset; 2029 return !parse_bit_structure(legacy, legacy->offset + 6); 2030 } else 2031 if (bios->bmp_offset) { 2032 legacy->type = NVBIOS_BMP; 2033 legacy->offset = bios->bmp_offset; 2034 return !parse_bmp_structure(dev, legacy, legacy->offset); 2035 } 2036 2037 return false; 2038 } 2039 2040 int 2041 nouveau_run_vbios_init(struct drm_device *dev) 2042 { 2043 struct nouveau_drm *drm = nouveau_drm(dev); 2044 struct nvbios *bios = &drm->vbios; 2045 int ret = 0; 2046 2047 /* Reset the BIOS head to 0. */ 2048 bios->state.crtchead = 0; 2049 2050 if (bios->major_version < 5) /* BMP only */ 2051 load_nv17_hw_sequencer_ucode(dev, bios); 2052 2053 if (bios->execute) { 2054 bios->fp.last_script_invoc = 0; 2055 bios->fp.lvds_init_run = false; 2056 } 2057 2058 return ret; 2059 } 2060 2061 static bool 2062 nouveau_bios_posted(struct drm_device *dev) 2063 { 2064 struct nouveau_drm *drm = nouveau_drm(dev); 2065 unsigned htotal; 2066 2067 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) 2068 return true; 2069 2070 htotal = NVReadVgaCrtc(dev, 0, 0x06); 2071 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8; 2072 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4; 2073 htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10; 2074 htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11; 2075 return (htotal != 0); 2076 } 2077 2078 int 2079 nouveau_bios_init(struct drm_device *dev) 2080 { 2081 struct nouveau_drm *drm = nouveau_drm(dev); 2082 struct nvbios *bios = &drm->vbios; 2083 int ret; 2084 2085 /* only relevant for PCI devices */ 2086 if (!dev->pdev) 2087 return 0; 2088 2089 if (!NVInitVBIOS(dev)) 2090 return -ENODEV; 2091 2092 ret = parse_dcb_table(dev, bios); 2093 if (ret) 2094 return ret; 2095 2096 if (!bios->major_version) /* we don't run version 0 bios */ 2097 return 0; 2098 2099 /* init script execution disabled */ 2100 bios->execute = false; 2101 2102 /* ... unless card isn't POSTed already */ 2103 if (!nouveau_bios_posted(dev)) { 2104 NV_INFO(drm, "Adaptor not initialised, " 2105 "running VBIOS init tables.\n"); 2106 bios->execute = true; 2107 } 2108 2109 ret = nouveau_run_vbios_init(dev); 2110 if (ret) 2111 return ret; 2112 2113 /* feature_byte on BMP is poor, but init always sets CR4B */ 2114 if (bios->major_version < 5) 2115 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40; 2116 2117 /* all BIT systems need p_f_m_t for digital_min_front_porch */ 2118 if (bios->is_mobile || bios->major_version >= 5) 2119 ret = parse_fp_mode_table(dev, bios); 2120 2121 /* allow subsequent scripts to execute */ 2122 bios->execute = true; 2123 2124 return 0; 2125 } 2126 2127 void 2128 nouveau_bios_takedown(struct drm_device *dev) 2129 { 2130 } 2131