1 #ifndef __NVKM_CLK_H__ 2 #define __NVKM_CLK_H__ 3 #include <core/subdev.h> 4 #include <core/notify.h> 5 struct nvbios_pll; 6 struct nvkm_pll_vals; 7 8 enum nv_clk_src { 9 nv_clk_src_crystal, 10 nv_clk_src_href, 11 12 nv_clk_src_hclk, 13 nv_clk_src_hclkm3, 14 nv_clk_src_hclkm3d2, 15 nv_clk_src_hclkm2d3, /* NVAA */ 16 nv_clk_src_hclkm4, /* NVAA */ 17 nv_clk_src_cclk, /* NVAA */ 18 19 nv_clk_src_host, 20 21 nv_clk_src_sppll0, 22 nv_clk_src_sppll1, 23 24 nv_clk_src_mpllsrcref, 25 nv_clk_src_mpllsrc, 26 nv_clk_src_mpll, 27 nv_clk_src_mdiv, 28 29 nv_clk_src_core, 30 nv_clk_src_core_intm, 31 nv_clk_src_shader, 32 33 nv_clk_src_mem, 34 35 nv_clk_src_gpc, 36 nv_clk_src_rop, 37 nv_clk_src_hubk01, 38 nv_clk_src_hubk06, 39 nv_clk_src_hubk07, 40 nv_clk_src_copy, 41 nv_clk_src_daemon, 42 nv_clk_src_disp, 43 nv_clk_src_vdec, 44 45 nv_clk_src_dom6, 46 47 nv_clk_src_max, 48 }; 49 50 struct nvkm_cstate { 51 struct list_head head; 52 u8 voltage; 53 u32 domain[nv_clk_src_max]; 54 }; 55 56 struct nvkm_pstate { 57 struct list_head head; 58 struct list_head list; /* c-states */ 59 struct nvkm_cstate base; 60 u8 pstate; 61 u8 fanspeed; 62 }; 63 64 struct nvkm_domain { 65 enum nv_clk_src name; 66 u8 bios; /* 0xff for none */ 67 #define NVKM_CLK_DOM_FLAG_CORE 0x01 68 u8 flags; 69 const char *mname; 70 int mdiv; 71 }; 72 73 struct nvkm_clk { 74 const struct nvkm_clk_func *func; 75 struct nvkm_subdev subdev; 76 77 const struct nvkm_domain *domains; 78 struct nvkm_pstate bstate; 79 80 struct list_head states; 81 int state_nr; 82 83 struct work_struct work; 84 wait_queue_head_t wait; 85 atomic_t waiting; 86 87 struct nvkm_notify pwrsrc_ntfy; 88 int pwrsrc; 89 int pstate; /* current */ 90 int ustate_ac; /* user-requested (-1 disabled, -2 perfmon) */ 91 int ustate_dc; /* user-requested (-1 disabled, -2 perfmon) */ 92 int astate; /* perfmon adjustment (base) */ 93 int tstate; /* thermal adjustment (max-) */ 94 int dstate; /* display adjustment (min+) */ 95 96 bool allow_reclock; 97 98 /*XXX: die, these are here *only* to support the completely 99 * bat-shit insane what-was-nouveau_hw.c code 100 */ 101 int (*pll_calc)(struct nvkm_clk *, struct nvbios_pll *, int clk, 102 struct nvkm_pll_vals *pv); 103 int (*pll_prog)(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *pv); 104 }; 105 106 int nvkm_clk_read(struct nvkm_clk *, enum nv_clk_src); 107 int nvkm_clk_ustate(struct nvkm_clk *, int req, int pwr); 108 int nvkm_clk_astate(struct nvkm_clk *, int req, int rel, bool wait); 109 int nvkm_clk_dstate(struct nvkm_clk *, int req, int rel); 110 int nvkm_clk_tstate(struct nvkm_clk *, int req, int rel); 111 112 int nv04_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 113 int nv40_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 114 int nv50_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 115 int g84_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 116 int mcp77_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 117 int gt215_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 118 int gf100_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 119 int gk104_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 120 int gk20a_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 121 #endif 122