1 #ifndef __NVKM_CLK_H__ 2 #define __NVKM_CLK_H__ 3 #include <core/subdev.h> 4 #include <core/notify.h> 5 #include <subdev/pci.h> 6 struct nvbios_pll; 7 struct nvkm_pll_vals; 8 9 enum nv_clk_src { 10 nv_clk_src_crystal, 11 nv_clk_src_href, 12 13 nv_clk_src_hclk, 14 nv_clk_src_hclkm3, 15 nv_clk_src_hclkm3d2, 16 nv_clk_src_hclkm2d3, /* NVAA */ 17 nv_clk_src_hclkm4, /* NVAA */ 18 nv_clk_src_cclk, /* NVAA */ 19 20 nv_clk_src_host, 21 22 nv_clk_src_sppll0, 23 nv_clk_src_sppll1, 24 25 nv_clk_src_mpllsrcref, 26 nv_clk_src_mpllsrc, 27 nv_clk_src_mpll, 28 nv_clk_src_mdiv, 29 30 nv_clk_src_core, 31 nv_clk_src_core_intm, 32 nv_clk_src_shader, 33 34 nv_clk_src_mem, 35 36 nv_clk_src_gpc, 37 nv_clk_src_rop, 38 nv_clk_src_hubk01, 39 nv_clk_src_hubk06, 40 nv_clk_src_hubk07, 41 nv_clk_src_copy, 42 nv_clk_src_pmu, 43 nv_clk_src_disp, 44 nv_clk_src_vdec, 45 46 nv_clk_src_dom6, 47 48 nv_clk_src_max, 49 }; 50 51 struct nvkm_cstate { 52 struct list_head head; 53 u8 voltage; 54 u32 domain[nv_clk_src_max]; 55 }; 56 57 struct nvkm_pstate { 58 struct list_head head; 59 struct list_head list; /* c-states */ 60 struct nvkm_cstate base; 61 u8 pstate; 62 u8 fanspeed; 63 enum nvkm_pcie_speed pcie_speed; 64 u8 pcie_width; 65 }; 66 67 struct nvkm_domain { 68 enum nv_clk_src name; 69 u8 bios; /* 0xff for none */ 70 #define NVKM_CLK_DOM_FLAG_CORE 0x01 71 u8 flags; 72 const char *mname; 73 int mdiv; 74 }; 75 76 struct nvkm_clk { 77 const struct nvkm_clk_func *func; 78 struct nvkm_subdev subdev; 79 80 const struct nvkm_domain *domains; 81 struct nvkm_pstate bstate; 82 83 struct list_head states; 84 int state_nr; 85 86 struct work_struct work; 87 wait_queue_head_t wait; 88 atomic_t waiting; 89 90 struct nvkm_notify pwrsrc_ntfy; 91 int pwrsrc; 92 int pstate; /* current */ 93 int ustate_ac; /* user-requested (-1 disabled, -2 perfmon) */ 94 int ustate_dc; /* user-requested (-1 disabled, -2 perfmon) */ 95 int astate; /* perfmon adjustment (base) */ 96 int tstate; /* thermal adjustment (max-) */ 97 int dstate; /* display adjustment (min+) */ 98 99 bool allow_reclock; 100 101 /*XXX: die, these are here *only* to support the completely 102 * bat-shit insane what-was-nouveau_hw.c code 103 */ 104 int (*pll_calc)(struct nvkm_clk *, struct nvbios_pll *, int clk, 105 struct nvkm_pll_vals *pv); 106 int (*pll_prog)(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *pv); 107 }; 108 109 int nvkm_clk_read(struct nvkm_clk *, enum nv_clk_src); 110 int nvkm_clk_ustate(struct nvkm_clk *, int req, int pwr); 111 int nvkm_clk_astate(struct nvkm_clk *, int req, int rel, bool wait); 112 int nvkm_clk_dstate(struct nvkm_clk *, int req, int rel); 113 int nvkm_clk_tstate(struct nvkm_clk *, int req, int rel); 114 115 int nv04_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 116 int nv40_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 117 int nv50_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 118 int g84_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 119 int mcp77_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 120 int gt215_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 121 int gf100_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 122 int gk104_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 123 int gk20a_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 124 int gm20b_clk_new(struct nvkm_device *, int, struct nvkm_clk **); 125 #endif 126