xref: /linux/drivers/gpu/drm/nouveau/include/nvfw/hs.h (revision 9f2c9170934eace462499ba0bfe042cc72900173)
1 /* SPDX-License-Identifier: MIT */
2 #ifndef __NVFW_HS_H__
3 #define __NVFW_HS_H__
4 #include <core/os.h>
5 struct nvkm_subdev;
6 
7 struct nvfw_hs_header {
8 	u32 sig_dbg_offset;
9 	u32 sig_dbg_size;
10 	u32 sig_prod_offset;
11 	u32 sig_prod_size;
12 	u32 patch_loc;
13 	u32 patch_sig;
14 	u32 hdr_offset;
15 	u32 hdr_size;
16 };
17 
18 const struct nvfw_hs_header *nvfw_hs_header(struct nvkm_subdev *, const void *);
19 
20 struct nvfw_hs_header_v2 {
21 	u32 sig_prod_offset;
22 	u32 sig_prod_size;
23 	u32 patch_loc;
24 	u32 patch_sig;
25 	u32 meta_data_offset;
26 	u32 meta_data_size;
27 	u32 num_sig;
28 	u32 header_offset;
29 	u32 header_size;
30 };
31 
32 const struct nvfw_hs_header_v2 *nvfw_hs_header_v2(struct nvkm_subdev *, const void *);
33 
34 struct nvfw_hs_load_header {
35 	u32 non_sec_code_off;
36 	u32 non_sec_code_size;
37 	u32 data_dma_base;
38 	u32 data_size;
39 	u32 num_apps;
40 	u32 apps[];
41 };
42 
43 const struct nvfw_hs_load_header *
44 nvfw_hs_load_header(struct nvkm_subdev *, const void *);
45 
46 struct nvfw_hs_load_header_v2 {
47 	u32 os_code_offset;
48 	u32 os_code_size;
49 	u32 os_data_offset;
50 	u32 os_data_size;
51 	u32 num_apps;
52 	struct {
53 		u32 offset;
54 		u32 size;
55 	} app[0];
56 };
57 
58 const struct nvfw_hs_load_header_v2 *nvfw_hs_load_header_v2(struct nvkm_subdev *, const void *);
59 #endif
60