xref: /linux/drivers/gpu/drm/nouveau/dispnv50/wndw.c (revision 88b600d421a5550cd56e13f2eda34cbefe417c28)
1 /*
2  * Copyright 2018 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 #include "wndw.h"
23 
24 #include <nvif/class.h>
25 #include <nvif/cl0002.h>
26 
27 #include <drm/drm_atomic_helper.h>
28 #include "nouveau_bo.h"
29 
30 static void
31 nv50_wndw_ctxdma_del(struct nv50_wndw_ctxdma *ctxdma)
32 {
33 	nvif_object_fini(&ctxdma->object);
34 	list_del(&ctxdma->head);
35 	kfree(ctxdma);
36 }
37 
38 static struct nv50_wndw_ctxdma *
39 nv50_wndw_ctxdma_new(struct nv50_wndw *wndw, struct nouveau_framebuffer *fb)
40 {
41 	struct nouveau_drm *drm = nouveau_drm(fb->base.dev);
42 	struct nv50_wndw_ctxdma *ctxdma;
43 	const u8    kind = fb->nvbo->kind;
44 	const u32 handle = 0xfb000000 | kind;
45 	struct {
46 		struct nv_dma_v0 base;
47 		union {
48 			struct nv50_dma_v0 nv50;
49 			struct gf100_dma_v0 gf100;
50 			struct gf119_dma_v0 gf119;
51 		};
52 	} args = {};
53 	u32 argc = sizeof(args.base);
54 	int ret;
55 
56 	list_for_each_entry(ctxdma, &wndw->ctxdma.list, head) {
57 		if (ctxdma->object.handle == handle)
58 			return ctxdma;
59 	}
60 
61 	if (!(ctxdma = kzalloc(sizeof(*ctxdma), GFP_KERNEL)))
62 		return ERR_PTR(-ENOMEM);
63 	list_add(&ctxdma->head, &wndw->ctxdma.list);
64 
65 	args.base.target = NV_DMA_V0_TARGET_VRAM;
66 	args.base.access = NV_DMA_V0_ACCESS_RDWR;
67 	args.base.start  = 0;
68 	args.base.limit  = drm->client.device.info.ram_user - 1;
69 
70 	if (drm->client.device.info.chipset < 0x80) {
71 		args.nv50.part = NV50_DMA_V0_PART_256;
72 		argc += sizeof(args.nv50);
73 	} else
74 	if (drm->client.device.info.chipset < 0xc0) {
75 		args.nv50.part = NV50_DMA_V0_PART_256;
76 		args.nv50.kind = kind;
77 		argc += sizeof(args.nv50);
78 	} else
79 	if (drm->client.device.info.chipset < 0xd0) {
80 		args.gf100.kind = kind;
81 		argc += sizeof(args.gf100);
82 	} else {
83 		args.gf119.page = GF119_DMA_V0_PAGE_LP;
84 		args.gf119.kind = kind;
85 		argc += sizeof(args.gf119);
86 	}
87 
88 	ret = nvif_object_init(wndw->ctxdma.parent, handle, NV_DMA_IN_MEMORY,
89 			       &args, argc, &ctxdma->object);
90 	if (ret) {
91 		nv50_wndw_ctxdma_del(ctxdma);
92 		return ERR_PTR(ret);
93 	}
94 
95 	return ctxdma;
96 }
97 
98 int
99 nv50_wndw_wait_armed(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
100 {
101 	struct nv50_disp *disp = nv50_disp(wndw->plane.dev);
102 	if (asyw->set.ntfy) {
103 		return wndw->func->ntfy_wait_begun(disp->sync,
104 						   asyw->ntfy.offset,
105 						   wndw->wndw.base.device);
106 	}
107 	return 0;
108 }
109 
110 void
111 nv50_wndw_flush_clr(struct nv50_wndw *wndw, u32 *interlock, bool flush,
112 		    struct nv50_wndw_atom *asyw)
113 {
114 	union nv50_wndw_atom_mask clr = {
115 		.mask = asyw->clr.mask & ~(flush ? 0 : asyw->set.mask),
116 	};
117 	if (clr.sema ) wndw->func-> sema_clr(wndw);
118 	if (clr.ntfy ) wndw->func-> ntfy_clr(wndw);
119 	if (clr.xlut ) wndw->func-> xlut_clr(wndw);
120 	if (clr.image) wndw->func->image_clr(wndw);
121 
122 	interlock[wndw->interlock.type] |= wndw->interlock.data;
123 }
124 
125 void
126 nv50_wndw_flush_set(struct nv50_wndw *wndw, u32 *interlock,
127 		    struct nv50_wndw_atom *asyw)
128 {
129 	if (interlock) {
130 		asyw->image.mode = 0;
131 		asyw->image.interval = 1;
132 	}
133 
134 	if (asyw->set.sema ) wndw->func->sema_set (wndw, asyw);
135 	if (asyw->set.ntfy ) wndw->func->ntfy_set (wndw, asyw);
136 	if (asyw->set.image) wndw->func->image_set(wndw, asyw);
137 
138 	if (asyw->set.xlut ) {
139 		if (asyw->ilut) {
140 			asyw->xlut.i.offset =
141 				nv50_lut_load(&wndw->ilut,
142 					      asyw->xlut.i.mode <= 1,
143 					      asyw->xlut.i.buffer,
144 					      asyw->ilut);
145 		}
146 		wndw->func->xlut_set(wndw, asyw);
147 	}
148 
149 	if (asyw->set.point) {
150 		wndw->immd->point(wndw, asyw);
151 		wndw->immd->update(wndw, interlock);
152 	}
153 
154 	interlock[wndw->interlock.type] |= wndw->interlock.data;
155 }
156 
157 void
158 nv50_wndw_ntfy_enable(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
159 {
160 	struct nv50_disp *disp = nv50_disp(wndw->plane.dev);
161 
162 	asyw->ntfy.handle = wndw->wndw.sync.handle;
163 	asyw->ntfy.offset = wndw->ntfy;
164 	asyw->ntfy.awaken = false;
165 	asyw->set.ntfy = true;
166 
167 	wndw->func->ntfy_reset(disp->sync, wndw->ntfy);
168 	wndw->ntfy ^= 0x10;
169 }
170 
171 static void
172 nv50_wndw_atomic_check_release(struct nv50_wndw *wndw,
173 			       struct nv50_wndw_atom *asyw,
174 			       struct nv50_head_atom *asyh)
175 {
176 	struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev);
177 	NV_ATOMIC(drm, "%s release\n", wndw->plane.name);
178 	wndw->func->release(wndw, asyw, asyh);
179 	asyw->ntfy.handle = 0;
180 	asyw->sema.handle = 0;
181 }
182 
183 static int
184 nv50_wndw_atomic_check_acquire_rgb(struct nv50_wndw_atom *asyw)
185 {
186 	switch (asyw->state.fb->format->format) {
187 	case DRM_FORMAT_C8         : asyw->image.format = 0x1e; break;
188 	case DRM_FORMAT_XRGB8888   :
189 	case DRM_FORMAT_ARGB8888   : asyw->image.format = 0xcf; break;
190 	case DRM_FORMAT_RGB565     : asyw->image.format = 0xe8; break;
191 	case DRM_FORMAT_XRGB1555   :
192 	case DRM_FORMAT_ARGB1555   : asyw->image.format = 0xe9; break;
193 	case DRM_FORMAT_XBGR2101010:
194 	case DRM_FORMAT_ABGR2101010: asyw->image.format = 0xd1; break;
195 	case DRM_FORMAT_XBGR8888   :
196 	case DRM_FORMAT_ABGR8888   : asyw->image.format = 0xd5; break;
197 	case DRM_FORMAT_XRGB2101010:
198 	case DRM_FORMAT_ARGB2101010: asyw->image.format = 0xdf; break;
199 	default:
200 		WARN_ON(1);
201 		return -EINVAL;
202 	}
203 	return 0;
204 }
205 
206 static int
207 nv50_wndw_atomic_check_acquire(struct nv50_wndw *wndw, bool modeset,
208 			       struct nv50_wndw_atom *armw,
209 			       struct nv50_wndw_atom *asyw,
210 			       struct nv50_head_atom *asyh)
211 {
212 	struct nouveau_framebuffer *fb = nouveau_framebuffer(asyw->state.fb);
213 	struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev);
214 	int ret;
215 
216 	NV_ATOMIC(drm, "%s acquire\n", wndw->plane.name);
217 
218 	if (asyw->state.fb != armw->state.fb || !armw->visible || modeset) {
219 		asyw->image.w = fb->base.width;
220 		asyw->image.h = fb->base.height;
221 		asyw->image.kind = fb->nvbo->kind;
222 
223 		ret = nv50_wndw_atomic_check_acquire_rgb(asyw);
224 		if (ret)
225 			return ret;
226 
227 		if (asyw->image.kind) {
228 			asyw->image.layout = 0;
229 			if (drm->client.device.info.chipset >= 0xc0)
230 				asyw->image.blockh = fb->nvbo->mode >> 4;
231 			else
232 				asyw->image.blockh = fb->nvbo->mode;
233 			asyw->image.blocks[0] = fb->base.pitches[0] / 64;
234 			asyw->image.pitch[0] = 0;
235 		} else {
236 			asyw->image.layout = 1;
237 			asyw->image.blockh = 0;
238 			asyw->image.blocks[0] = 0;
239 			asyw->image.pitch[0] = fb->base.pitches[0];
240 		}
241 
242 		if (!(asyh->state.pageflip_flags & DRM_MODE_PAGE_FLIP_ASYNC))
243 			asyw->image.interval = 1;
244 		else
245 			asyw->image.interval = 0;
246 		asyw->image.mode = asyw->image.interval ? 0 : 1;
247 		asyw->set.image = wndw->func->image_set != NULL;
248 	}
249 
250 	if (wndw->immd) {
251 		asyw->point.x = asyw->state.crtc_x;
252 		asyw->point.y = asyw->state.crtc_y;
253 		if (memcmp(&armw->point, &asyw->point, sizeof(asyw->point)))
254 			asyw->set.point = true;
255 	}
256 
257 	return wndw->func->acquire(wndw, asyw, asyh);
258 }
259 
260 static void
261 nv50_wndw_atomic_check_lut(struct nv50_wndw *wndw,
262 			   struct nv50_wndw_atom *armw,
263 			   struct nv50_wndw_atom *asyw,
264 			   struct nv50_head_atom *asyh)
265 {
266 	struct drm_property_blob *ilut = asyh->state.degamma_lut;
267 
268 	/* I8 format without an input LUT makes no sense, and the
269 	 * HW error-checks for this.
270 	 *
271 	 * In order to handle legacy gamma, when there's no input
272 	 * LUT we need to steal the output LUT and use it instead.
273 	 */
274 	if (!ilut && asyw->state.fb->format->format == DRM_FORMAT_C8) {
275 		/* This should be an error, but there's legacy clients
276 		 * that do a modeset before providing a gamma table.
277 		 *
278 		 * We keep the window disabled to avoid angering HW.
279 		 */
280 		if (!(ilut = asyh->state.gamma_lut)) {
281 			asyw->visible = false;
282 			return;
283 		}
284 
285 		if (wndw->func->ilut)
286 			asyh->wndw.olut |= BIT(wndw->id);
287 	} else {
288 		asyh->wndw.olut &= ~BIT(wndw->id);
289 	}
290 
291 	/* Recalculate LUT state. */
292 	memset(&asyw->xlut, 0x00, sizeof(asyw->xlut));
293 	if ((asyw->ilut = wndw->func->ilut ? ilut : NULL)) {
294 		wndw->func->ilut(wndw, asyw);
295 		asyw->xlut.handle = wndw->wndw.vram.handle;
296 		asyw->xlut.i.buffer = !asyw->xlut.i.buffer;
297 		asyw->set.xlut = true;
298 	}
299 
300 	/* Handle setting base SET_OUTPUT_LUT_LO_ENABLE_USE_CORE_LUT. */
301 	if (wndw->func->olut_core &&
302 	    (!armw->visible || (armw->xlut.handle && !asyw->xlut.handle)))
303 		asyw->set.xlut = true;
304 
305 	/* Can't do an immediate flip while changing the LUT. */
306 	asyh->state.pageflip_flags &= ~DRM_MODE_PAGE_FLIP_ASYNC;
307 }
308 
309 static int
310 nv50_wndw_atomic_check(struct drm_plane *plane, struct drm_plane_state *state)
311 {
312 	struct nouveau_drm *drm = nouveau_drm(plane->dev);
313 	struct nv50_wndw *wndw = nv50_wndw(plane);
314 	struct nv50_wndw_atom *armw = nv50_wndw_atom(wndw->plane.state);
315 	struct nv50_wndw_atom *asyw = nv50_wndw_atom(state);
316 	struct nv50_head_atom *harm = NULL, *asyh = NULL;
317 	bool modeset = false;
318 	int ret;
319 
320 	NV_ATOMIC(drm, "%s atomic_check\n", plane->name);
321 
322 	/* Fetch the assembly state for the head the window will belong to,
323 	 * and determine whether the window will be visible.
324 	 */
325 	if (asyw->state.crtc) {
326 		asyh = nv50_head_atom_get(asyw->state.state, asyw->state.crtc);
327 		if (IS_ERR(asyh))
328 			return PTR_ERR(asyh);
329 		modeset = drm_atomic_crtc_needs_modeset(&asyh->state);
330 		asyw->visible = asyh->state.active;
331 	} else {
332 		asyw->visible = false;
333 	}
334 
335 	/* Fetch assembly state for the head the window used to belong to. */
336 	if (armw->state.crtc) {
337 		harm = nv50_head_atom_get(asyw->state.state, armw->state.crtc);
338 		if (IS_ERR(harm))
339 			return PTR_ERR(harm);
340 	}
341 
342 	/* LUT configuration can potentially cause the window to be disabled. */
343 	if (asyw->visible && wndw->func->xlut_set &&
344 	    (!armw->visible ||
345 	     asyh->state.color_mgmt_changed ||
346 	     asyw->state.fb->format->format !=
347 	     armw->state.fb->format->format))
348 		nv50_wndw_atomic_check_lut(wndw, armw, asyw, asyh);
349 
350 	/* Calculate new window state. */
351 	if (asyw->visible) {
352 		ret = nv50_wndw_atomic_check_acquire(wndw, modeset,
353 						     armw, asyw, asyh);
354 		if (ret)
355 			return ret;
356 
357 		asyh->wndw.mask |= BIT(wndw->id);
358 	} else
359 	if (armw->visible) {
360 		nv50_wndw_atomic_check_release(wndw, asyw, harm);
361 		harm->wndw.mask &= ~BIT(wndw->id);
362 	} else {
363 		return 0;
364 	}
365 
366 	/* Aside from the obvious case where the window is actively being
367 	 * disabled, we might also need to temporarily disable the window
368 	 * when performing certain modeset operations.
369 	 */
370 	if (!asyw->visible || modeset) {
371 		asyw->clr.ntfy = armw->ntfy.handle != 0;
372 		asyw->clr.sema = armw->sema.handle != 0;
373 		asyw->clr.xlut = armw->xlut.handle != 0;
374 		if (wndw->func->image_clr)
375 			asyw->clr.image = armw->image.handle[0] != 0;
376 	}
377 
378 	return 0;
379 }
380 
381 static void
382 nv50_wndw_cleanup_fb(struct drm_plane *plane, struct drm_plane_state *old_state)
383 {
384 	struct nouveau_framebuffer *fb = nouveau_framebuffer(old_state->fb);
385 	struct nouveau_drm *drm = nouveau_drm(plane->dev);
386 
387 	NV_ATOMIC(drm, "%s cleanup: %p\n", plane->name, old_state->fb);
388 	if (!old_state->fb)
389 		return;
390 
391 	nouveau_bo_unpin(fb->nvbo);
392 }
393 
394 static int
395 nv50_wndw_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state)
396 {
397 	struct nouveau_framebuffer *fb = nouveau_framebuffer(state->fb);
398 	struct nouveau_drm *drm = nouveau_drm(plane->dev);
399 	struct nv50_wndw *wndw = nv50_wndw(plane);
400 	struct nv50_wndw_atom *asyw = nv50_wndw_atom(state);
401 	struct nv50_head_atom *asyh;
402 	struct nv50_wndw_ctxdma *ctxdma;
403 	int ret;
404 
405 	NV_ATOMIC(drm, "%s prepare: %p\n", plane->name, state->fb);
406 	if (!asyw->state.fb)
407 		return 0;
408 
409 	ret = nouveau_bo_pin(fb->nvbo, TTM_PL_FLAG_VRAM, true);
410 	if (ret)
411 		return ret;
412 
413 	ctxdma = nv50_wndw_ctxdma_new(wndw, fb);
414 	if (IS_ERR(ctxdma)) {
415 		nouveau_bo_unpin(fb->nvbo);
416 		return PTR_ERR(ctxdma);
417 	}
418 
419 	asyw->state.fence = reservation_object_get_excl_rcu(fb->nvbo->bo.resv);
420 	asyw->image.handle[0] = ctxdma->object.handle;
421 	asyw->image.offset[0] = fb->nvbo->bo.offset;
422 
423 	if (wndw->func->prepare) {
424 		asyh = nv50_head_atom_get(asyw->state.state, asyw->state.crtc);
425 		if (IS_ERR(asyh))
426 			return PTR_ERR(asyh);
427 
428 		wndw->func->prepare(wndw, asyh, asyw);
429 	}
430 
431 	return 0;
432 }
433 
434 static const struct drm_plane_helper_funcs
435 nv50_wndw_helper = {
436 	.prepare_fb = nv50_wndw_prepare_fb,
437 	.cleanup_fb = nv50_wndw_cleanup_fb,
438 	.atomic_check = nv50_wndw_atomic_check,
439 };
440 
441 static void
442 nv50_wndw_atomic_destroy_state(struct drm_plane *plane,
443 			       struct drm_plane_state *state)
444 {
445 	struct nv50_wndw_atom *asyw = nv50_wndw_atom(state);
446 	__drm_atomic_helper_plane_destroy_state(&asyw->state);
447 	kfree(asyw);
448 }
449 
450 static struct drm_plane_state *
451 nv50_wndw_atomic_duplicate_state(struct drm_plane *plane)
452 {
453 	struct nv50_wndw_atom *armw = nv50_wndw_atom(plane->state);
454 	struct nv50_wndw_atom *asyw;
455 	if (!(asyw = kmalloc(sizeof(*asyw), GFP_KERNEL)))
456 		return NULL;
457 	__drm_atomic_helper_plane_duplicate_state(plane, &asyw->state);
458 	asyw->sema = armw->sema;
459 	asyw->ntfy = armw->ntfy;
460 	asyw->ilut = NULL;
461 	asyw->xlut = armw->xlut;
462 	asyw->image = armw->image;
463 	asyw->point = armw->point;
464 	asyw->clr.mask = 0;
465 	asyw->set.mask = 0;
466 	return &asyw->state;
467 }
468 
469 static void
470 nv50_wndw_reset(struct drm_plane *plane)
471 {
472 	struct nv50_wndw_atom *asyw;
473 
474 	if (WARN_ON(!(asyw = kzalloc(sizeof(*asyw), GFP_KERNEL))))
475 		return;
476 
477 	if (plane->state)
478 		plane->funcs->atomic_destroy_state(plane, plane->state);
479 	plane->state = &asyw->state;
480 	plane->state->plane = plane;
481 	plane->state->rotation = DRM_MODE_ROTATE_0;
482 }
483 
484 static void
485 nv50_wndw_destroy(struct drm_plane *plane)
486 {
487 	struct nv50_wndw *wndw = nv50_wndw(plane);
488 	struct nv50_wndw_ctxdma *ctxdma, *ctxtmp;
489 
490 	list_for_each_entry_safe(ctxdma, ctxtmp, &wndw->ctxdma.list, head) {
491 		nv50_wndw_ctxdma_del(ctxdma);
492 	}
493 
494 	nvif_notify_fini(&wndw->notify);
495 	nv50_dmac_destroy(&wndw->wimm);
496 	nv50_dmac_destroy(&wndw->wndw);
497 
498 	nv50_lut_fini(&wndw->ilut);
499 
500 	drm_plane_cleanup(&wndw->plane);
501 	kfree(wndw);
502 }
503 
504 const struct drm_plane_funcs
505 nv50_wndw = {
506 	.update_plane = drm_atomic_helper_update_plane,
507 	.disable_plane = drm_atomic_helper_disable_plane,
508 	.destroy = nv50_wndw_destroy,
509 	.reset = nv50_wndw_reset,
510 	.atomic_duplicate_state = nv50_wndw_atomic_duplicate_state,
511 	.atomic_destroy_state = nv50_wndw_atomic_destroy_state,
512 };
513 
514 static int
515 nv50_wndw_notify(struct nvif_notify *notify)
516 {
517 	return NVIF_NOTIFY_KEEP;
518 }
519 
520 void
521 nv50_wndw_fini(struct nv50_wndw *wndw)
522 {
523 	nvif_notify_put(&wndw->notify);
524 }
525 
526 void
527 nv50_wndw_init(struct nv50_wndw *wndw)
528 {
529 	nvif_notify_get(&wndw->notify);
530 }
531 
532 int
533 nv50_wndw_new_(const struct nv50_wndw_func *func, struct drm_device *dev,
534 	       enum drm_plane_type type, const char *name, int index,
535 	       const u32 *format, u32 heads,
536 	       enum nv50_disp_interlock_type interlock_type, u32 interlock_data,
537 	       struct nv50_wndw **pwndw)
538 {
539 	struct nouveau_drm *drm = nouveau_drm(dev);
540 	struct nvif_mmu *mmu = &drm->client.mmu;
541 	struct nv50_disp *disp = nv50_disp(dev);
542 	struct nv50_wndw *wndw;
543 	int nformat;
544 	int ret;
545 
546 	if (!(wndw = *pwndw = kzalloc(sizeof(*wndw), GFP_KERNEL)))
547 		return -ENOMEM;
548 	wndw->func = func;
549 	wndw->id = index;
550 	wndw->interlock.type = interlock_type;
551 	wndw->interlock.data = interlock_data;
552 	wndw->ctxdma.parent = &wndw->wndw.base.user;
553 
554 	wndw->ctxdma.parent = &wndw->wndw.base.user;
555 	INIT_LIST_HEAD(&wndw->ctxdma.list);
556 
557 	for (nformat = 0; format[nformat]; nformat++);
558 
559 	ret = drm_universal_plane_init(dev, &wndw->plane, heads, &nv50_wndw,
560 				       format, nformat, NULL,
561 				       type, "%s-%d", name, index);
562 	if (ret) {
563 		kfree(*pwndw);
564 		*pwndw = NULL;
565 		return ret;
566 	}
567 
568 	drm_plane_helper_add(&wndw->plane, &nv50_wndw_helper);
569 
570 	if (wndw->func->ilut) {
571 		ret = nv50_lut_init(disp, mmu, &wndw->ilut);
572 		if (ret)
573 			return ret;
574 	}
575 
576 	wndw->notify.func = nv50_wndw_notify;
577 	return 0;
578 }
579