xref: /linux/drivers/gpu/drm/nouveau/dispnv50/disp.h (revision 4f77c3462308c62ffe7129cc18b9ac937f44b5a5)
1 #ifndef __NV50_KMS_H__
2 #define __NV50_KMS_H__
3 #include <linux/workqueue.h>
4 #include <nvif/mem.h>
5 #include <nvif/push.h>
6 
7 #include "nouveau_display.h"
8 
9 struct nv50_msto;
10 struct nouveau_encoder;
11 
12 struct nv50_disp {
13 	struct nvif_disp *disp;
14 	struct nv50_core *core;
15 	struct nvif_object caps;
16 
17 #define NV50_DISP_SYNC(c, o)                                ((c) * 0x040 + (o))
18 #define NV50_DISP_CORE_NTFY                       NV50_DISP_SYNC(0      , 0x00)
19 #define NV50_DISP_WNDW_SEM0(c)                    NV50_DISP_SYNC(1 + (c), 0x00)
20 #define NV50_DISP_WNDW_SEM1(c)                    NV50_DISP_SYNC(1 + (c), 0x10)
21 #define NV50_DISP_WNDW_NTFY(c)                    NV50_DISP_SYNC(1 + (c), 0x20)
22 #define NV50_DISP_BASE_SEM0(c)                    NV50_DISP_WNDW_SEM0(0 + (c))
23 #define NV50_DISP_BASE_SEM1(c)                    NV50_DISP_WNDW_SEM1(0 + (c))
24 #define NV50_DISP_BASE_NTFY(c)                    NV50_DISP_WNDW_NTFY(0 + (c))
25 #define NV50_DISP_OVLY_SEM0(c)                    NV50_DISP_WNDW_SEM0(4 + (c))
26 #define NV50_DISP_OVLY_SEM1(c)                    NV50_DISP_WNDW_SEM1(4 + (c))
27 #define NV50_DISP_OVLY_NTFY(c)                    NV50_DISP_WNDW_NTFY(4 + (c))
28 	struct nouveau_bo *sync;
29 
30 	struct mutex mutex;
31 };
32 
33 static inline struct nv50_disp *
34 nv50_disp(struct drm_device *dev)
35 {
36 	return nouveau_display(dev)->priv;
37 }
38 
39 struct nv50_disp_interlock {
40 	enum nv50_disp_interlock_type {
41 		NV50_DISP_INTERLOCK_CORE = 0,
42 		NV50_DISP_INTERLOCK_CURS,
43 		NV50_DISP_INTERLOCK_BASE,
44 		NV50_DISP_INTERLOCK_OVLY,
45 		NV50_DISP_INTERLOCK_WNDW,
46 		NV50_DISP_INTERLOCK_WIMM,
47 		NV50_DISP_INTERLOCK__SIZE
48 	} type;
49 	u32 data;
50 	u32 wimm;
51 };
52 
53 void corec37d_ntfy_init(struct nouveau_bo *, u32);
54 
55 void head907d_olut_load(struct drm_color_lut *, int size, void __iomem *);
56 
57 struct nv50_chan {
58 	struct nvif_object user;
59 	struct nvif_device *device;
60 };
61 
62 struct nv50_dmac {
63 	struct nv50_chan base;
64 
65 	struct nvif_push _push;
66 	struct nvif_push *push;
67 	u32 *ptr;
68 
69 	struct nvif_object sync;
70 	struct nvif_object vram;
71 
72 	/* Protects against concurrent pushbuf access to this channel, lock is
73 	 * grabbed by evo_wait (if the pushbuf reservation is successful) and
74 	 * dropped again by evo_kick. */
75 	struct mutex lock;
76 
77 	u32 cur;
78 	u32 put;
79 	u32 max;
80 };
81 
82 struct nv50_outp_atom {
83 	struct list_head head;
84 
85 	struct drm_encoder *encoder;
86 
87 	bool disabled;
88 	bool enabled;
89 
90 	union nv50_outp_atom_mask {
91 		struct {
92 			bool ctrl:1;
93 		};
94 		u8 mask;
95 	} set, clr;
96 };
97 
98 int nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
99 		     const s32 *oclass, u8 head, void *data, u32 size,
100 		     s64 syncbuf, struct nv50_dmac *dmac);
101 void nv50_dmac_destroy(struct nv50_dmac *);
102 
103 /*
104  * For normal encoders this just returns the encoder. For active MST encoders,
105  * this returns the real outp that's driving displays on the topology.
106  * Inactive MST encoders return NULL, since they would have no real outp to
107  * return anyway.
108  */
109 struct nouveau_encoder *nv50_real_outp(struct drm_encoder *encoder);
110 
111 u32 *evo_wait(struct nv50_dmac *, int nr);
112 void evo_kick(u32 *, struct nv50_dmac *);
113 
114 extern const u64 disp50xx_modifiers[];
115 extern const u64 disp90xx_modifiers[];
116 extern const u64 wndwc57e_modifiers[];
117 #endif
118