xref: /linux/drivers/gpu/drm/nouveau/dispnv50/crcc57d.c (revision ed7171ff9fabc49ae6ed42fbd082a576473836fc)
1 // SPDX-License-Identifier: MIT
2 
3 #include "crc.h"
4 #include "crcc37d.h"
5 #include "core.h"
6 #include "disp.h"
7 #include "head.h"
8 
9 #include <nvif/pushc37b.h>
10 
11 #include <nvhw/class/clc57d.h>
12 
13 static int crcc57d_set_src(struct nv50_head *head, int or, enum nv50_crc_source_type source,
14 			   struct nv50_crc_notifier_ctx *ctx)
15 {
16 	struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push;
17 	const int i = head->base.index;
18 	u32 crc_args = NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, CONTROLLING_CHANNEL, CORE) |
19 		       NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, EXPECT_BUFFER_COLLAPSE, FALSE) |
20 		       NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, SECONDARY_CRC, NONE) |
21 		       NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, CRC_DURING_SNOOZE, DISABLE);
22 	int ret;
23 
24 	switch (source) {
25 	case NV50_CRC_SOURCE_TYPE_SOR:
26 		crc_args |= NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SOR(or));
27 		break;
28 	case NV50_CRC_SOURCE_TYPE_SF:
29 		crc_args |= NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SF);
30 		break;
31 	default:
32 		break;
33 	}
34 
35 	ret = PUSH_WAIT(push, 4);
36 	if (ret)
37 		return ret;
38 
39 	if (source) {
40 		PUSH_MTHD(push, NVC57D, HEAD_SET_CONTEXT_DMA_CRC(i), ctx->ntfy.handle);
41 		PUSH_MTHD(push, NVC57D, HEAD_SET_CRC_CONTROL(i), crc_args);
42 	} else {
43 		PUSH_MTHD(push, NVC57D, HEAD_SET_CRC_CONTROL(i), 0);
44 		PUSH_MTHD(push, NVC57D, HEAD_SET_CONTEXT_DMA_CRC(i), 0);
45 	}
46 
47 	return 0;
48 }
49 
50 const struct nv50_crc_func crcc57d = {
51 	.set_src = crcc57d_set_src,
52 	.set_ctx = crcc37d_set_ctx,
53 	.get_entry = crcc37d_get_entry,
54 	.ctx_finished = crcc37d_ctx_finished,
55 	.flip_threshold = CRCC37D_FLIP_THRESHOLD,
56 	.num_entries = CRCC37D_MAX_ENTRIES,
57 	.notifier_len = sizeof(struct crcc37d_notifier),
58 };
59