xref: /linux/drivers/gpu/drm/nouveau/dispnv50/base907c.c (revision 5e3c6a312a0946d2d83e32359612cbb925a8bed0)
1 /*
2  * Copyright 2018 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 #include "base.h"
23 
24 static void
25 base907c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
26 {
27 	u32 *push;
28 	if ((push = evo_wait(&wndw->wndw, 10))) {
29 		evo_mthd(push, 0x0084, 1);
30 		evo_data(push, asyw->image.mode << 8 |
31 			       asyw->image.interval << 4);
32 		evo_mthd(push, 0x00c0, 1);
33 		evo_data(push, asyw->image.handle[0]);
34 		evo_mthd(push, 0x0400, 5);
35 		evo_data(push, asyw->image.offset[0] >> 8);
36 		evo_data(push, 0x00000000);
37 		evo_data(push, asyw->image.h << 16 | asyw->image.w);
38 		evo_data(push, asyw->image.layout << 24 |
39 			       (asyw->image.pitch[0] >> 8) << 8 |
40 			       asyw->image.blocks[0] << 8 |
41 			       asyw->image.blockh);
42 		evo_data(push, asyw->image.format << 8);
43 		evo_kick(push, &wndw->wndw);
44 	}
45 }
46 
47 static void
48 base907c_xlut_clr(struct nv50_wndw *wndw)
49 {
50 	u32 *push;
51 	if ((push = evo_wait(&wndw->wndw, 6))) {
52 		evo_mthd(push, 0x00e0, 1);
53 		evo_data(push, 0x00000000);
54 		evo_mthd(push, 0x00e8, 1);
55 		evo_data(push, 0x00000000);
56 		evo_mthd(push, 0x00fc, 1);
57 		evo_data(push, 0x00000000);
58 		evo_kick(push, &wndw->wndw);
59 	}
60 }
61 
62 static void
63 base907c_xlut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
64 {
65 	u32 *push;
66 	if ((push = evo_wait(&wndw->wndw, 6))) {
67 		evo_mthd(push, 0x00e0, 3);
68 		evo_data(push, asyw->xlut.i.enable << 30 |
69 			       asyw->xlut.i.mode << 24);
70 		evo_data(push, asyw->xlut.i.offset >> 8);
71 		evo_data(push, 0x40000000);
72 		evo_mthd(push, 0x00fc, 1);
73 		evo_data(push, asyw->xlut.handle);
74 		evo_kick(push, &wndw->wndw);
75 	}
76 }
77 
78 static bool
79 base907c_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, int size)
80 {
81 	if (size != 256 && size != 1024)
82 		return false;
83 
84 	asyw->xlut.i.mode = size == 1024 ? 4 : 7;
85 	asyw->xlut.i.enable = 2;
86 	asyw->xlut.i.load = head907d_olut_load;
87 	return true;
88 }
89 
90 static inline u32
91 csc_drm_to_base(u64 in)
92 {
93 	/* base takes a 19-bit 2's complement value in S3.16 format */
94 	bool sign = in & BIT_ULL(63);
95 	u32 integer = (in >> 32) & 0x7fffffff;
96 	u32 fraction = in & 0xffffffff;
97 
98 	if (integer >= 4) {
99 		return (1 << 18) - (sign ? 0 : 1);
100 	} else {
101 		u32 ret = (integer << 16) | (fraction >> 16);
102 		if (sign)
103 			ret = -ret;
104 		return ret & GENMASK(18, 0);
105 	}
106 }
107 
108 void
109 base907c_csc(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
110 	     const struct drm_color_ctm *ctm)
111 {
112 	int i, j;
113 
114 	for (j = 0; j < 3; j++) {
115 		for (i = 0; i < 4; i++) {
116 			u32 *val = &asyw->csc.matrix[j * 4 + i];
117 			/* DRM does not support constant offset, while
118 			 * HW CSC does. Skip it. */
119 			if (i == 3) {
120 				*val = 0;
121 			} else {
122 				*val = csc_drm_to_base(ctm->matrix[j * 3 + i]);
123 			}
124 		}
125 	}
126 }
127 
128 static void
129 base907c_csc_clr(struct nv50_wndw *wndw)
130 {
131 	u32 *push;
132 	if ((push = evo_wait(&wndw->wndw, 2))) {
133 		evo_mthd(push, 0x0140, 1);
134 		evo_data(push, 0x00000000);
135 		evo_kick(push, &wndw->wndw);
136 	}
137 }
138 
139 static void
140 base907c_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
141 {
142 	u32 *push, i;
143 	if ((push = evo_wait(&wndw->wndw, 13))) {
144 		evo_mthd(push, 0x0140, 12);
145 		evo_data(push, asyw->csc.matrix[0] | 0x80000000);
146 		for (i = 1; i < 12; i++)
147 			evo_data(push, asyw->csc.matrix[i]);
148 		evo_kick(push, &wndw->wndw);
149 	}
150 }
151 
152 const struct nv50_wndw_func
153 base907c = {
154 	.acquire = base507c_acquire,
155 	.release = base507c_release,
156 	.sema_set = base507c_sema_set,
157 	.sema_clr = base507c_sema_clr,
158 	.ntfy_reset = base507c_ntfy_reset,
159 	.ntfy_set = base507c_ntfy_set,
160 	.ntfy_clr = base507c_ntfy_clr,
161 	.ntfy_wait_begun = base507c_ntfy_wait_begun,
162 	.ilut = base907c_ilut,
163 	.csc = base907c_csc,
164 	.csc_set = base907c_csc_set,
165 	.csc_clr = base907c_csc_clr,
166 	.olut_core = true,
167 	.ilut_size = 1024,
168 	.xlut_set = base907c_xlut_set,
169 	.xlut_clr = base907c_xlut_clr,
170 	.image_set = base907c_image_set,
171 	.image_clr = base507c_image_clr,
172 	.update = base507c_update,
173 };
174 
175 int
176 base907c_new(struct nouveau_drm *drm, int head, s32 oclass,
177 	     struct nv50_wndw **pwndw)
178 {
179 	return base507c_new_(&base907c, base507c_format, drm, head, oclass,
180 			     0x00000002 << (head * 4), pwndw);
181 }
182