xref: /linux/drivers/gpu/drm/nouveau/dispnv50/base507c.c (revision 261fcfa96991d6652b061262c1879cc0bdd1aa3a)
1 /*
2  * Copyright 2018 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 #include "base.h"
23 
24 #include <nvif/cl507c.h>
25 #include <nvif/event.h>
26 
27 #include <drm/drm_atomic_helper.h>
28 #include <drm/drm_plane_helper.h>
29 #include "nouveau_bo.h"
30 
31 u32
32 base507c_update(struct nv50_wndw *wndw, u32 interlock)
33 {
34 	u32 *push;
35 	if ((push = evo_wait(&wndw->wndw, 2))) {
36 		evo_mthd(push, 0x0080, 1);
37 		evo_data(push, interlock);
38 		evo_kick(push, &wndw->wndw);
39 		return interlock ? 2 << (wndw->id * 8) : 0;
40 	}
41 	return 0;
42 }
43 
44 void
45 base507c_lut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
46 {
47 	u32 *push;
48 	if ((push = evo_wait(&wndw->wndw, 2))) {
49 		evo_mthd(push, 0x00e0, 1);
50 		evo_data(push, asyw->lut.enable << 30);
51 		evo_kick(push, &wndw->wndw);
52 	}
53 }
54 
55 void
56 base507c_image_clr(struct nv50_wndw *wndw)
57 {
58 	u32 *push;
59 	if ((push = evo_wait(&wndw->wndw, 4))) {
60 		evo_mthd(push, 0x0084, 1);
61 		evo_data(push, 0x00000000);
62 		evo_mthd(push, 0x00c0, 1);
63 		evo_data(push, 0x00000000);
64 		evo_kick(push, &wndw->wndw);
65 	}
66 }
67 
68 static void
69 base507c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
70 {
71 	u32 *push;
72 	if ((push = evo_wait(&wndw->wndw, 10))) {
73 		evo_mthd(push, 0x0084, 1);
74 		evo_data(push, asyw->image.mode << 8 |
75 			       asyw->image.interval << 4);
76 		evo_mthd(push, 0x00c0, 1);
77 		evo_data(push, asyw->image.handle[0]);
78 		evo_mthd(push, 0x0800, 5);
79 		evo_data(push, asyw->image.offset[0] >> 8);
80 		evo_data(push, 0x00000000);
81 		evo_data(push, asyw->image.h << 16 | asyw->image.w);
82 		evo_data(push, asyw->image.layout << 20 |
83 			       asyw->image.pitch[0] |
84 			       asyw->image.block);
85 		evo_data(push, asyw->image.kind << 16 |
86 			       asyw->image.format << 8);
87 		evo_kick(push, &wndw->wndw);
88 	}
89 }
90 
91 int
92 base507c_ntfy_wait_begun(struct nouveau_bo *bo, u32 offset,
93 			 struct nvif_device *device)
94 {
95 	s64 time = nvif_msec(device, 2000ULL,
96 		u32 data = nouveau_bo_rd32(bo, offset / 4);
97 		if ((data & 0xc0000000) == 0x40000000)
98 			break;
99 		usleep_range(1, 2);
100 	);
101 	return time < 0 ? time : 0;
102 }
103 
104 void
105 base507c_ntfy_clr(struct nv50_wndw *wndw)
106 {
107 	u32 *push;
108 	if ((push = evo_wait(&wndw->wndw, 2))) {
109 		evo_mthd(push, 0x00a4, 1);
110 		evo_data(push, 0x00000000);
111 		evo_kick(push, &wndw->wndw);
112 	}
113 }
114 
115 void
116 base507c_ntfy_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
117 {
118 	u32 *push;
119 	if ((push = evo_wait(&wndw->wndw, 3))) {
120 		evo_mthd(push, 0x00a0, 2);
121 		evo_data(push, asyw->ntfy.awaken << 30 | asyw->ntfy.offset);
122 		evo_data(push, asyw->ntfy.handle);
123 		evo_kick(push, &wndw->wndw);
124 	}
125 }
126 
127 void
128 base507c_ntfy_reset(struct nouveau_bo *bo, u32 offset)
129 {
130 	nouveau_bo_wr32(bo, offset / 4, 0x00000000);
131 }
132 
133 void
134 base507c_sema_clr(struct nv50_wndw *wndw)
135 {
136 	u32 *push;
137 	if ((push = evo_wait(&wndw->wndw, 2))) {
138 		evo_mthd(push, 0x0094, 1);
139 		evo_data(push, 0x00000000);
140 		evo_kick(push, &wndw->wndw);
141 	}
142 }
143 
144 void
145 base507c_sema_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
146 {
147 	u32 *push;
148 	if ((push = evo_wait(&wndw->wndw, 5))) {
149 		evo_mthd(push, 0x0088, 4);
150 		evo_data(push, asyw->sema.offset);
151 		evo_data(push, asyw->sema.acquire);
152 		evo_data(push, asyw->sema.release);
153 		evo_data(push, asyw->sema.handle);
154 		evo_kick(push, &wndw->wndw);
155 	}
156 }
157 
158 void
159 base507c_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
160 		 struct nv50_head_atom *asyh)
161 {
162 	asyh->base.cpp = 0;
163 }
164 
165 int
166 base507c_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
167 		 struct nv50_head_atom *asyh)
168 {
169 	const struct drm_framebuffer *fb = asyw->state.fb;
170 	int ret;
171 
172 	if (!fb->format->depth)
173 		return -EINVAL;
174 
175 	ret = drm_atomic_helper_check_plane_state(&asyw->state, &asyh->state,
176 						  DRM_PLANE_HELPER_NO_SCALING,
177 						  DRM_PLANE_HELPER_NO_SCALING,
178 						  false, true);
179 	if (ret)
180 		return ret;
181 
182 	asyh->base.depth = fb->format->depth;
183 	asyh->base.cpp = fb->format->cpp[0];
184 	asyh->base.x = asyw->state.src.x1 >> 16;
185 	asyh->base.y = asyw->state.src.y1 >> 16;
186 	asyh->base.w = asyw->state.fb->width;
187 	asyh->base.h = asyw->state.fb->height;
188 
189 	asyw->lut.enable = 1;
190 	asyw->set.image = true;
191 	return 0;
192 }
193 
194 const u32
195 base507c_format[] = {
196 	DRM_FORMAT_C8,
197 	DRM_FORMAT_RGB565,
198 	DRM_FORMAT_XRGB1555,
199 	DRM_FORMAT_ARGB1555,
200 	DRM_FORMAT_XRGB8888,
201 	DRM_FORMAT_ARGB8888,
202 	DRM_FORMAT_XBGR2101010,
203 	DRM_FORMAT_ABGR2101010,
204 	DRM_FORMAT_XBGR8888,
205 	DRM_FORMAT_ABGR8888,
206 	0
207 };
208 
209 static const struct nv50_wndw_func
210 base507c = {
211 	.acquire = base507c_acquire,
212 	.release = base507c_release,
213 	.sema_set = base507c_sema_set,
214 	.sema_clr = base507c_sema_clr,
215 	.ntfy_reset = base507c_ntfy_reset,
216 	.ntfy_set = base507c_ntfy_set,
217 	.ntfy_clr = base507c_ntfy_clr,
218 	.ntfy_wait_begun = base507c_ntfy_wait_begun,
219 	.image_set = base507c_image_set,
220 	.image_clr = base507c_image_clr,
221 	.lut = base507c_lut,
222 	.update = base507c_update,
223 };
224 
225 int
226 base507c_new_(const struct nv50_wndw_func *func, const u32 *format,
227 	      struct nouveau_drm *drm, int head, s32 oclass,
228 	      struct nv50_wndw **pwndw)
229 {
230 	struct nv50_disp_base_channel_dma_v0 args = {
231 		.head = head,
232 	};
233 	struct nv50_disp *disp = nv50_disp(drm->dev);
234 	struct nv50_wndw *wndw;
235 	int ret;
236 
237 	ret = nv50_wndw_new_(func, drm->dev, DRM_PLANE_TYPE_PRIMARY,
238 			     "base", head, format, BIT(head), &wndw);
239 	if (*pwndw = wndw, ret)
240 		return ret;
241 
242 	ret = nv50_dmac_create(&drm->client.device, &disp->disp->object,
243 			       &oclass, head, &args, sizeof(args),
244 			       disp->sync->bo.offset, &wndw->wndw);
245 	if (ret) {
246 		NV_ERROR(drm, "base%04x allocation failed: %d\n", oclass, ret);
247 		return ret;
248 	}
249 
250 	ret = nvif_notify_init(&wndw->wndw.base.user, wndw->notify.func,
251 			       false, NV50_DISP_BASE_CHANNEL_DMA_V0_NTFY_UEVENT,
252 			       &(struct nvif_notify_uevent_req) {},
253 			       sizeof(struct nvif_notify_uevent_req),
254 			       sizeof(struct nvif_notify_uevent_rep),
255 			       &wndw->notify);
256 	if (ret)
257 		return ret;
258 
259 	wndw->ntfy = NV50_DISP_BASE_NTFY(wndw->id);
260 	wndw->sema = NV50_DISP_BASE_SEM0(wndw->id);
261 	wndw->data = 0x00000000;
262 	return 0;
263 }
264 
265 int
266 base507c_new(struct nouveau_drm *drm, int head, s32 oclass,
267 	     struct nv50_wndw **pwndw)
268 {
269 	return base507c_new_(&base507c, base507c_format, drm, head, oclass, pwndw);
270 }
271