xref: /linux/drivers/gpu/drm/nouveau/dispnv50/base507c.c (revision 1590700d94ac53772491ed3103a4e8b8de01640a)
1 /*
2  * Copyright 2018 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 #include "base.h"
23 
24 #include <nvif/class.h>
25 #include <nvif/cl507c.h>
26 #include <nvif/event.h>
27 
28 #include <drm/drm_atomic_helper.h>
29 #include <drm/drm_plane_helper.h>
30 #include "nouveau_bo.h"
31 
32 static u32
33 base507c_update(struct nv50_wndw *wndw, u32 interlock)
34 {
35 	u32 *push;
36 
37 	if (!(push = evo_wait(&wndw->wndw, 2)))
38 		return 0;
39 	evo_mthd(push, 0x0080, 1);
40 	evo_data(push, interlock);
41 	evo_kick(push, &wndw->wndw);
42 
43 	if (wndw->wndw.base.user.oclass < GF110_DISP_BASE_CHANNEL_DMA)
44 		return interlock ? 2 << (wndw->id * 8) : 0;
45 	return interlock ? 2 << (wndw->id * 4) : 0;
46 }
47 
48 static void
49 base507c_lut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
50 {
51 	u32 *push;
52 	if ((push = evo_wait(&wndw->wndw, 2))) {
53 		evo_mthd(push, 0x00e0, 1);
54 		evo_data(push, asyw->lut.enable << 30);
55 		evo_kick(push, &wndw->wndw);
56 	}
57 }
58 
59 static void
60 base507c_image_clr(struct nv50_wndw *wndw)
61 {
62 	u32 *push;
63 	if ((push = evo_wait(&wndw->wndw, 4))) {
64 		evo_mthd(push, 0x0084, 1);
65 		evo_data(push, 0x00000000);
66 		evo_mthd(push, 0x00c0, 1);
67 		evo_data(push, 0x00000000);
68 		evo_kick(push, &wndw->wndw);
69 	}
70 }
71 
72 static void
73 base507c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
74 {
75 	const s32 oclass = wndw->wndw.base.user.oclass;
76 	u32 *push;
77 	if ((push = evo_wait(&wndw->wndw, 10))) {
78 		evo_mthd(push, 0x0084, 1);
79 		evo_data(push, asyw->image.mode << 8 |
80 			       asyw->image.interval << 4);
81 		evo_mthd(push, 0x00c0, 1);
82 		evo_data(push, asyw->image.handle);
83 		if (oclass < G82_DISP_BASE_CHANNEL_DMA) {
84 			evo_mthd(push, 0x0800, 5);
85 			evo_data(push, asyw->image.offset >> 8);
86 			evo_data(push, 0x00000000);
87 			evo_data(push, (asyw->image.h << 16) | asyw->image.w);
88 			evo_data(push, (asyw->image.layout << 20) |
89 					asyw->image.pitch |
90 					asyw->image.block);
91 			evo_data(push, (asyw->image.kind << 16) |
92 				       (asyw->image.format << 8));
93 		} else
94 		if (oclass < GF110_DISP_BASE_CHANNEL_DMA) {
95 			evo_mthd(push, 0x0800, 5);
96 			evo_data(push, asyw->image.offset >> 8);
97 			evo_data(push, 0x00000000);
98 			evo_data(push, (asyw->image.h << 16) | asyw->image.w);
99 			evo_data(push, (asyw->image.layout << 20) |
100 					asyw->image.pitch |
101 					asyw->image.block);
102 			evo_data(push, asyw->image.format << 8);
103 		} else {
104 			evo_mthd(push, 0x0400, 5);
105 			evo_data(push, asyw->image.offset >> 8);
106 			evo_data(push, 0x00000000);
107 			evo_data(push, (asyw->image.h << 16) | asyw->image.w);
108 			evo_data(push, (asyw->image.layout << 24) |
109 					asyw->image.pitch |
110 					asyw->image.block);
111 			evo_data(push, asyw->image.format << 8);
112 		}
113 		evo_kick(push, &wndw->wndw);
114 	}
115 }
116 
117 static int
118 base507c_ntfy_wait_begun(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
119 {
120 	struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev);
121 	struct nv50_disp *disp = nv50_disp(wndw->plane.dev);
122 	if (nvif_msec(&drm->client.device, 2000ULL,
123 		u32 data = nouveau_bo_rd32(disp->sync, asyw->ntfy.offset / 4);
124 		if ((data & 0xc0000000) == 0x40000000)
125 			break;
126 		usleep_range(1, 2);
127 	) < 0)
128 		return -ETIMEDOUT;
129 	return 0;
130 }
131 
132 static void
133 base507c_ntfy_clr(struct nv50_wndw *wndw)
134 {
135 	u32 *push;
136 	if ((push = evo_wait(&wndw->wndw, 2))) {
137 		evo_mthd(push, 0x00a4, 1);
138 		evo_data(push, 0x00000000);
139 		evo_kick(push, &wndw->wndw);
140 	}
141 }
142 
143 static void
144 base507c_ntfy_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
145 {
146 	u32 *push;
147 	if ((push = evo_wait(&wndw->wndw, 3))) {
148 		evo_mthd(push, 0x00a0, 2);
149 		evo_data(push, asyw->ntfy.awaken << 30 | asyw->ntfy.offset);
150 		evo_data(push, asyw->ntfy.handle);
151 		evo_kick(push, &wndw->wndw);
152 	}
153 }
154 
155 static void
156 base507c_sema_clr(struct nv50_wndw *wndw)
157 {
158 	u32 *push;
159 	if ((push = evo_wait(&wndw->wndw, 2))) {
160 		evo_mthd(push, 0x0094, 1);
161 		evo_data(push, 0x00000000);
162 		evo_kick(push, &wndw->wndw);
163 	}
164 }
165 
166 static void
167 base507c_sema_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
168 {
169 	u32 *push;
170 	if ((push = evo_wait(&wndw->wndw, 5))) {
171 		evo_mthd(push, 0x0088, 4);
172 		evo_data(push, asyw->sema.offset);
173 		evo_data(push, asyw->sema.acquire);
174 		evo_data(push, asyw->sema.release);
175 		evo_data(push, asyw->sema.handle);
176 		evo_kick(push, &wndw->wndw);
177 	}
178 }
179 
180 static void
181 base507c_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
182 		 struct nv50_head_atom *asyh)
183 {
184 	asyh->base.cpp = 0;
185 }
186 
187 static int
188 base507c_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
189 		 struct nv50_head_atom *asyh)
190 {
191 	const struct drm_framebuffer *fb = asyw->state.fb;
192 	int ret;
193 
194 	if (!fb->format->depth)
195 		return -EINVAL;
196 
197 	ret = drm_atomic_helper_check_plane_state(&asyw->state, &asyh->state,
198 						  DRM_PLANE_HELPER_NO_SCALING,
199 						  DRM_PLANE_HELPER_NO_SCALING,
200 						  false, true);
201 	if (ret)
202 		return ret;
203 
204 	asyh->base.depth = fb->format->depth;
205 	asyh->base.cpp = fb->format->cpp[0];
206 	asyh->base.x = asyw->state.src.x1 >> 16;
207 	asyh->base.y = asyw->state.src.y1 >> 16;
208 	asyh->base.w = asyw->state.fb->width;
209 	asyh->base.h = asyw->state.fb->height;
210 
211 	switch (fb->format->format) {
212 	case DRM_FORMAT_C8         : asyw->image.format = 0x1e; break;
213 	case DRM_FORMAT_RGB565     : asyw->image.format = 0xe8; break;
214 	case DRM_FORMAT_XRGB1555   :
215 	case DRM_FORMAT_ARGB1555   : asyw->image.format = 0xe9; break;
216 	case DRM_FORMAT_XRGB8888   :
217 	case DRM_FORMAT_ARGB8888   : asyw->image.format = 0xcf; break;
218 	case DRM_FORMAT_XBGR2101010:
219 	case DRM_FORMAT_ABGR2101010: asyw->image.format = 0xd1; break;
220 	case DRM_FORMAT_XBGR8888   :
221 	case DRM_FORMAT_ABGR8888   : asyw->image.format = 0xd5; break;
222 	default:
223 		WARN_ON(1);
224 		return -EINVAL;
225 	}
226 
227 	asyw->lut.enable = 1;
228 	asyw->set.image = true;
229 	return 0;
230 }
231 
232 static const u32
233 base507c_format[] = {
234 	DRM_FORMAT_C8,
235 	DRM_FORMAT_RGB565,
236 	DRM_FORMAT_XRGB1555,
237 	DRM_FORMAT_ARGB1555,
238 	DRM_FORMAT_XRGB8888,
239 	DRM_FORMAT_ARGB8888,
240 	DRM_FORMAT_XBGR2101010,
241 	DRM_FORMAT_ABGR2101010,
242 	DRM_FORMAT_XBGR8888,
243 	DRM_FORMAT_ABGR8888,
244 	0
245 };
246 
247 static const struct nv50_wndw_func
248 base507c = {
249 	.acquire = base507c_acquire,
250 	.release = base507c_release,
251 	.sema_set = base507c_sema_set,
252 	.sema_clr = base507c_sema_clr,
253 	.ntfy_set = base507c_ntfy_set,
254 	.ntfy_clr = base507c_ntfy_clr,
255 	.ntfy_wait_begun = base507c_ntfy_wait_begun,
256 	.image_set = base507c_image_set,
257 	.image_clr = base507c_image_clr,
258 	.lut = base507c_lut,
259 	.update = base507c_update,
260 };
261 
262 static int
263 base507c_new_(const struct nv50_wndw_func *func, const u32 *format,
264 	      struct nouveau_drm *drm, int head, s32 oclass,
265 	      struct nv50_wndw **pwndw)
266 {
267 	struct nv50_disp_base_channel_dma_v0 args = {
268 		.head = head,
269 	};
270 	struct nv50_disp *disp = nv50_disp(drm->dev);
271 	struct nv50_wndw *wndw;
272 	int ret;
273 
274 	ret = nv50_wndw_new_(func, drm->dev, DRM_PLANE_TYPE_PRIMARY,
275 			     "base", head, format, &wndw);
276 	if (*pwndw = wndw, ret)
277 		return ret;
278 
279 	ret = nv50_dmac_create(&drm->client.device, &disp->disp->object,
280 			       &oclass, head, &args, sizeof(args),
281 			       disp->sync->bo.offset, &wndw->wndw);
282 	if (ret) {
283 		NV_ERROR(drm, "base%04x allocation failed: %d\n", oclass, ret);
284 		return ret;
285 	}
286 
287 	ret = nvif_notify_init(&wndw->wndw.base.user, wndw->notify.func,
288 			       false, NV50_DISP_BASE_CHANNEL_DMA_V0_NTFY_UEVENT,
289 			       &(struct nvif_notify_uevent_req) {},
290 			       sizeof(struct nvif_notify_uevent_req),
291 			       sizeof(struct nvif_notify_uevent_rep),
292 			       &wndw->notify);
293 	if (ret)
294 		return ret;
295 
296 	wndw->ntfy = NV50_DISP_BASE_NTFY(wndw->id);
297 	wndw->sema = NV50_DISP_BASE_SEM0(wndw->id);
298 	wndw->data = 0x00000000;
299 	return 0;
300 }
301 
302 int
303 base507c_new(struct nouveau_drm *drm, int head, s32 oclass,
304 	     struct nv50_wndw **pwndw)
305 {
306 	return base507c_new_(&base507c, base507c_format, drm, head, oclass, pwndw);
307 }
308