1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2022 Marek Vasut <marex@denx.de> 4 * 5 * This code is based on drivers/gpu/drm/mxsfb/mxsfb* 6 */ 7 8 #include <linux/clk.h> 9 #include <linux/dma-mapping.h> 10 #include <linux/io.h> 11 #include <linux/module.h> 12 #include <linux/of.h> 13 #include <linux/of_graph.h> 14 #include <linux/platform_device.h> 15 #include <linux/pm_runtime.h> 16 17 #include <drm/clients/drm_client_setup.h> 18 #include <drm/drm_atomic_helper.h> 19 #include <drm/drm_bridge.h> 20 #include <drm/drm_drv.h> 21 #include <drm/drm_encoder.h> 22 #include <drm/drm_fbdev_dma.h> 23 #include <drm/drm_gem_dma_helper.h> 24 #include <drm/drm_gem_framebuffer_helper.h> 25 #include <drm/drm_mode_config.h> 26 #include <drm/drm_module.h> 27 #include <drm/drm_of.h> 28 #include <drm/drm_probe_helper.h> 29 #include <drm/drm_vblank.h> 30 31 #include "lcdif_drv.h" 32 #include "lcdif_regs.h" 33 34 static const struct drm_mode_config_funcs lcdif_mode_config_funcs = { 35 .fb_create = drm_gem_fb_create, 36 .atomic_check = drm_atomic_helper_check, 37 .atomic_commit = drm_atomic_helper_commit, 38 }; 39 40 static const struct drm_mode_config_helper_funcs lcdif_mode_config_helpers = { 41 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, 42 }; 43 44 static const struct drm_encoder_funcs lcdif_encoder_funcs = { 45 .destroy = drm_encoder_cleanup, 46 }; 47 48 static int lcdif_attach_bridge(struct lcdif_drm_private *lcdif) 49 { 50 struct device *dev = lcdif->drm->dev; 51 struct device_node *ep; 52 struct drm_bridge *bridge; 53 int ret; 54 55 for_each_endpoint_of_node(dev->of_node, ep) { 56 struct device_node *remote; 57 struct of_endpoint of_ep; 58 struct drm_encoder *encoder; 59 60 remote = of_graph_get_remote_port_parent(ep); 61 if (!of_device_is_available(remote)) { 62 of_node_put(remote); 63 continue; 64 } 65 of_node_put(remote); 66 67 ret = of_graph_parse_endpoint(ep, &of_ep); 68 if (ret < 0) { 69 dev_err(dev, "Failed to parse endpoint %pOF\n", ep); 70 of_node_put(ep); 71 return ret; 72 } 73 74 bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, of_ep.id); 75 if (IS_ERR(bridge)) { 76 of_node_put(ep); 77 return dev_err_probe(dev, PTR_ERR(bridge), 78 "Failed to get bridge for endpoint%u\n", 79 of_ep.id); 80 } 81 82 encoder = devm_kzalloc(dev, sizeof(*encoder), GFP_KERNEL); 83 if (!encoder) { 84 dev_err(dev, "Failed to allocate encoder for endpoint%u\n", 85 of_ep.id); 86 of_node_put(ep); 87 return -ENOMEM; 88 } 89 90 encoder->possible_crtcs = drm_crtc_mask(&lcdif->crtc); 91 ret = drm_encoder_init(lcdif->drm, encoder, &lcdif_encoder_funcs, 92 DRM_MODE_ENCODER_NONE, NULL); 93 if (ret) { 94 dev_err(dev, "Failed to initialize encoder for endpoint%u: %d\n", 95 of_ep.id, ret); 96 of_node_put(ep); 97 return ret; 98 } 99 100 ret = drm_bridge_attach(encoder, bridge, NULL, 0); 101 if (ret) { 102 of_node_put(ep); 103 return dev_err_probe(dev, ret, 104 "Failed to attach bridge for endpoint%u\n", 105 of_ep.id); 106 } 107 } 108 109 return 0; 110 } 111 112 static irqreturn_t lcdif_irq_handler(int irq, void *data) 113 { 114 struct drm_device *drm = data; 115 struct lcdif_drm_private *lcdif = drm->dev_private; 116 u32 reg, stat; 117 118 stat = readl(lcdif->base + LCDC_V8_INT_STATUS_D0); 119 if (!stat) 120 return IRQ_NONE; 121 122 if (stat & INT_STATUS_D0_VS_BLANK) { 123 reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5); 124 if (!(reg & CTRLDESCL0_5_SHADOW_LOAD_EN)) 125 drm_crtc_handle_vblank(&lcdif->crtc); 126 } 127 128 writel(stat, lcdif->base + LCDC_V8_INT_STATUS_D0); 129 130 return IRQ_HANDLED; 131 } 132 133 static int lcdif_load(struct drm_device *drm) 134 { 135 struct platform_device *pdev = to_platform_device(drm->dev); 136 struct lcdif_drm_private *lcdif; 137 int ret; 138 139 lcdif = devm_kzalloc(&pdev->dev, sizeof(*lcdif), GFP_KERNEL); 140 if (!lcdif) 141 return -ENOMEM; 142 143 lcdif->drm = drm; 144 drm->dev_private = lcdif; 145 146 lcdif->base = devm_platform_ioremap_resource(pdev, 0); 147 if (IS_ERR(lcdif->base)) 148 return PTR_ERR(lcdif->base); 149 150 lcdif->clk = devm_clk_get(drm->dev, "pix"); 151 if (IS_ERR(lcdif->clk)) 152 return PTR_ERR(lcdif->clk); 153 154 lcdif->clk_axi = devm_clk_get(drm->dev, "axi"); 155 if (IS_ERR(lcdif->clk_axi)) 156 return PTR_ERR(lcdif->clk_axi); 157 158 lcdif->clk_disp_axi = devm_clk_get(drm->dev, "disp_axi"); 159 if (IS_ERR(lcdif->clk_disp_axi)) 160 return PTR_ERR(lcdif->clk_disp_axi); 161 162 platform_set_drvdata(pdev, drm); 163 164 ret = dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(36)); 165 if (ret) 166 return ret; 167 168 /* Modeset init */ 169 ret = drmm_mode_config_init(drm); 170 if (ret) { 171 dev_err(drm->dev, "Failed to initialize mode config\n"); 172 return ret; 173 } 174 175 ret = lcdif_kms_init(lcdif); 176 if (ret < 0) { 177 dev_err(drm->dev, "Failed to initialize KMS pipeline\n"); 178 return ret; 179 } 180 181 ret = drm_vblank_init(drm, drm->mode_config.num_crtc); 182 if (ret < 0) { 183 dev_err(drm->dev, "Failed to initialise vblank\n"); 184 return ret; 185 } 186 187 /* Start with vertical blanking interrupt reporting disabled. */ 188 drm_crtc_vblank_off(&lcdif->crtc); 189 190 ret = lcdif_attach_bridge(lcdif); 191 if (ret) 192 return dev_err_probe(drm->dev, ret, "Cannot connect bridge\n"); 193 194 drm->mode_config.min_width = LCDIF_MIN_XRES; 195 drm->mode_config.min_height = LCDIF_MIN_YRES; 196 drm->mode_config.max_width = LCDIF_MAX_XRES; 197 drm->mode_config.max_height = LCDIF_MAX_YRES; 198 drm->mode_config.funcs = &lcdif_mode_config_funcs; 199 drm->mode_config.helper_private = &lcdif_mode_config_helpers; 200 201 drm_mode_config_reset(drm); 202 203 ret = platform_get_irq(pdev, 0); 204 if (ret < 0) 205 return ret; 206 lcdif->irq = ret; 207 208 ret = devm_request_irq(drm->dev, lcdif->irq, lcdif_irq_handler, 0, 209 drm->driver->name, drm); 210 if (ret < 0) { 211 dev_err(drm->dev, "Failed to install IRQ handler\n"); 212 return ret; 213 } 214 215 drm_kms_helper_poll_init(drm); 216 217 drm_helper_hpd_irq_event(drm); 218 219 pm_runtime_enable(drm->dev); 220 221 return 0; 222 } 223 224 static void lcdif_unload(struct drm_device *drm) 225 { 226 struct lcdif_drm_private *lcdif = drm->dev_private; 227 228 pm_runtime_get_sync(drm->dev); 229 230 drm_crtc_vblank_off(&lcdif->crtc); 231 232 drm_kms_helper_poll_fini(drm); 233 234 pm_runtime_put_sync(drm->dev); 235 pm_runtime_disable(drm->dev); 236 237 drm->dev_private = NULL; 238 } 239 240 DEFINE_DRM_GEM_DMA_FOPS(fops); 241 242 static const struct drm_driver lcdif_driver = { 243 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 244 DRM_GEM_DMA_DRIVER_OPS, 245 DRM_FBDEV_DMA_DRIVER_OPS, 246 .fops = &fops, 247 .name = "imx-lcdif", 248 .desc = "i.MX LCDIF Controller DRM", 249 .major = 1, 250 .minor = 0, 251 }; 252 253 static const struct of_device_id lcdif_dt_ids[] = { 254 { .compatible = "fsl,imx8mp-lcdif" }, 255 { .compatible = "fsl,imx93-lcdif" }, 256 { /* sentinel */ } 257 }; 258 MODULE_DEVICE_TABLE(of, lcdif_dt_ids); 259 260 static int lcdif_probe(struct platform_device *pdev) 261 { 262 struct drm_device *drm; 263 int ret; 264 265 drm = drm_dev_alloc(&lcdif_driver, &pdev->dev); 266 if (IS_ERR(drm)) 267 return PTR_ERR(drm); 268 269 ret = lcdif_load(drm); 270 if (ret) 271 goto err_free; 272 273 ret = drm_dev_register(drm, 0); 274 if (ret) 275 goto err_unload; 276 277 drm_client_setup(drm, NULL); 278 279 return 0; 280 281 err_unload: 282 lcdif_unload(drm); 283 err_free: 284 drm_dev_put(drm); 285 286 return ret; 287 } 288 289 static void lcdif_remove(struct platform_device *pdev) 290 { 291 struct drm_device *drm = platform_get_drvdata(pdev); 292 293 drm_dev_unregister(drm); 294 drm_atomic_helper_shutdown(drm); 295 lcdif_unload(drm); 296 drm_dev_put(drm); 297 } 298 299 static void lcdif_shutdown(struct platform_device *pdev) 300 { 301 struct drm_device *drm = platform_get_drvdata(pdev); 302 303 drm_atomic_helper_shutdown(drm); 304 } 305 306 static int __maybe_unused lcdif_rpm_suspend(struct device *dev) 307 { 308 struct drm_device *drm = dev_get_drvdata(dev); 309 struct lcdif_drm_private *lcdif = drm->dev_private; 310 311 /* These clock supply the DISPLAY CLOCK Domain */ 312 clk_disable_unprepare(lcdif->clk); 313 /* These clock supply the System Bus, AXI, Write Path, LFIFO */ 314 clk_disable_unprepare(lcdif->clk_disp_axi); 315 /* These clock supply the Control Bus, APB, APBH Ctrl Registers */ 316 clk_disable_unprepare(lcdif->clk_axi); 317 318 return 0; 319 } 320 321 static int __maybe_unused lcdif_rpm_resume(struct device *dev) 322 { 323 struct drm_device *drm = dev_get_drvdata(dev); 324 struct lcdif_drm_private *lcdif = drm->dev_private; 325 326 /* These clock supply the Control Bus, APB, APBH Ctrl Registers */ 327 clk_prepare_enable(lcdif->clk_axi); 328 /* These clock supply the System Bus, AXI, Write Path, LFIFO */ 329 clk_prepare_enable(lcdif->clk_disp_axi); 330 /* These clock supply the DISPLAY CLOCK Domain */ 331 clk_prepare_enable(lcdif->clk); 332 333 return 0; 334 } 335 336 static int __maybe_unused lcdif_suspend(struct device *dev) 337 { 338 struct drm_device *drm = dev_get_drvdata(dev); 339 int ret; 340 341 ret = drm_mode_config_helper_suspend(drm); 342 if (ret) 343 return ret; 344 345 if (pm_runtime_suspended(dev)) 346 return 0; 347 348 return lcdif_rpm_suspend(dev); 349 } 350 351 static int __maybe_unused lcdif_resume(struct device *dev) 352 { 353 struct drm_device *drm = dev_get_drvdata(dev); 354 355 if (!pm_runtime_suspended(dev)) 356 lcdif_rpm_resume(dev); 357 358 return drm_mode_config_helper_resume(drm); 359 } 360 361 static const struct dev_pm_ops lcdif_pm_ops = { 362 SET_SYSTEM_SLEEP_PM_OPS(lcdif_suspend, lcdif_resume) 363 SET_RUNTIME_PM_OPS(lcdif_rpm_suspend, lcdif_rpm_resume, NULL) 364 }; 365 366 static struct platform_driver lcdif_platform_driver = { 367 .probe = lcdif_probe, 368 .remove = lcdif_remove, 369 .shutdown = lcdif_shutdown, 370 .driver = { 371 .name = "imx-lcdif", 372 .of_match_table = lcdif_dt_ids, 373 .pm = &lcdif_pm_ops, 374 }, 375 }; 376 377 drm_module_platform_driver(lcdif_platform_driver); 378 379 MODULE_AUTHOR("Marek Vasut <marex@denx.de>"); 380 MODULE_DESCRIPTION("Freescale LCDIF DRM/KMS driver"); 381 MODULE_LICENSE("GPL"); 382