xref: /linux/drivers/gpu/drm/msm/msm_ringbuffer.h (revision 17cfcb68af3bc7d5e8ae08779b1853310a2949f3)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2013 Red Hat
4  * Author: Rob Clark <robdclark@gmail.com>
5  */
6 
7 #ifndef __MSM_RINGBUFFER_H__
8 #define __MSM_RINGBUFFER_H__
9 
10 #include "msm_drv.h"
11 
12 #define rbmemptr(ring, member)  \
13 	((ring)->memptrs_iova + offsetof(struct msm_rbmemptrs, member))
14 
15 #define rbmemptr_stats(ring, index, member) \
16 	(rbmemptr((ring), stats) + \
17 	 ((index) * sizeof(struct msm_gpu_submit_stats)) + \
18 	 offsetof(struct msm_gpu_submit_stats, member))
19 
20 struct msm_gpu_submit_stats {
21 	u64 cpcycles_start;
22 	u64 cpcycles_end;
23 	u64 alwayson_start;
24 	u64 alwayson_end;
25 };
26 
27 #define MSM_GPU_SUBMIT_STATS_COUNT 64
28 
29 struct msm_rbmemptrs {
30 	volatile uint32_t rptr;
31 	volatile uint32_t fence;
32 
33 	volatile struct msm_gpu_submit_stats stats[MSM_GPU_SUBMIT_STATS_COUNT];
34 };
35 
36 struct msm_ringbuffer {
37 	struct msm_gpu *gpu;
38 	int id;
39 	struct drm_gem_object *bo;
40 	uint32_t *start, *end, *cur, *next;
41 	struct list_head submits;
42 	uint64_t iova;
43 	uint32_t seqno;
44 	uint32_t hangcheck_fence;
45 	struct msm_rbmemptrs *memptrs;
46 	uint64_t memptrs_iova;
47 	struct msm_fence_context *fctx;
48 	spinlock_t lock;
49 };
50 
51 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
52 		void *memptrs, uint64_t memptrs_iova);
53 void msm_ringbuffer_destroy(struct msm_ringbuffer *ring);
54 
55 /* ringbuffer helpers (the parts that are same for a3xx/a2xx/z180..) */
56 
57 static inline void
58 OUT_RING(struct msm_ringbuffer *ring, uint32_t data)
59 {
60 	/*
61 	 * ring->next points to the current command being written - it won't be
62 	 * committed as ring->cur until the flush
63 	 */
64 	if (ring->next == ring->end)
65 		ring->next = ring->start;
66 	*(ring->next++) = data;
67 }
68 
69 #endif /* __MSM_RINGBUFFER_H__ */
70