1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2013 Red Hat 4 * Author: Rob Clark <robdclark@gmail.com> 5 */ 6 7 #ifndef __MSM_RINGBUFFER_H__ 8 #define __MSM_RINGBUFFER_H__ 9 10 #include "drm/gpu_scheduler.h" 11 #include "msm_drv.h" 12 13 #define rbmemptr(ring, member) \ 14 ((ring)->memptrs_iova + offsetof(struct msm_rbmemptrs, member)) 15 16 #define rbmemptr_stats(ring, index, member) \ 17 (rbmemptr((ring), stats) + \ 18 ((index) * sizeof(struct msm_gpu_submit_stats)) + \ 19 offsetof(struct msm_gpu_submit_stats, member)) 20 21 struct msm_gpu_submit_stats { 22 u64 cpcycles_start; 23 u64 cpcycles_end; 24 u64 alwayson_start; 25 u64 alwayson_end; 26 }; 27 28 #define MSM_GPU_SUBMIT_STATS_COUNT 64 29 30 struct msm_rbmemptrs { 31 volatile uint32_t rptr; 32 volatile uint32_t fence; 33 34 volatile struct msm_gpu_submit_stats stats[MSM_GPU_SUBMIT_STATS_COUNT]; 35 volatile u64 ttbr0; 36 }; 37 38 struct msm_cp_state { 39 uint64_t ib1_base, ib2_base; 40 uint32_t ib1_rem, ib2_rem; 41 }; 42 43 struct msm_ringbuffer { 44 struct msm_gpu *gpu; 45 int id; 46 struct drm_gem_object *bo; 47 uint32_t *start, *end, *cur, *next; 48 49 /* 50 * The job scheduler for this ring. 51 */ 52 struct drm_gpu_scheduler sched; 53 54 /* 55 * List of in-flight submits on this ring. Protected by submit_lock. 56 * 57 * Currently just submits that are already written into the ring, not 58 * submits that are still in drm_gpu_scheduler's queues. At a later 59 * step we could probably move to letting drm_gpu_scheduler manage 60 * hangcheck detection and keep track of submit jobs that are in- 61 * flight. 62 */ 63 struct list_head submits; 64 spinlock_t submit_lock; 65 66 uint64_t iova; 67 uint32_t hangcheck_fence; 68 struct msm_rbmemptrs *memptrs; 69 uint64_t memptrs_iova; 70 struct msm_fence_context *fctx; 71 72 /** 73 * hangcheck_progress_retries: 74 * 75 * The number of extra hangcheck duration cycles that we have given 76 * due to it appearing that the GPU is making forward progress. 77 * 78 * For GPU generations which support progress detection (see. 79 * msm_gpu_funcs::progress()), if the GPU appears to be making progress 80 * (ie. the CP has advanced in the command stream, we'll allow up to 81 * DRM_MSM_HANGCHECK_PROGRESS_RETRIES expirations of the hangcheck timer 82 * before killing the job. But to detect progress we need two sample 83 * points, so the duration of the hangcheck timer is halved. In other 84 * words we'll let the submit run for up to: 85 * 86 * (DRM_MSM_HANGCHECK_DEFAULT_PERIOD / 2) * (DRM_MSM_HANGCHECK_PROGRESS_RETRIES + 1) 87 */ 88 int hangcheck_progress_retries; 89 90 /** 91 * last_cp_state: The state of the CP at the last call to gpu->progress() 92 */ 93 struct msm_cp_state last_cp_state; 94 95 /* 96 * preempt_lock protects preemption and serializes wptr updates against 97 * preemption. Can be aquired from irq context. 98 */ 99 spinlock_t preempt_lock; 100 }; 101 102 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id, 103 void *memptrs, uint64_t memptrs_iova); 104 void msm_ringbuffer_destroy(struct msm_ringbuffer *ring); 105 106 /* ringbuffer helpers (the parts that are same for a3xx/a2xx/z180..) */ 107 108 static inline void 109 OUT_RING(struct msm_ringbuffer *ring, uint32_t data) 110 { 111 /* 112 * ring->next points to the current command being written - it won't be 113 * committed as ring->cur until the flush 114 */ 115 if (ring->next == ring->end) 116 ring->next = ring->start; 117 *(ring->next++) = data; 118 } 119 120 #endif /* __MSM_RINGBUFFER_H__ */ 121