1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2013 Red Hat 4 * Author: Rob Clark <robdclark@gmail.com> 5 */ 6 7 /* For debugging crashes, userspace can: 8 * 9 * tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd 10 * 11 * to log the cmdstream in a format that is understood by freedreno/cffdump 12 * utility. By comparing the last successfully completed fence #, to the 13 * cmdstream for the next fence, you can narrow down which process and submit 14 * caused the gpu crash/lockup. 15 * 16 * Additionally: 17 * 18 * tail -f /sys/kernel/debug/dri/<minor>/hangrd > logfile.rd 19 * 20 * will capture just the cmdstream from submits which triggered a GPU hang. 21 * 22 * This bypasses drm_debugfs_create_files() mainly because we need to use 23 * our own fops for a bit more control. In particular, we don't want to 24 * do anything if userspace doesn't have the debugfs file open. 25 * 26 * The module-param "rd_full", which defaults to false, enables snapshotting 27 * all (non-written) buffers in the submit, rather than just cmdstream bo's. 28 * This is useful to capture the contents of (for example) vbo's or textures, 29 * or shader programs (if not emitted inline in cmdstream). 30 */ 31 32 #include <linux/circ_buf.h> 33 #include <linux/debugfs.h> 34 #include <linux/kfifo.h> 35 #include <linux/uaccess.h> 36 #include <linux/wait.h> 37 38 #include <drm/drm_file.h> 39 40 #include "msm_drv.h" 41 #include "msm_gpu.h" 42 #include "msm_gem.h" 43 44 bool rd_full = false; 45 MODULE_PARM_DESC(rd_full, "If true, $debugfs/.../rd will snapshot all buffer contents"); 46 module_param_named(rd_full, rd_full, bool, 0600); 47 48 #ifdef CONFIG_DEBUG_FS 49 50 enum rd_sect_type { 51 RD_NONE, 52 RD_TEST, /* ascii text */ 53 RD_CMD, /* ascii text */ 54 RD_GPUADDR, /* u32 gpuaddr, u32 size */ 55 RD_CONTEXT, /* raw dump */ 56 RD_CMDSTREAM, /* raw dump */ 57 RD_CMDSTREAM_ADDR, /* gpu addr of cmdstream */ 58 RD_PARAM, /* u32 param_type, u32 param_val, u32 bitlen */ 59 RD_FLUSH, /* empty, clear previous params */ 60 RD_PROGRAM, /* shader program, raw dump */ 61 RD_VERT_SHADER, 62 RD_FRAG_SHADER, 63 RD_BUFFER_CONTENTS, 64 RD_GPU_ID, 65 RD_CHIP_ID, 66 }; 67 68 #define BUF_SZ 512 /* should be power of 2 */ 69 70 /* space used: */ 71 #define circ_count(circ) \ 72 (CIRC_CNT((circ)->head, (circ)->tail, BUF_SZ)) 73 #define circ_count_to_end(circ) \ 74 (CIRC_CNT_TO_END((circ)->head, (circ)->tail, BUF_SZ)) 75 /* space available: */ 76 #define circ_space(circ) \ 77 (CIRC_SPACE((circ)->head, (circ)->tail, BUF_SZ)) 78 #define circ_space_to_end(circ) \ 79 (CIRC_SPACE_TO_END((circ)->head, (circ)->tail, BUF_SZ)) 80 81 struct msm_rd_state { 82 struct drm_device *dev; 83 84 bool open; 85 86 /* fifo access is synchronized on the producer side by 87 * write_lock. And read_lock synchronizes the reads 88 */ 89 struct mutex read_lock, write_lock; 90 91 wait_queue_head_t fifo_event; 92 struct circ_buf fifo; 93 94 char buf[BUF_SZ]; 95 }; 96 97 static void rd_write(struct msm_rd_state *rd, const void *buf, int sz) 98 { 99 struct circ_buf *fifo = &rd->fifo; 100 const char *ptr = buf; 101 102 while (sz > 0) { 103 char *fptr = &fifo->buf[fifo->head]; 104 int n; 105 106 wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0 || !rd->open); 107 if (!rd->open) 108 return; 109 110 /* Note that smp_load_acquire() is not strictly required 111 * as CIRC_SPACE_TO_END() does not access the tail more 112 * than once. 113 */ 114 n = min(sz, circ_space_to_end(&rd->fifo)); 115 memcpy(fptr, ptr, n); 116 117 smp_store_release(&fifo->head, (fifo->head + n) & (BUF_SZ - 1)); 118 sz -= n; 119 ptr += n; 120 121 wake_up_all(&rd->fifo_event); 122 } 123 } 124 125 static void rd_write_section(struct msm_rd_state *rd, 126 enum rd_sect_type type, const void *buf, int sz) 127 { 128 rd_write(rd, &type, 4); 129 rd_write(rd, &sz, 4); 130 rd_write(rd, buf, sz); 131 } 132 133 static ssize_t rd_read(struct file *file, char __user *buf, 134 size_t sz, loff_t *ppos) 135 { 136 struct msm_rd_state *rd = file->private_data; 137 struct circ_buf *fifo = &rd->fifo; 138 const char *fptr = &fifo->buf[fifo->tail]; 139 int n = 0, ret = 0; 140 141 mutex_lock(&rd->read_lock); 142 143 ret = wait_event_interruptible(rd->fifo_event, 144 circ_count(&rd->fifo) > 0); 145 if (ret) 146 goto out; 147 148 /* Note that smp_load_acquire() is not strictly required 149 * as CIRC_CNT_TO_END() does not access the head more than 150 * once. 151 */ 152 n = min_t(int, sz, circ_count_to_end(&rd->fifo)); 153 if (copy_to_user(buf, fptr, n)) { 154 ret = -EFAULT; 155 goto out; 156 } 157 158 smp_store_release(&fifo->tail, (fifo->tail + n) & (BUF_SZ - 1)); 159 *ppos += n; 160 161 wake_up_all(&rd->fifo_event); 162 163 out: 164 mutex_unlock(&rd->read_lock); 165 if (ret) 166 return ret; 167 return n; 168 } 169 170 static int rd_open(struct inode *inode, struct file *file) 171 { 172 struct msm_rd_state *rd = inode->i_private; 173 struct drm_device *dev = rd->dev; 174 struct msm_drm_private *priv = dev->dev_private; 175 struct msm_gpu *gpu = priv->gpu; 176 uint64_t val; 177 uint32_t gpu_id; 178 uint32_t zero = 0; 179 int ret = 0; 180 181 if (!gpu) 182 return -ENODEV; 183 184 mutex_lock(&gpu->lock); 185 186 if (rd->open) { 187 ret = -EBUSY; 188 goto out; 189 } 190 191 file->private_data = rd; 192 rd->open = true; 193 194 /* Reset fifo to clear any previously unread data: */ 195 rd->fifo.head = rd->fifo.tail = 0; 196 197 /* the parsing tools need to know gpu-id to know which 198 * register database to load. 199 * 200 * Note: These particular params do not require a context 201 */ 202 gpu->funcs->get_param(gpu, NULL, MSM_PARAM_GPU_ID, &val, &zero); 203 gpu_id = val; 204 205 rd_write_section(rd, RD_GPU_ID, &gpu_id, sizeof(gpu_id)); 206 207 gpu->funcs->get_param(gpu, NULL, MSM_PARAM_CHIP_ID, &val, &zero); 208 rd_write_section(rd, RD_CHIP_ID, &val, sizeof(val)); 209 210 out: 211 mutex_unlock(&gpu->lock); 212 return ret; 213 } 214 215 static int rd_release(struct inode *inode, struct file *file) 216 { 217 struct msm_rd_state *rd = inode->i_private; 218 219 rd->open = false; 220 wake_up_all(&rd->fifo_event); 221 222 return 0; 223 } 224 225 226 static const struct file_operations rd_debugfs_fops = { 227 .owner = THIS_MODULE, 228 .open = rd_open, 229 .read = rd_read, 230 .release = rd_release, 231 }; 232 233 234 static void rd_cleanup(struct msm_rd_state *rd) 235 { 236 if (!rd) 237 return; 238 239 mutex_destroy(&rd->read_lock); 240 mutex_destroy(&rd->write_lock); 241 kfree(rd); 242 } 243 244 static struct msm_rd_state *rd_init(struct drm_minor *minor, const char *name) 245 { 246 struct msm_rd_state *rd; 247 248 rd = kzalloc(sizeof(*rd), GFP_KERNEL); 249 if (!rd) 250 return ERR_PTR(-ENOMEM); 251 252 rd->dev = minor->dev; 253 rd->fifo.buf = rd->buf; 254 255 mutex_init(&rd->read_lock); 256 mutex_init(&rd->write_lock); 257 258 init_waitqueue_head(&rd->fifo_event); 259 260 debugfs_create_file(name, S_IFREG | S_IRUGO, minor->debugfs_root, rd, 261 &rd_debugfs_fops); 262 263 return rd; 264 } 265 266 int msm_rd_debugfs_init(struct drm_minor *minor) 267 { 268 struct msm_drm_private *priv = minor->dev->dev_private; 269 struct msm_rd_state *rd; 270 int ret; 271 272 if (!priv->gpu_pdev) 273 return 0; 274 275 /* only create on first minor: */ 276 if (priv->rd) 277 return 0; 278 279 rd = rd_init(minor, "rd"); 280 if (IS_ERR(rd)) { 281 ret = PTR_ERR(rd); 282 goto fail; 283 } 284 285 priv->rd = rd; 286 287 rd = rd_init(minor, "hangrd"); 288 if (IS_ERR(rd)) { 289 ret = PTR_ERR(rd); 290 goto fail; 291 } 292 293 priv->hangrd = rd; 294 295 return 0; 296 297 fail: 298 msm_rd_debugfs_cleanup(priv); 299 return ret; 300 } 301 302 void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) 303 { 304 rd_cleanup(priv->rd); 305 priv->rd = NULL; 306 307 rd_cleanup(priv->hangrd); 308 priv->hangrd = NULL; 309 } 310 311 static void snapshot_buf(struct msm_rd_state *rd, 312 struct msm_gem_submit *submit, int idx, 313 uint64_t iova, uint32_t size, bool full) 314 { 315 struct drm_gem_object *obj = submit->bos[idx].obj; 316 unsigned offset = 0; 317 const char *buf; 318 319 if (iova) { 320 offset = iova - submit->bos[idx].iova; 321 } else { 322 iova = submit->bos[idx].iova; 323 size = obj->size; 324 } 325 326 /* 327 * Always write the GPUADDR header so can get a complete list of all the 328 * buffers in the cmd 329 */ 330 rd_write_section(rd, RD_GPUADDR, 331 (uint32_t[3]){ iova, size, iova >> 32 }, 12); 332 333 if (!full) 334 return; 335 336 /* But only dump the contents of buffers marked READ */ 337 if (!(submit->bos[idx].flags & MSM_SUBMIT_BO_READ)) 338 return; 339 340 buf = msm_gem_get_vaddr_active(obj); 341 if (IS_ERR(buf)) 342 return; 343 344 buf += offset; 345 346 rd_write_section(rd, RD_BUFFER_CONTENTS, buf, size); 347 348 msm_gem_put_vaddr_locked(obj); 349 } 350 351 /* called under gpu->lock */ 352 void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, 353 const char *fmt, ...) 354 { 355 struct task_struct *task; 356 char msg[256]; 357 int i, n; 358 359 if (!rd->open) 360 return; 361 362 mutex_lock(&rd->write_lock); 363 364 if (fmt) { 365 va_list args; 366 367 va_start(args, fmt); 368 n = vscnprintf(msg, sizeof(msg), fmt, args); 369 va_end(args); 370 371 rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4)); 372 } 373 374 rcu_read_lock(); 375 task = pid_task(submit->pid, PIDTYPE_PID); 376 if (task) { 377 n = scnprintf(msg, sizeof(msg), "%.*s/%d: fence=%u", 378 TASK_COMM_LEN, task->comm, 379 pid_nr(submit->pid), submit->seqno); 380 } else { 381 n = scnprintf(msg, sizeof(msg), "???/%d: fence=%u", 382 pid_nr(submit->pid), submit->seqno); 383 } 384 rcu_read_unlock(); 385 386 rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4)); 387 388 for (i = 0; i < submit->nr_bos; i++) 389 snapshot_buf(rd, submit, i, 0, 0, should_dump(submit, i)); 390 391 for (i = 0; i < submit->nr_cmds; i++) { 392 uint32_t szd = submit->cmd[i].size; /* in dwords */ 393 394 /* snapshot cmdstream bo's (if we haven't already): */ 395 if (!should_dump(submit, i)) { 396 snapshot_buf(rd, submit, submit->cmd[i].idx, 397 submit->cmd[i].iova, szd * 4, true); 398 } 399 } 400 401 for (i = 0; i < submit->nr_cmds; i++) { 402 uint64_t iova = submit->cmd[i].iova; 403 uint32_t szd = submit->cmd[i].size; /* in dwords */ 404 405 switch (submit->cmd[i].type) { 406 case MSM_SUBMIT_CMD_IB_TARGET_BUF: 407 /* ignore IB-targets, we've logged the buffer, the 408 * parser tool will follow the IB based on the logged 409 * buffer/gpuaddr, so nothing more to do. 410 */ 411 break; 412 case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: 413 case MSM_SUBMIT_CMD_BUF: 414 rd_write_section(rd, RD_CMDSTREAM_ADDR, 415 (uint32_t[3]){ iova, szd, iova >> 32 }, 12); 416 break; 417 } 418 } 419 420 mutex_unlock(&rd->write_lock); 421 } 422 #endif 423