1 /* 2 * Copyright (C) 2013 Red Hat 3 * Author: Rob Clark <robdclark@gmail.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 as published by 7 * the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 /* For debugging crashes, userspace can: 19 * 20 * tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd 21 * 22 * To log the cmdstream in a format that is understood by freedreno/cffdump 23 * utility. By comparing the last successfully completed fence #, to the 24 * cmdstream for the next fence, you can narrow down which process and submit 25 * caused the gpu crash/lockup. 26 * 27 * This bypasses drm_debugfs_create_files() mainly because we need to use 28 * our own fops for a bit more control. In particular, we don't want to 29 * do anything if userspace doesn't have the debugfs file open. 30 * 31 * The module-param "rd_full", which defaults to false, enables snapshotting 32 * all (non-written) buffers in the submit, rather than just cmdstream bo's. 33 * This is useful to capture the contents of (for example) vbo's or textures, 34 * or shader programs (if not emitted inline in cmdstream). 35 */ 36 37 #ifdef CONFIG_DEBUG_FS 38 39 #include <linux/kfifo.h> 40 #include <linux/debugfs.h> 41 #include <linux/circ_buf.h> 42 #include <linux/wait.h> 43 44 #include "msm_drv.h" 45 #include "msm_gpu.h" 46 #include "msm_gem.h" 47 48 static bool rd_full = false; 49 MODULE_PARM_DESC(rd_full, "If true, $debugfs/.../rd will snapshot all buffer contents"); 50 module_param_named(rd_full, rd_full, bool, 0600); 51 52 enum rd_sect_type { 53 RD_NONE, 54 RD_TEST, /* ascii text */ 55 RD_CMD, /* ascii text */ 56 RD_GPUADDR, /* u32 gpuaddr, u32 size */ 57 RD_CONTEXT, /* raw dump */ 58 RD_CMDSTREAM, /* raw dump */ 59 RD_CMDSTREAM_ADDR, /* gpu addr of cmdstream */ 60 RD_PARAM, /* u32 param_type, u32 param_val, u32 bitlen */ 61 RD_FLUSH, /* empty, clear previous params */ 62 RD_PROGRAM, /* shader program, raw dump */ 63 RD_VERT_SHADER, 64 RD_FRAG_SHADER, 65 RD_BUFFER_CONTENTS, 66 RD_GPU_ID, 67 }; 68 69 #define BUF_SZ 512 /* should be power of 2 */ 70 71 /* space used: */ 72 #define circ_count(circ) \ 73 (CIRC_CNT((circ)->head, (circ)->tail, BUF_SZ)) 74 #define circ_count_to_end(circ) \ 75 (CIRC_CNT_TO_END((circ)->head, (circ)->tail, BUF_SZ)) 76 /* space available: */ 77 #define circ_space(circ) \ 78 (CIRC_SPACE((circ)->head, (circ)->tail, BUF_SZ)) 79 #define circ_space_to_end(circ) \ 80 (CIRC_SPACE_TO_END((circ)->head, (circ)->tail, BUF_SZ)) 81 82 struct msm_rd_state { 83 struct drm_device *dev; 84 85 bool open; 86 87 /* current submit to read out: */ 88 struct msm_gem_submit *submit; 89 90 /* fifo access is synchronized on the producer side by 91 * struct_mutex held by submit code (otherwise we could 92 * end up w/ cmds logged in different order than they 93 * were executed). And read_lock synchronizes the reads 94 */ 95 struct mutex read_lock; 96 97 wait_queue_head_t fifo_event; 98 struct circ_buf fifo; 99 100 char buf[BUF_SZ]; 101 }; 102 103 static void rd_write(struct msm_rd_state *rd, const void *buf, int sz) 104 { 105 struct circ_buf *fifo = &rd->fifo; 106 const char *ptr = buf; 107 108 while (sz > 0) { 109 char *fptr = &fifo->buf[fifo->head]; 110 int n; 111 112 wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0); 113 114 n = min(sz, circ_space_to_end(&rd->fifo)); 115 memcpy(fptr, ptr, n); 116 117 fifo->head = (fifo->head + n) & (BUF_SZ - 1); 118 sz -= n; 119 ptr += n; 120 121 wake_up_all(&rd->fifo_event); 122 } 123 } 124 125 static void rd_write_section(struct msm_rd_state *rd, 126 enum rd_sect_type type, const void *buf, int sz) 127 { 128 rd_write(rd, &type, 4); 129 rd_write(rd, &sz, 4); 130 rd_write(rd, buf, sz); 131 } 132 133 static ssize_t rd_read(struct file *file, char __user *buf, 134 size_t sz, loff_t *ppos) 135 { 136 struct msm_rd_state *rd = file->private_data; 137 struct circ_buf *fifo = &rd->fifo; 138 const char *fptr = &fifo->buf[fifo->tail]; 139 int n = 0, ret = 0; 140 141 mutex_lock(&rd->read_lock); 142 143 ret = wait_event_interruptible(rd->fifo_event, 144 circ_count(&rd->fifo) > 0); 145 if (ret) 146 goto out; 147 148 n = min_t(int, sz, circ_count_to_end(&rd->fifo)); 149 if (copy_to_user(buf, fptr, n)) { 150 ret = -EFAULT; 151 goto out; 152 } 153 154 fifo->tail = (fifo->tail + n) & (BUF_SZ - 1); 155 *ppos += n; 156 157 wake_up_all(&rd->fifo_event); 158 159 out: 160 mutex_unlock(&rd->read_lock); 161 if (ret) 162 return ret; 163 return n; 164 } 165 166 static int rd_open(struct inode *inode, struct file *file) 167 { 168 struct msm_rd_state *rd = inode->i_private; 169 struct drm_device *dev = rd->dev; 170 struct msm_drm_private *priv = dev->dev_private; 171 struct msm_gpu *gpu = priv->gpu; 172 uint64_t val; 173 uint32_t gpu_id; 174 int ret = 0; 175 176 mutex_lock(&dev->struct_mutex); 177 178 if (rd->open || !gpu) { 179 ret = -EBUSY; 180 goto out; 181 } 182 183 file->private_data = rd; 184 rd->open = true; 185 186 /* the parsing tools need to know gpu-id to know which 187 * register database to load. 188 */ 189 gpu->funcs->get_param(gpu, MSM_PARAM_GPU_ID, &val); 190 gpu_id = val; 191 192 rd_write_section(rd, RD_GPU_ID, &gpu_id, sizeof(gpu_id)); 193 194 out: 195 mutex_unlock(&dev->struct_mutex); 196 return ret; 197 } 198 199 static int rd_release(struct inode *inode, struct file *file) 200 { 201 struct msm_rd_state *rd = inode->i_private; 202 rd->open = false; 203 return 0; 204 } 205 206 207 static const struct file_operations rd_debugfs_fops = { 208 .owner = THIS_MODULE, 209 .open = rd_open, 210 .read = rd_read, 211 .llseek = no_llseek, 212 .release = rd_release, 213 }; 214 215 int msm_rd_debugfs_init(struct drm_minor *minor) 216 { 217 struct msm_drm_private *priv = minor->dev->dev_private; 218 struct msm_rd_state *rd; 219 struct dentry *ent; 220 221 /* only create on first minor: */ 222 if (priv->rd) 223 return 0; 224 225 rd = kzalloc(sizeof(*rd), GFP_KERNEL); 226 if (!rd) 227 return -ENOMEM; 228 229 rd->dev = minor->dev; 230 rd->fifo.buf = rd->buf; 231 232 mutex_init(&rd->read_lock); 233 priv->rd = rd; 234 235 init_waitqueue_head(&rd->fifo_event); 236 237 ent = debugfs_create_file("rd", S_IFREG | S_IRUGO, 238 minor->debugfs_root, rd, &rd_debugfs_fops); 239 if (!ent) { 240 DRM_ERROR("Cannot create /sys/kernel/debug/dri/%pd/rd\n", 241 minor->debugfs_root); 242 goto fail; 243 } 244 245 return 0; 246 247 fail: 248 msm_rd_debugfs_cleanup(priv); 249 return -1; 250 } 251 252 void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) 253 { 254 struct msm_rd_state *rd = priv->rd; 255 256 if (!rd) 257 return; 258 259 priv->rd = NULL; 260 mutex_destroy(&rd->read_lock); 261 kfree(rd); 262 } 263 264 static void snapshot_buf(struct msm_rd_state *rd, 265 struct msm_gem_submit *submit, int idx, 266 uint64_t iova, uint32_t size) 267 { 268 struct msm_gem_object *obj = submit->bos[idx].obj; 269 const char *buf; 270 271 buf = msm_gem_get_vaddr_locked(&obj->base); 272 if (IS_ERR(buf)) 273 return; 274 275 if (iova) { 276 buf += iova - submit->bos[idx].iova; 277 } else { 278 iova = submit->bos[idx].iova; 279 size = obj->base.size; 280 } 281 282 rd_write_section(rd, RD_GPUADDR, 283 (uint32_t[3]){ iova, size, iova >> 32 }, 12); 284 rd_write_section(rd, RD_BUFFER_CONTENTS, buf, size); 285 286 msm_gem_put_vaddr_locked(&obj->base); 287 } 288 289 /* called under struct_mutex */ 290 void msm_rd_dump_submit(struct msm_gem_submit *submit) 291 { 292 struct drm_device *dev = submit->dev; 293 struct msm_drm_private *priv = dev->dev_private; 294 struct msm_rd_state *rd = priv->rd; 295 char msg[128]; 296 int i, n; 297 298 if (!rd->open) 299 return; 300 301 /* writing into fifo is serialized by caller, and 302 * rd->read_lock is used to serialize the reads 303 */ 304 WARN_ON(!mutex_is_locked(&dev->struct_mutex)); 305 306 n = snprintf(msg, sizeof(msg), "%.*s/%d: fence=%u", 307 TASK_COMM_LEN, current->comm, task_pid_nr(current), 308 submit->fence->seqno); 309 310 rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4)); 311 312 if (rd_full) { 313 for (i = 0; i < submit->nr_bos; i++) { 314 /* buffers that are written to probably don't start out 315 * with anything interesting: 316 */ 317 if (submit->bos[i].flags & MSM_SUBMIT_BO_WRITE) 318 continue; 319 320 snapshot_buf(rd, submit, i, 0, 0); 321 } 322 } 323 324 for (i = 0; i < submit->nr_cmds; i++) { 325 uint64_t iova = submit->cmd[i].iova; 326 uint32_t szd = submit->cmd[i].size; /* in dwords */ 327 328 /* snapshot cmdstream bo's (if we haven't already): */ 329 if (!rd_full) { 330 snapshot_buf(rd, submit, submit->cmd[i].idx, 331 submit->cmd[i].iova, szd * 4); 332 } 333 334 switch (submit->cmd[i].type) { 335 case MSM_SUBMIT_CMD_IB_TARGET_BUF: 336 /* ignore IB-targets, we've logged the buffer, the 337 * parser tool will follow the IB based on the logged 338 * buffer/gpuaddr, so nothing more to do. 339 */ 340 break; 341 case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: 342 case MSM_SUBMIT_CMD_BUF: 343 rd_write_section(rd, RD_CMDSTREAM_ADDR, 344 (uint32_t[3]){ iova, szd, iova >> 32 }, 12); 345 break; 346 } 347 } 348 } 349 #endif 350