xref: /linux/drivers/gpu/drm/msm/msm_gem.h (revision 93df8a1ed6231727c5db94a80b1a6bd5ee67cec3)
1 /*
2  * Copyright (C) 2013 Red Hat
3  * Author: Rob Clark <robdclark@gmail.com>
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License version 2 as published by
7  * the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program.  If not, see <http://www.gnu.org/licenses/>.
16  */
17 
18 #ifndef __MSM_GEM_H__
19 #define __MSM_GEM_H__
20 
21 #include <linux/reservation.h>
22 #include "msm_drv.h"
23 
24 /* Additional internal-use only BO flags: */
25 #define MSM_BO_STOLEN        0x10000000    /* try to use stolen/splash memory */
26 
27 struct msm_gem_object {
28 	struct drm_gem_object base;
29 
30 	uint32_t flags;
31 
32 	/* And object is either:
33 	 *  inactive - on priv->inactive_list
34 	 *  active   - on one one of the gpu's active_list..  well, at
35 	 *     least for now we don't have (I don't think) hw sync between
36 	 *     2d and 3d one devices which have both, meaning we need to
37 	 *     block on submit if a bo is already on other ring
38 	 *
39 	 */
40 	struct list_head mm_list;
41 	struct msm_gpu *gpu;     /* non-null if active */
42 	uint32_t read_fence, write_fence;
43 
44 	/* Transiently in the process of submit ioctl, objects associated
45 	 * with the submit are on submit->bo_list.. this only lasts for
46 	 * the duration of the ioctl, so one bo can never be on multiple
47 	 * submit lists.
48 	 */
49 	struct list_head submit_entry;
50 
51 	struct page **pages;
52 	struct sg_table *sgt;
53 	void *vaddr;
54 
55 	struct {
56 		// XXX
57 		uint32_t iova;
58 	} domain[NUM_DOMAINS];
59 
60 	/* normally (resv == &_resv) except for imported bo's */
61 	struct reservation_object *resv;
62 	struct reservation_object _resv;
63 
64 	/* For physically contiguous buffers.  Used when we don't have
65 	 * an IOMMU.  Also used for stolen/splashscreen buffer.
66 	 */
67 	struct drm_mm_node *vram_node;
68 };
69 #define to_msm_bo(x) container_of(x, struct msm_gem_object, base)
70 
71 static inline bool is_active(struct msm_gem_object *msm_obj)
72 {
73 	return msm_obj->gpu != NULL;
74 }
75 
76 static inline uint32_t msm_gem_fence(struct msm_gem_object *msm_obj,
77 		uint32_t op)
78 {
79 	uint32_t fence = 0;
80 
81 	if (op & MSM_PREP_READ)
82 		fence = msm_obj->write_fence;
83 	if (op & MSM_PREP_WRITE)
84 		fence = max(fence, msm_obj->read_fence);
85 
86 	return fence;
87 }
88 
89 #define MAX_CMDS 4
90 
91 /* Created per submit-ioctl, to track bo's and cmdstream bufs, etc,
92  * associated with the cmdstream submission for synchronization (and
93  * make it easier to unwind when things go wrong, etc).  This only
94  * lasts for the duration of the submit-ioctl.
95  */
96 struct msm_gem_submit {
97 	struct drm_device *dev;
98 	struct msm_gpu *gpu;
99 	struct list_head node;   /* node in gpu submit_list */
100 	struct list_head bo_list;
101 	struct ww_acquire_ctx ticket;
102 	uint32_t fence;
103 	bool valid;
104 	unsigned int nr_cmds;
105 	unsigned int nr_bos;
106 	struct {
107 		uint32_t type;
108 		uint32_t size;  /* in dwords */
109 		uint32_t iova;
110 		uint32_t idx;   /* cmdstream buffer idx in bos[] */
111 	} cmd[MAX_CMDS];
112 	struct {
113 		uint32_t flags;
114 		struct msm_gem_object *obj;
115 		uint32_t iova;
116 	} bos[0];
117 };
118 
119 #endif /* __MSM_GEM_H__ */
120