1 /* 2 * Copyright (C) 2013 Red Hat 3 * Author: Rob Clark <robdclark@gmail.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 as published by 7 * the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #ifndef __MSM_GEM_H__ 19 #define __MSM_GEM_H__ 20 21 #include <linux/reservation.h> 22 #include "msm_drv.h" 23 24 struct msm_gem_object { 25 struct drm_gem_object base; 26 27 uint32_t flags; 28 29 /* And object is either: 30 * inactive - on priv->inactive_list 31 * active - on one one of the gpu's active_list.. well, at 32 * least for now we don't have (I don't think) hw sync between 33 * 2d and 3d one devices which have both, meaning we need to 34 * block on submit if a bo is already on other ring 35 * 36 */ 37 struct list_head mm_list; 38 struct msm_gpu *gpu; /* non-null if active */ 39 uint32_t read_fence, write_fence; 40 41 /* Transiently in the process of submit ioctl, objects associated 42 * with the submit are on submit->bo_list.. this only lasts for 43 * the duration of the ioctl, so one bo can never be on multiple 44 * submit lists. 45 */ 46 struct list_head submit_entry; 47 48 struct page **pages; 49 struct sg_table *sgt; 50 void *vaddr; 51 52 struct { 53 // XXX 54 uint32_t iova; 55 } domain[NUM_DOMAINS]; 56 57 /* normally (resv == &_resv) except for imported bo's */ 58 struct reservation_object *resv; 59 struct reservation_object _resv; 60 61 /* For physically contiguous buffers. Used when we don't have 62 * an IOMMU. 63 */ 64 struct drm_mm_node *vram_node; 65 }; 66 #define to_msm_bo(x) container_of(x, struct msm_gem_object, base) 67 68 static inline bool is_active(struct msm_gem_object *msm_obj) 69 { 70 return msm_obj->gpu != NULL; 71 } 72 73 static inline uint32_t msm_gem_fence(struct msm_gem_object *msm_obj, 74 uint32_t op) 75 { 76 uint32_t fence = 0; 77 78 if (op & MSM_PREP_READ) 79 fence = msm_obj->write_fence; 80 if (op & MSM_PREP_WRITE) 81 fence = max(fence, msm_obj->read_fence); 82 83 return fence; 84 } 85 86 #define MAX_CMDS 4 87 88 /* Created per submit-ioctl, to track bo's and cmdstream bufs, etc, 89 * associated with the cmdstream submission for synchronization (and 90 * make it easier to unwind when things go wrong, etc). This only 91 * lasts for the duration of the submit-ioctl. 92 */ 93 struct msm_gem_submit { 94 struct drm_device *dev; 95 struct msm_gpu *gpu; 96 struct list_head bo_list; 97 struct ww_acquire_ctx ticket; 98 uint32_t fence; 99 bool valid; 100 unsigned int nr_cmds; 101 unsigned int nr_bos; 102 struct { 103 uint32_t type; 104 uint32_t size; /* in dwords */ 105 uint32_t iova; 106 uint32_t idx; /* cmdstream buffer idx in bos[] */ 107 } cmd[MAX_CMDS]; 108 struct { 109 uint32_t flags; 110 struct msm_gem_object *obj; 111 uint32_t iova; 112 } bos[0]; 113 }; 114 115 #endif /* __MSM_GEM_H__ */ 116