1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2013 Red Hat 5 * Author: Rob Clark <robdclark@gmail.com> 6 */ 7 8 #ifndef __MSM_DRV_H__ 9 #define __MSM_DRV_H__ 10 11 #include <linux/kernel.h> 12 #include <linux/clk.h> 13 #include <linux/cpufreq.h> 14 #include <linux/devfreq.h> 15 #include <linux/module.h> 16 #include <linux/component.h> 17 #include <linux/platform_device.h> 18 #include <linux/pm.h> 19 #include <linux/pm_runtime.h> 20 #include <linux/slab.h> 21 #include <linux/list.h> 22 #include <linux/iommu.h> 23 #include <linux/types.h> 24 #include <linux/of_graph.h> 25 #include <linux/of_device.h> 26 #include <linux/sizes.h> 27 #include <linux/kthread.h> 28 29 #include <drm/drm_atomic.h> 30 #include <drm/drm_atomic_helper.h> 31 #include <drm/drm_print.h> 32 #include <drm/drm_probe_helper.h> 33 #include <drm/display/drm_dsc.h> 34 #include <drm/msm_drm.h> 35 #include <drm/drm_gem.h> 36 37 extern struct fault_attr fail_gem_alloc; 38 extern struct fault_attr fail_gem_iova; 39 40 struct drm_fb_helper; 41 struct drm_fb_helper_surface_size; 42 43 struct msm_kms; 44 struct msm_gpu; 45 struct msm_mmu; 46 struct msm_mdss; 47 struct msm_rd_state; 48 struct msm_perf_state; 49 struct msm_gem_submit; 50 struct msm_fence_context; 51 struct msm_gem_address_space; 52 struct msm_gem_vma; 53 struct msm_disp_state; 54 55 #define MAX_CRTCS 8 56 57 #define FRAC_16_16(mult, div) (((mult) << 16) / (div)) 58 59 enum msm_dp_controller { 60 MSM_DP_CONTROLLER_0, 61 MSM_DP_CONTROLLER_1, 62 MSM_DP_CONTROLLER_2, 63 MSM_DP_CONTROLLER_3, 64 MSM_DP_CONTROLLER_COUNT, 65 }; 66 67 enum msm_dsi_controller { 68 MSM_DSI_CONTROLLER_0, 69 MSM_DSI_CONTROLLER_1, 70 MSM_DSI_CONTROLLER_COUNT, 71 }; 72 73 #define MSM_GPU_MAX_RINGS 4 74 75 /* Commit/Event thread specific structure */ 76 struct msm_drm_thread { 77 struct drm_device *dev; 78 struct kthread_worker *worker; 79 }; 80 81 struct msm_drm_private { 82 83 struct drm_device *dev; 84 85 struct msm_kms *kms; 86 int (*kms_init)(struct drm_device *dev); 87 88 /* subordinate devices, if present: */ 89 struct platform_device *gpu_pdev; 90 91 /* possibly this should be in the kms component, but it is 92 * shared by both mdp4 and mdp5.. 93 */ 94 struct hdmi *hdmi; 95 96 /* DSI is shared by mdp4 and mdp5 */ 97 struct msm_dsi *dsi[MSM_DSI_CONTROLLER_COUNT]; 98 99 struct msm_dp *dp[MSM_DP_CONTROLLER_COUNT]; 100 101 /* when we have more than one 'msm_gpu' these need to be an array: */ 102 struct msm_gpu *gpu; 103 104 /* gpu is only set on open(), but we need this info earlier */ 105 bool is_a2xx; 106 bool has_cached_coherent; 107 108 struct msm_rd_state *rd; /* debugfs to dump all submits */ 109 struct msm_rd_state *hangrd; /* debugfs to dump hanging submits */ 110 struct msm_perf_state *perf; 111 112 /** 113 * total_mem: Total/global amount of memory backing GEM objects. 114 */ 115 atomic64_t total_mem; 116 117 /** 118 * List of all GEM objects (mainly for debugfs, protected by obj_lock 119 * (acquire before per GEM object lock) 120 */ 121 struct list_head objects; 122 struct mutex obj_lock; 123 124 /** 125 * lru: 126 * 127 * The various LRU's that a GEM object is in at various stages of 128 * it's lifetime. Objects start out in the unbacked LRU. When 129 * pinned (for scannout or permanently mapped GPU buffers, like 130 * ringbuffer, memptr, fw, etc) it moves to the pinned LRU. When 131 * unpinned, it moves into willneed or dontneed LRU depending on 132 * madvise state. When backing pages are evicted (willneed) or 133 * purged (dontneed) it moves back into the unbacked LRU. 134 * 135 * The dontneed LRU is considered by the shrinker for objects 136 * that are candidate for purging, and the willneed LRU is 137 * considered for objects that could be evicted. 138 */ 139 struct { 140 /** 141 * unbacked: 142 * 143 * The LRU for GEM objects without backing pages allocated. 144 * This mostly exists so that objects are always is one 145 * LRU. 146 */ 147 struct drm_gem_lru unbacked; 148 149 /** 150 * pinned: 151 * 152 * The LRU for pinned GEM objects 153 */ 154 struct drm_gem_lru pinned; 155 156 /** 157 * willneed: 158 * 159 * The LRU for unpinned GEM objects which are in madvise 160 * WILLNEED state (ie. can be evicted) 161 */ 162 struct drm_gem_lru willneed; 163 164 /** 165 * dontneed: 166 * 167 * The LRU for unpinned GEM objects which are in madvise 168 * DONTNEED state (ie. can be purged) 169 */ 170 struct drm_gem_lru dontneed; 171 172 /** 173 * lock: 174 * 175 * Protects manipulation of all of the LRUs. 176 */ 177 struct mutex lock; 178 } lru; 179 180 struct workqueue_struct *wq; 181 182 unsigned int num_crtcs; 183 184 struct msm_drm_thread event_thread[MAX_CRTCS]; 185 186 /* VRAM carveout, used when no IOMMU: */ 187 struct { 188 unsigned long size; 189 dma_addr_t paddr; 190 /* NOTE: mm managed at the page level, size is in # of pages 191 * and position mm_node->start is in # of pages: 192 */ 193 struct drm_mm mm; 194 spinlock_t lock; /* Protects drm_mm node allocation/removal */ 195 } vram; 196 197 struct notifier_block vmap_notifier; 198 struct shrinker *shrinker; 199 200 /** 201 * hangcheck_period: For hang detection, in ms 202 * 203 * Note that in practice, a submit/job will get at least two hangcheck 204 * periods, due to checking for progress being implemented as simply 205 * "have the CP position registers changed since last time?" 206 */ 207 unsigned int hangcheck_period; 208 209 /** gpu_devfreq_config: Devfreq tuning config for the GPU. */ 210 struct devfreq_simple_ondemand_data gpu_devfreq_config; 211 212 /** 213 * gpu_clamp_to_idle: Enable clamping to idle freq when inactive 214 */ 215 bool gpu_clamp_to_idle; 216 217 /** 218 * disable_err_irq: 219 * 220 * Disable handling of GPU hw error interrupts, to force fallback to 221 * sw hangcheck timer. Written (via debugfs) by igt tests to test 222 * the sw hangcheck mechanism. 223 */ 224 bool disable_err_irq; 225 226 /** 227 * @fault_stall_lock: 228 * 229 * Serialize changes to stall-on-fault state. 230 */ 231 spinlock_t fault_stall_lock; 232 233 /** 234 * @fault_stall_reenable_time: 235 * 236 * If stall_enabled is false, when to reenable stall-on-fault. 237 * Protected by @fault_stall_lock. 238 */ 239 ktime_t stall_reenable_time; 240 241 /** 242 * @stall_enabled: 243 * 244 * Whether stall-on-fault is currently enabled. Protected by 245 * @fault_stall_lock. 246 */ 247 bool stall_enabled; 248 }; 249 250 const struct msm_format *mdp_get_format(struct msm_kms *kms, uint32_t format, uint64_t modifier); 251 252 struct msm_pending_timer; 253 254 int msm_atomic_init_pending_timer(struct msm_pending_timer *timer, 255 struct msm_kms *kms, int crtc_idx); 256 void msm_atomic_destroy_pending_timer(struct msm_pending_timer *timer); 257 void msm_atomic_commit_tail(struct drm_atomic_state *state); 258 int msm_atomic_check(struct drm_device *dev, struct drm_atomic_state *state); 259 struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev); 260 261 int msm_crtc_enable_vblank(struct drm_crtc *crtc); 262 void msm_crtc_disable_vblank(struct drm_crtc *crtc); 263 264 int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu); 265 void msm_unregister_mmu(struct drm_device *dev, struct msm_mmu *mmu); 266 267 struct msm_gem_address_space *msm_kms_init_aspace(struct drm_device *dev); 268 bool msm_use_mmu(struct drm_device *dev); 269 270 int msm_ioctl_gem_submit(struct drm_device *dev, void *data, 271 struct drm_file *file); 272 273 #ifdef CONFIG_DEBUG_FS 274 unsigned long msm_gem_shrinker_shrink(struct drm_device *dev, unsigned long nr_to_scan); 275 #endif 276 277 int msm_gem_shrinker_init(struct drm_device *dev); 278 void msm_gem_shrinker_cleanup(struct drm_device *dev); 279 280 struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj); 281 int msm_gem_prime_vmap(struct drm_gem_object *obj, struct iosys_map *map); 282 void msm_gem_prime_vunmap(struct drm_gem_object *obj, struct iosys_map *map); 283 struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev, 284 struct dma_buf_attachment *attach, struct sg_table *sg); 285 int msm_gem_prime_pin(struct drm_gem_object *obj); 286 void msm_gem_prime_unpin(struct drm_gem_object *obj); 287 288 int msm_framebuffer_prepare(struct drm_framebuffer *fb, 289 struct msm_gem_address_space *aspace, bool needs_dirtyfb); 290 void msm_framebuffer_cleanup(struct drm_framebuffer *fb, 291 struct msm_gem_address_space *aspace, bool needed_dirtyfb); 292 uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, 293 struct msm_gem_address_space *aspace, int plane); 294 struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane); 295 const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb); 296 struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev, 297 struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd); 298 struct drm_framebuffer * msm_alloc_stolen_fb(struct drm_device *dev, 299 int w, int h, int p, uint32_t format); 300 301 #ifdef CONFIG_DRM_FBDEV_EMULATION 302 int msm_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper, 303 struct drm_fb_helper_surface_size *sizes); 304 #define MSM_FBDEV_DRIVER_OPS \ 305 .fbdev_probe = msm_fbdev_driver_fbdev_probe 306 #else 307 #define MSM_FBDEV_DRIVER_OPS \ 308 .fbdev_probe = NULL 309 #endif 310 311 struct hdmi; 312 #ifdef CONFIG_DRM_MSM_HDMI 313 int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev, 314 struct drm_encoder *encoder); 315 void __init msm_hdmi_register(void); 316 void __exit msm_hdmi_unregister(void); 317 #else 318 static inline int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev, 319 struct drm_encoder *encoder) 320 { 321 return -EINVAL; 322 } 323 static inline void __init msm_hdmi_register(void) {} 324 static inline void __exit msm_hdmi_unregister(void) {} 325 #endif 326 327 struct msm_dsi; 328 #ifdef CONFIG_DRM_MSM_DSI 329 int dsi_dev_attach(struct platform_device *pdev); 330 void dsi_dev_detach(struct platform_device *pdev); 331 void __init msm_dsi_register(void); 332 void __exit msm_dsi_unregister(void); 333 int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev, 334 struct drm_encoder *encoder); 335 void msm_dsi_snapshot(struct msm_disp_state *disp_state, struct msm_dsi *msm_dsi); 336 bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi); 337 bool msm_dsi_is_bonded_dsi(struct msm_dsi *msm_dsi); 338 bool msm_dsi_is_master_dsi(struct msm_dsi *msm_dsi); 339 bool msm_dsi_wide_bus_enabled(struct msm_dsi *msm_dsi); 340 struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi); 341 const char *msm_dsi_get_te_source(struct msm_dsi *msm_dsi); 342 #else 343 static inline void __init msm_dsi_register(void) 344 { 345 } 346 static inline void __exit msm_dsi_unregister(void) 347 { 348 } 349 static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, 350 struct drm_device *dev, 351 struct drm_encoder *encoder) 352 { 353 return -EINVAL; 354 } 355 static inline void msm_dsi_snapshot(struct msm_disp_state *disp_state, struct msm_dsi *msm_dsi) 356 { 357 } 358 static inline bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi) 359 { 360 return false; 361 } 362 static inline bool msm_dsi_is_bonded_dsi(struct msm_dsi *msm_dsi) 363 { 364 return false; 365 } 366 static inline bool msm_dsi_is_master_dsi(struct msm_dsi *msm_dsi) 367 { 368 return false; 369 } 370 static inline bool msm_dsi_wide_bus_enabled(struct msm_dsi *msm_dsi) 371 { 372 return false; 373 } 374 375 static inline struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi) 376 { 377 return NULL; 378 } 379 380 static inline const char *msm_dsi_get_te_source(struct msm_dsi *msm_dsi) 381 { 382 return NULL; 383 } 384 #endif 385 386 #ifdef CONFIG_DRM_MSM_DP 387 int __init msm_dp_register(void); 388 void __exit msm_dp_unregister(void); 389 int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev, 390 struct drm_encoder *encoder, bool yuv_supported); 391 void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp_display); 392 bool msm_dp_is_yuv_420_enabled(const struct msm_dp *dp_display, 393 const struct drm_display_mode *mode); 394 bool msm_dp_needs_periph_flush(const struct msm_dp *dp_display, 395 const struct drm_display_mode *mode); 396 bool msm_dp_wide_bus_available(const struct msm_dp *dp_display); 397 398 #else 399 static inline int __init msm_dp_register(void) 400 { 401 return -EINVAL; 402 } 403 static inline void __exit msm_dp_unregister(void) 404 { 405 } 406 static inline int msm_dp_modeset_init(struct msm_dp *dp_display, 407 struct drm_device *dev, 408 struct drm_encoder *encoder, 409 bool yuv_supported) 410 { 411 return -EINVAL; 412 } 413 414 static inline void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp_display) 415 { 416 } 417 418 static inline bool msm_dp_is_yuv_420_enabled(const struct msm_dp *dp_display, 419 const struct drm_display_mode *mode) 420 { 421 return false; 422 } 423 424 static inline bool msm_dp_needs_periph_flush(const struct msm_dp *dp_display, 425 const struct drm_display_mode *mode) 426 { 427 return false; 428 } 429 430 static inline bool msm_dp_wide_bus_available(const struct msm_dp *dp_display) 431 { 432 return false; 433 } 434 435 #endif 436 437 #ifdef CONFIG_DRM_MSM_MDP4 438 void msm_mdp4_register(void); 439 void msm_mdp4_unregister(void); 440 #else 441 static inline void msm_mdp4_register(void) {} 442 static inline void msm_mdp4_unregister(void) {} 443 #endif 444 445 #ifdef CONFIG_DRM_MSM_MDP5 446 void msm_mdp_register(void); 447 void msm_mdp_unregister(void); 448 #else 449 static inline void msm_mdp_register(void) {} 450 static inline void msm_mdp_unregister(void) {} 451 #endif 452 453 #ifdef CONFIG_DRM_MSM_DPU 454 void msm_dpu_register(void); 455 void msm_dpu_unregister(void); 456 #else 457 static inline void msm_dpu_register(void) {} 458 static inline void msm_dpu_unregister(void) {} 459 #endif 460 461 #ifdef CONFIG_DRM_MSM_MDSS 462 void msm_mdss_register(void); 463 void msm_mdss_unregister(void); 464 #else 465 static inline void msm_mdss_register(void) {} 466 static inline void msm_mdss_unregister(void) {} 467 #endif 468 469 #ifdef CONFIG_DEBUG_FS 470 void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m); 471 int msm_debugfs_late_init(struct drm_device *dev); 472 int msm_rd_debugfs_init(struct drm_minor *minor); 473 void msm_rd_debugfs_cleanup(struct msm_drm_private *priv); 474 __printf(3, 4) 475 void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, 476 const char *fmt, ...); 477 int msm_perf_debugfs_init(struct drm_minor *minor); 478 void msm_perf_debugfs_cleanup(struct msm_drm_private *priv); 479 #else 480 static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; } 481 __printf(3, 4) 482 static inline void msm_rd_dump_submit(struct msm_rd_state *rd, 483 struct msm_gem_submit *submit, 484 const char *fmt, ...) {} 485 static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {} 486 static inline void msm_perf_debugfs_cleanup(struct msm_drm_private *priv) {} 487 #endif 488 489 struct clk *msm_clk_get(struct platform_device *pdev, const char *name); 490 491 struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count, 492 const char *name); 493 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name); 494 void __iomem *msm_ioremap_size(struct platform_device *pdev, const char *name, 495 phys_addr_t *size); 496 void __iomem *msm_ioremap_quiet(struct platform_device *pdev, const char *name); 497 void __iomem *msm_ioremap_mdss(struct platform_device *mdss_pdev, 498 struct platform_device *dev, 499 const char *name); 500 501 struct icc_path *msm_icc_get(struct device *dev, const char *name); 502 503 static inline void msm_rmw(void __iomem *addr, u32 mask, u32 or) 504 { 505 u32 val = readl(addr); 506 507 val &= ~mask; 508 writel(val | or, addr); 509 } 510 511 /** 512 * struct msm_hrtimer_work - a helper to combine an hrtimer with kthread_work 513 * 514 * @timer: hrtimer to control when the kthread work is triggered 515 * @work: the kthread work 516 * @worker: the kthread worker the work will be scheduled on 517 */ 518 struct msm_hrtimer_work { 519 struct hrtimer timer; 520 struct kthread_work work; 521 struct kthread_worker *worker; 522 }; 523 524 void msm_hrtimer_queue_work(struct msm_hrtimer_work *work, 525 ktime_t wakeup_time, 526 enum hrtimer_mode mode); 527 void msm_hrtimer_work_init(struct msm_hrtimer_work *work, 528 struct kthread_worker *worker, 529 kthread_work_func_t fn, 530 clockid_t clock_id, 531 enum hrtimer_mode mode); 532 533 /* Helper for returning a UABI error with optional logging which can make 534 * it easier for userspace to understand what it is doing wrong. 535 */ 536 #define UERR(err, drm, fmt, ...) \ 537 ({ DRM_DEV_DEBUG_DRIVER((drm)->dev, fmt, ##__VA_ARGS__); -(err); }) 538 539 #define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__) 540 #define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__) 541 542 static inline int align_pitch(int width, int bpp) 543 { 544 int bytespp = (bpp + 7) / 8; 545 /* adreno needs pitch aligned to 32 pixels: */ 546 return bytespp * ALIGN(width, 32); 547 } 548 549 /* for the generated headers: */ 550 #define INVALID_IDX(idx) ({BUG(); 0;}) 551 #define fui(x) ({BUG(); 0;}) 552 #define _mesa_float_to_half(x) ({BUG(); 0;}) 553 554 555 #define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT) 556 557 /* for conditionally setting boolean flag(s): */ 558 #define COND(bool, val) ((bool) ? (val) : 0) 559 560 static inline unsigned long timeout_to_jiffies(const ktime_t *timeout) 561 { 562 ktime_t now = ktime_get(); 563 564 if (ktime_compare(*timeout, now) <= 0) 565 return 0; 566 567 ktime_t rem = ktime_sub(*timeout, now); 568 s64 remaining_jiffies = ktime_divns(rem, NSEC_PER_SEC / HZ); 569 return clamp(remaining_jiffies, 1LL, (s64)INT_MAX); 570 } 571 572 /* Driver helpers */ 573 574 extern const struct component_master_ops msm_drm_ops; 575 576 int msm_kms_pm_prepare(struct device *dev); 577 void msm_kms_pm_complete(struct device *dev); 578 579 int msm_drv_probe(struct device *dev, 580 int (*kms_init)(struct drm_device *dev), 581 struct msm_kms *kms); 582 void msm_kms_shutdown(struct platform_device *pdev); 583 584 bool msm_disp_drv_should_bind(struct device *dev, bool dpu_driver); 585 586 #endif /* __MSM_DRV_H__ */ 587