1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef __DSI_PHY_H__ 7 #define __DSI_PHY_H__ 8 9 #include <linux/clk-provider.h> 10 #include <linux/delay.h> 11 #include <linux/regulator/consumer.h> 12 13 #include "dsi.h" 14 15 struct msm_dsi_phy_ops { 16 int (*pll_init)(struct msm_dsi_phy *phy); 17 int (*enable)(struct msm_dsi_phy *phy, 18 struct msm_dsi_phy_clk_request *clk_req); 19 void (*disable)(struct msm_dsi_phy *phy); 20 void (*save_pll_state)(struct msm_dsi_phy *phy); 21 int (*restore_pll_state)(struct msm_dsi_phy *phy); 22 bool (*set_continuous_clock)(struct msm_dsi_phy *phy, bool enable); 23 int (*parse_dt_properties)(struct msm_dsi_phy *phy); 24 }; 25 26 struct msm_dsi_phy_cfg { 27 const struct regulator_bulk_data *regulator_data; 28 int num_regulators; 29 struct msm_dsi_phy_ops ops; 30 31 unsigned long min_pll_rate; 32 unsigned long max_pll_rate; 33 34 const resource_size_t io_start[DSI_MAX]; 35 const int num_dsi_phy; 36 const int quirks; 37 bool has_phy_regulator; 38 bool has_phy_lane; 39 }; 40 41 extern const struct msm_dsi_phy_cfg dsi_phy_28nm_hpm_cfgs; 42 extern const struct msm_dsi_phy_cfg dsi_phy_28nm_hpm_famb_cfgs; 43 extern const struct msm_dsi_phy_cfg dsi_phy_28nm_lp_cfgs; 44 extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8226_cfgs; 45 extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8937_cfgs; 46 extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs; 47 extern const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs; 48 extern const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs; 49 extern const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs; 50 extern const struct msm_dsi_phy_cfg dsi_phy_14nm_2290_cfgs; 51 extern const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs; 52 extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs; 53 extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs; 54 extern const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs; 55 extern const struct msm_dsi_phy_cfg dsi_phy_7nm_6375_cfgs; 56 extern const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs; 57 extern const struct msm_dsi_phy_cfg dsi_phy_7nm_7280_cfgs; 58 extern const struct msm_dsi_phy_cfg dsi_phy_5nm_8350_cfgs; 59 extern const struct msm_dsi_phy_cfg dsi_phy_5nm_8450_cfgs; 60 extern const struct msm_dsi_phy_cfg dsi_phy_4nm_8550_cfgs; 61 extern const struct msm_dsi_phy_cfg dsi_phy_4nm_8650_cfgs; 62 63 struct msm_dsi_dphy_timing { 64 u32 clk_zero; 65 u32 clk_trail; 66 u32 clk_prepare; 67 u32 hs_exit; 68 u32 hs_zero; 69 u32 hs_prepare; 70 u32 hs_trail; 71 u32 hs_rqst; 72 u32 ta_go; 73 u32 ta_sure; 74 u32 ta_get; 75 76 struct msm_dsi_phy_shared_timings shared_timings; 77 78 /* For PHY v2 only */ 79 u32 hs_rqst_ckln; 80 u32 hs_prep_dly; 81 u32 hs_prep_dly_ckln; 82 u8 hs_halfbyte_en; 83 u8 hs_halfbyte_en_ckln; 84 }; 85 86 #define DSI_BYTE_PLL_CLK 0 87 #define DSI_PIXEL_PLL_CLK 1 88 #define NUM_PROVIDED_CLKS 2 89 90 #define DSI_LANE_MAX 5 91 92 struct msm_dsi_phy { 93 struct platform_device *pdev; 94 void __iomem *base; 95 void __iomem *pll_base; 96 void __iomem *reg_base; 97 void __iomem *lane_base; 98 phys_addr_t base_size; 99 phys_addr_t pll_size; 100 phys_addr_t reg_size; 101 phys_addr_t lane_size; 102 int id; 103 104 struct clk *ahb_clk; 105 struct regulator_bulk_data *supplies; 106 107 struct msm_dsi_dphy_timing timing; 108 const struct msm_dsi_phy_cfg *cfg; 109 void *tuning_cfg; 110 111 enum msm_dsi_phy_usecase usecase; 112 bool regulator_ldo_mode; 113 bool cphy_mode; 114 115 struct clk_hw *vco_hw; 116 bool pll_on; 117 118 struct clk_hw_onecell_data *provided_clocks; 119 120 bool state_saved; 121 }; 122 123 /* 124 * PHY internal functions 125 */ 126 int msm_dsi_dphy_timing_calc(struct msm_dsi_dphy_timing *timing, 127 struct msm_dsi_phy_clk_request *clk_req); 128 int msm_dsi_dphy_timing_calc_v2(struct msm_dsi_dphy_timing *timing, 129 struct msm_dsi_phy_clk_request *clk_req); 130 int msm_dsi_dphy_timing_calc_v3(struct msm_dsi_dphy_timing *timing, 131 struct msm_dsi_phy_clk_request *clk_req); 132 int msm_dsi_dphy_timing_calc_v4(struct msm_dsi_dphy_timing *timing, 133 struct msm_dsi_phy_clk_request *clk_req); 134 int msm_dsi_cphy_timing_calc_v4(struct msm_dsi_dphy_timing *timing, 135 struct msm_dsi_phy_clk_request *clk_req); 136 137 #endif /* __DSI_PHY_H__ */ 138