xref: /linux/drivers/gpu/drm/msm/dsi/dsi.h (revision bdd1a21b52557ea8f61d0a5dc2f77151b576eb70)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef __DSI_CONNECTOR_H__
7 #define __DSI_CONNECTOR_H__
8 
9 #include <linux/of_platform.h>
10 #include <linux/platform_device.h>
11 
12 #include <drm/drm_bridge.h>
13 #include <drm/drm_crtc.h>
14 #include <drm/drm_mipi_dsi.h>
15 #include <drm/drm_panel.h>
16 
17 #include "msm_drv.h"
18 #include "disp/msm_disp_snapshot.h"
19 
20 #define DSI_0	0
21 #define DSI_1	1
22 #define DSI_MAX	2
23 
24 struct msm_dsi_phy_shared_timings;
25 struct msm_dsi_phy_clk_request;
26 
27 enum msm_dsi_phy_usecase {
28 	MSM_DSI_PHY_STANDALONE,
29 	MSM_DSI_PHY_MASTER,
30 	MSM_DSI_PHY_SLAVE,
31 };
32 
33 #define DSI_DEV_REGULATOR_MAX	8
34 #define DSI_BUS_CLK_MAX		4
35 
36 /* Regulators for DSI devices */
37 struct dsi_reg_entry {
38 	char name[32];
39 	int enable_load;
40 	int disable_load;
41 };
42 
43 struct dsi_reg_config {
44 	int num;
45 	struct dsi_reg_entry regs[DSI_DEV_REGULATOR_MAX];
46 };
47 
48 struct msm_dsi {
49 	struct drm_device *dev;
50 	struct platform_device *pdev;
51 
52 	/* connector managed by us when we're connected to a drm_panel */
53 	struct drm_connector *connector;
54 	/* internal dsi bridge attached to MDP interface */
55 	struct drm_bridge *bridge;
56 
57 	struct mipi_dsi_host *host;
58 	struct msm_dsi_phy *phy;
59 
60 	/*
61 	 * panel/external_bridge connected to dsi bridge output, only one of the
62 	 * two can be valid at a time
63 	 */
64 	struct drm_panel *panel;
65 	struct drm_bridge *external_bridge;
66 
67 	struct device *phy_dev;
68 	bool phy_enabled;
69 
70 	/* the encoder we are hooked to (outside of dsi block) */
71 	struct drm_encoder *encoder;
72 
73 	int id;
74 };
75 
76 /* dsi manager */
77 struct drm_bridge *msm_dsi_manager_bridge_init(u8 id);
78 void msm_dsi_manager_bridge_destroy(struct drm_bridge *bridge);
79 struct drm_connector *msm_dsi_manager_connector_init(u8 id);
80 struct drm_connector *msm_dsi_manager_ext_bridge_init(u8 id);
81 int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg);
82 bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len);
83 int msm_dsi_manager_register(struct msm_dsi *msm_dsi);
84 void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi);
85 bool msm_dsi_manager_validate_current_config(u8 id);
86 void msm_dsi_manager_tpg_enable(void);
87 
88 /* msm dsi */
89 static inline bool msm_dsi_device_connected(struct msm_dsi *msm_dsi)
90 {
91 	return msm_dsi->panel || msm_dsi->external_bridge;
92 }
93 
94 struct drm_encoder *msm_dsi_get_encoder(struct msm_dsi *msm_dsi);
95 
96 /* dsi host */
97 struct msm_dsi_host;
98 int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host,
99 					const struct mipi_dsi_msg *msg);
100 void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host,
101 					const struct mipi_dsi_msg *msg);
102 int msm_dsi_host_cmd_tx(struct mipi_dsi_host *host,
103 					const struct mipi_dsi_msg *msg);
104 int msm_dsi_host_cmd_rx(struct mipi_dsi_host *host,
105 					const struct mipi_dsi_msg *msg);
106 void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host,
107 					u32 dma_base, u32 len);
108 int msm_dsi_host_enable(struct mipi_dsi_host *host);
109 int msm_dsi_host_disable(struct mipi_dsi_host *host);
110 int msm_dsi_host_power_on(struct mipi_dsi_host *host,
111 			struct msm_dsi_phy_shared_timings *phy_shared_timings,
112 			bool is_bonded_dsi, struct msm_dsi_phy *phy);
113 int msm_dsi_host_power_off(struct mipi_dsi_host *host);
114 int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host,
115 				  const struct drm_display_mode *mode);
116 struct drm_panel *msm_dsi_host_get_panel(struct mipi_dsi_host *host);
117 unsigned long msm_dsi_host_get_mode_flags(struct mipi_dsi_host *host);
118 struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host *host);
119 int msm_dsi_host_register(struct mipi_dsi_host *host, bool check_defer);
120 void msm_dsi_host_unregister(struct mipi_dsi_host *host);
121 int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
122 			struct msm_dsi_phy *src_phy);
123 void msm_dsi_host_reset_phy(struct mipi_dsi_host *host);
124 void msm_dsi_host_get_phy_clk_req(struct mipi_dsi_host *host,
125 	struct msm_dsi_phy_clk_request *clk_req,
126 	bool is_bonded_dsi);
127 void msm_dsi_host_destroy(struct mipi_dsi_host *host);
128 int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,
129 					struct drm_device *dev);
130 int msm_dsi_host_init(struct msm_dsi *msm_dsi);
131 int msm_dsi_runtime_suspend(struct device *dev);
132 int msm_dsi_runtime_resume(struct device *dev);
133 int dsi_link_clk_set_rate_6g(struct msm_dsi_host *msm_host);
134 int dsi_link_clk_set_rate_v2(struct msm_dsi_host *msm_host);
135 int dsi_link_clk_enable_6g(struct msm_dsi_host *msm_host);
136 int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host);
137 void dsi_link_clk_disable_6g(struct msm_dsi_host *msm_host);
138 void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host);
139 int dsi_tx_buf_alloc_6g(struct msm_dsi_host *msm_host, int size);
140 int dsi_tx_buf_alloc_v2(struct msm_dsi_host *msm_host, int size);
141 void *dsi_tx_buf_get_6g(struct msm_dsi_host *msm_host);
142 void *dsi_tx_buf_get_v2(struct msm_dsi_host *msm_host);
143 void dsi_tx_buf_put_6g(struct msm_dsi_host *msm_host);
144 int dsi_dma_base_get_6g(struct msm_dsi_host *msm_host, uint64_t *iova);
145 int dsi_dma_base_get_v2(struct msm_dsi_host *msm_host, uint64_t *iova);
146 int dsi_clk_init_v2(struct msm_dsi_host *msm_host);
147 int dsi_clk_init_6g_v2(struct msm_dsi_host *msm_host);
148 int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_bonded_dsi);
149 int dsi_calc_clk_rate_6g(struct msm_dsi_host *msm_host, bool is_bonded_dsi);
150 void msm_dsi_host_snapshot(struct msm_disp_state *disp_state, struct mipi_dsi_host *host);
151 void msm_dsi_host_test_pattern_en(struct mipi_dsi_host *host);
152 
153 /* dsi phy */
154 struct msm_dsi_phy;
155 struct msm_dsi_phy_shared_timings {
156 	u32 clk_post;
157 	u32 clk_pre;
158 	bool clk_pre_inc_by_2;
159 };
160 
161 struct msm_dsi_phy_clk_request {
162 	unsigned long bitclk_rate;
163 	unsigned long escclk_rate;
164 };
165 
166 void msm_dsi_phy_driver_register(void);
167 void msm_dsi_phy_driver_unregister(void);
168 int msm_dsi_phy_enable(struct msm_dsi_phy *phy,
169 			struct msm_dsi_phy_clk_request *clk_req,
170 			struct msm_dsi_phy_shared_timings *shared_timings);
171 void msm_dsi_phy_disable(struct msm_dsi_phy *phy);
172 void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
173 			     enum msm_dsi_phy_usecase uc);
174 int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
175 	struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
176 void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy);
177 int msm_dsi_phy_pll_restore_state(struct msm_dsi_phy *phy);
178 void msm_dsi_phy_snapshot(struct msm_disp_state *disp_state, struct msm_dsi_phy *phy);
179 bool msm_dsi_phy_set_continuous_clock(struct msm_dsi_phy *phy, bool enable);
180 
181 #endif /* __DSI_CONNECTOR_H__ */
182 
183