xref: /linux/drivers/gpu/drm/msm/dsi/dsi.h (revision 34d9545b9f769c6553e31a6820c9cb51f5e93099)
1 /*
2  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 and
6  * only version 2 as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  */
13 
14 #ifndef __DSI_CONNECTOR_H__
15 #define __DSI_CONNECTOR_H__
16 
17 #include <linux/of_platform.h>
18 #include <linux/platform_device.h>
19 
20 #include "drm_crtc.h"
21 #include "drm_mipi_dsi.h"
22 #include "drm_panel.h"
23 
24 #include "msm_drv.h"
25 
26 #define DSI_0	0
27 #define DSI_1	1
28 #define DSI_MAX	2
29 
30 struct msm_dsi_phy_shared_timings;
31 
32 enum msm_dsi_phy_type {
33 	MSM_DSI_PHY_28NM_HPM,
34 	MSM_DSI_PHY_28NM_LP,
35 	MSM_DSI_PHY_20NM,
36 	MSM_DSI_PHY_28NM_8960,
37 	MSM_DSI_PHY_MAX
38 };
39 
40 enum msm_dsi_phy_usecase {
41 	MSM_DSI_PHY_STANDALONE,
42 	MSM_DSI_PHY_MASTER,
43 	MSM_DSI_PHY_SLAVE,
44 };
45 
46 #define DSI_DEV_REGULATOR_MAX	8
47 #define DSI_BUS_CLK_MAX		4
48 
49 /* Regulators for DSI devices */
50 struct dsi_reg_entry {
51 	char name[32];
52 	int enable_load;
53 	int disable_load;
54 };
55 
56 struct dsi_reg_config {
57 	int num;
58 	struct dsi_reg_entry regs[DSI_DEV_REGULATOR_MAX];
59 };
60 
61 struct msm_dsi {
62 	struct drm_device *dev;
63 	struct platform_device *pdev;
64 
65 	/* connector managed by us when we're connected to a drm_panel */
66 	struct drm_connector *connector;
67 	/* internal dsi bridge attached to MDP interface */
68 	struct drm_bridge *bridge;
69 
70 	struct mipi_dsi_host *host;
71 	struct msm_dsi_phy *phy;
72 
73 	/*
74 	 * panel/external_bridge connected to dsi bridge output, only one of the
75 	 * two can be valid at a time
76 	 */
77 	struct drm_panel *panel;
78 	struct drm_bridge *external_bridge;
79 	unsigned long device_flags;
80 
81 	struct device *phy_dev;
82 	bool phy_enabled;
83 
84 	/* the encoder we are hooked to (outside of dsi block) */
85 	struct drm_encoder *encoder;
86 
87 	int id;
88 };
89 
90 /* dsi manager */
91 struct drm_bridge *msm_dsi_manager_bridge_init(u8 id);
92 void msm_dsi_manager_bridge_destroy(struct drm_bridge *bridge);
93 struct drm_connector *msm_dsi_manager_connector_init(u8 id);
94 struct drm_connector *msm_dsi_manager_ext_bridge_init(u8 id);
95 int msm_dsi_manager_phy_enable(int id,
96 		const unsigned long bit_rate, const unsigned long esc_rate,
97 		struct msm_dsi_phy_shared_timings *shared_timing);
98 void msm_dsi_manager_phy_disable(int id);
99 int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg);
100 bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len);
101 void msm_dsi_manager_attach_dsi_device(int id, u32 device_flags);
102 int msm_dsi_manager_register(struct msm_dsi *msm_dsi);
103 void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi);
104 
105 /* msm dsi */
106 static inline bool msm_dsi_device_connected(struct msm_dsi *msm_dsi)
107 {
108 	return msm_dsi->panel || msm_dsi->external_bridge;
109 }
110 
111 struct drm_encoder *msm_dsi_get_encoder(struct msm_dsi *msm_dsi);
112 
113 /* dsi pll */
114 struct msm_dsi_pll;
115 #ifdef CONFIG_DRM_MSM_DSI_PLL
116 struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev,
117 			enum msm_dsi_phy_type type, int dsi_id);
118 void msm_dsi_pll_destroy(struct msm_dsi_pll *pll);
119 int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll,
120 	struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
121 void msm_dsi_pll_save_state(struct msm_dsi_pll *pll);
122 int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll);
123 #else
124 static inline struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev,
125 			 enum msm_dsi_phy_type type, int id) {
126 	return ERR_PTR(-ENODEV);
127 }
128 static inline void msm_dsi_pll_destroy(struct msm_dsi_pll *pll)
129 {
130 }
131 static inline int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll,
132 	struct clk **byte_clk_provider, struct clk **pixel_clk_provider)
133 {
134 	return -ENODEV;
135 }
136 static inline void msm_dsi_pll_save_state(struct msm_dsi_pll *pll)
137 {
138 }
139 static inline int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll)
140 {
141 	return 0;
142 }
143 #endif
144 
145 /* dsi host */
146 int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host,
147 					const struct mipi_dsi_msg *msg);
148 void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host,
149 					const struct mipi_dsi_msg *msg);
150 int msm_dsi_host_cmd_tx(struct mipi_dsi_host *host,
151 					const struct mipi_dsi_msg *msg);
152 int msm_dsi_host_cmd_rx(struct mipi_dsi_host *host,
153 					const struct mipi_dsi_msg *msg);
154 void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host,
155 					u32 dma_base, u32 len);
156 int msm_dsi_host_enable(struct mipi_dsi_host *host);
157 int msm_dsi_host_disable(struct mipi_dsi_host *host);
158 int msm_dsi_host_power_on(struct mipi_dsi_host *host);
159 int msm_dsi_host_power_off(struct mipi_dsi_host *host);
160 int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host,
161 					struct drm_display_mode *mode);
162 struct drm_panel *msm_dsi_host_get_panel(struct mipi_dsi_host *host,
163 					unsigned long *panel_flags);
164 struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host *host);
165 int msm_dsi_host_register(struct mipi_dsi_host *host, bool check_defer);
166 void msm_dsi_host_unregister(struct mipi_dsi_host *host);
167 int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
168 			struct msm_dsi_pll *src_pll);
169 void msm_dsi_host_reset_phy(struct mipi_dsi_host *host);
170 void msm_dsi_host_destroy(struct mipi_dsi_host *host);
171 int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,
172 					struct drm_device *dev);
173 int msm_dsi_host_init(struct msm_dsi *msm_dsi);
174 
175 /* dsi phy */
176 struct msm_dsi_phy;
177 struct msm_dsi_phy_shared_timings {
178 	u32 clk_post;
179 	u32 clk_pre;
180 	bool clk_pre_inc_by_2;
181 };
182 void msm_dsi_phy_driver_register(void);
183 void msm_dsi_phy_driver_unregister(void);
184 int msm_dsi_phy_enable(struct msm_dsi_phy *phy, int src_pll_id,
185 	const unsigned long bit_rate, const unsigned long esc_rate);
186 void msm_dsi_phy_disable(struct msm_dsi_phy *phy);
187 void msm_dsi_phy_get_shared_timings(struct msm_dsi_phy *phy,
188 			struct msm_dsi_phy_shared_timings *shared_timing);
189 struct msm_dsi_pll *msm_dsi_phy_get_pll(struct msm_dsi_phy *phy);
190 void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
191 			     enum msm_dsi_phy_usecase uc);
192 
193 #endif /* __DSI_CONNECTOR_H__ */
194 
195