1a689554bSHai Li /* 2a689554bSHai Li * Copyright (c) 2015, The Linux Foundation. All rights reserved. 3a689554bSHai Li * 4a689554bSHai Li * This program is free software; you can redistribute it and/or modify 5a689554bSHai Li * it under the terms of the GNU General Public License version 2 and 6a689554bSHai Li * only version 2 as published by the Free Software Foundation. 7a689554bSHai Li * 8a689554bSHai Li * This program is distributed in the hope that it will be useful, 9a689554bSHai Li * but WITHOUT ANY WARRANTY; without even the implied warranty of 10a689554bSHai Li * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11a689554bSHai Li * GNU General Public License for more details. 12a689554bSHai Li */ 13a689554bSHai Li 14a689554bSHai Li #ifndef __DSI_CONNECTOR_H__ 15a689554bSHai Li #define __DSI_CONNECTOR_H__ 16a689554bSHai Li 17ec31abf6SHai Li #include <linux/of_platform.h> 18a689554bSHai Li #include <linux/platform_device.h> 19a689554bSHai Li 20a689554bSHai Li #include "drm_crtc.h" 21a689554bSHai Li #include "drm_mipi_dsi.h" 22a689554bSHai Li #include "drm_panel.h" 23a689554bSHai Li 24a689554bSHai Li #include "msm_drv.h" 25a689554bSHai Li 26a689554bSHai Li #define DSI_0 0 27a689554bSHai Li #define DSI_1 1 28a689554bSHai Li #define DSI_MAX 2 29a689554bSHai Li 30dceac340SHai Li struct msm_dsi_phy_shared_timings; 31*b62aa70aSHai Li struct msm_dsi_phy_clk_request; 32dceac340SHai Li 339d32c498SHai Li enum msm_dsi_phy_type { 349d32c498SHai Li MSM_DSI_PHY_28NM_HPM, 359d32c498SHai Li MSM_DSI_PHY_28NM_LP, 36dcefc117SHai Li MSM_DSI_PHY_20NM, 37225380b3SArchit Taneja MSM_DSI_PHY_28NM_8960, 389d32c498SHai Li MSM_DSI_PHY_MAX 399d32c498SHai Li }; 409d32c498SHai Li 4157bf4338SHai Li enum msm_dsi_phy_usecase { 4257bf4338SHai Li MSM_DSI_PHY_STANDALONE, 4357bf4338SHai Li MSM_DSI_PHY_MASTER, 4457bf4338SHai Li MSM_DSI_PHY_SLAVE, 4557bf4338SHai Li }; 4657bf4338SHai Li 47ec31abf6SHai Li #define DSI_DEV_REGULATOR_MAX 8 486e0eb52eSArchit Taneja #define DSI_BUS_CLK_MAX 4 49ec31abf6SHai Li 50ec31abf6SHai Li /* Regulators for DSI devices */ 51ec31abf6SHai Li struct dsi_reg_entry { 52ec31abf6SHai Li char name[32]; 53ec31abf6SHai Li int enable_load; 54ec31abf6SHai Li int disable_load; 55ec31abf6SHai Li }; 56ec31abf6SHai Li 57ec31abf6SHai Li struct dsi_reg_config { 58ec31abf6SHai Li int num; 59ec31abf6SHai Li struct dsi_reg_entry regs[DSI_DEV_REGULATOR_MAX]; 60ec31abf6SHai Li }; 61ec31abf6SHai Li 62a689554bSHai Li struct msm_dsi { 63a689554bSHai Li struct drm_device *dev; 64a689554bSHai Li struct platform_device *pdev; 65a689554bSHai Li 66c118e290SArchit Taneja /* connector managed by us when we're connected to a drm_panel */ 67a689554bSHai Li struct drm_connector *connector; 68c118e290SArchit Taneja /* internal dsi bridge attached to MDP interface */ 69a689554bSHai Li struct drm_bridge *bridge; 70a689554bSHai Li 71a689554bSHai Li struct mipi_dsi_host *host; 72a689554bSHai Li struct msm_dsi_phy *phy; 73c118e290SArchit Taneja 74c118e290SArchit Taneja /* 75c118e290SArchit Taneja * panel/external_bridge connected to dsi bridge output, only one of the 76c118e290SArchit Taneja * two can be valid at a time 77c118e290SArchit Taneja */ 78a689554bSHai Li struct drm_panel *panel; 79c118e290SArchit Taneja struct drm_bridge *external_bridge; 80a9ddac9cSArchit Taneja unsigned long device_flags; 819d32c498SHai Li 82ec31abf6SHai Li struct device *phy_dev; 83a689554bSHai Li bool phy_enabled; 84a689554bSHai Li 8597e00119SArchit Taneja /* the encoder we are hooked to (outside of dsi block) */ 8697e00119SArchit Taneja struct drm_encoder *encoder; 87a689554bSHai Li 88a689554bSHai Li int id; 89a689554bSHai Li }; 90a689554bSHai Li 91a689554bSHai Li /* dsi manager */ 92a689554bSHai Li struct drm_bridge *msm_dsi_manager_bridge_init(u8 id); 93a689554bSHai Li void msm_dsi_manager_bridge_destroy(struct drm_bridge *bridge); 94a689554bSHai Li struct drm_connector *msm_dsi_manager_connector_init(u8 id); 95c118e290SArchit Taneja struct drm_connector *msm_dsi_manager_ext_bridge_init(u8 id); 96a689554bSHai Li int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg); 974ff9d4cbSArchit Taneja bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len); 989c9f6f8dSArchit Taneja void msm_dsi_manager_attach_dsi_device(int id, u32 device_flags); 99a689554bSHai Li int msm_dsi_manager_register(struct msm_dsi *msm_dsi); 100a689554bSHai Li void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi); 101a689554bSHai Li 102a689554bSHai Li /* msm dsi */ 1036f054ec5SArchit Taneja static inline bool msm_dsi_device_connected(struct msm_dsi *msm_dsi) 1046f054ec5SArchit Taneja { 105c118e290SArchit Taneja return msm_dsi->panel || msm_dsi->external_bridge; 1066f054ec5SArchit Taneja } 1076f054ec5SArchit Taneja 108a689554bSHai Li struct drm_encoder *msm_dsi_get_encoder(struct msm_dsi *msm_dsi); 109a689554bSHai Li 1109d32c498SHai Li /* dsi pll */ 1119d32c498SHai Li struct msm_dsi_pll; 1129d32c498SHai Li #ifdef CONFIG_DRM_MSM_DSI_PLL 1139d32c498SHai Li struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev, 1149d32c498SHai Li enum msm_dsi_phy_type type, int dsi_id); 1159d32c498SHai Li void msm_dsi_pll_destroy(struct msm_dsi_pll *pll); 1169d32c498SHai Li int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll, 1179d32c498SHai Li struct clk **byte_clk_provider, struct clk **pixel_clk_provider); 118328e1a63SHai Li void msm_dsi_pll_save_state(struct msm_dsi_pll *pll); 119328e1a63SHai Li int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll); 1209d32c498SHai Li #else 1219d32c498SHai Li static inline struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev, 1229d32c498SHai Li enum msm_dsi_phy_type type, int id) { 1239d32c498SHai Li return ERR_PTR(-ENODEV); 1249d32c498SHai Li } 1259d32c498SHai Li static inline void msm_dsi_pll_destroy(struct msm_dsi_pll *pll) 1269d32c498SHai Li { 1279d32c498SHai Li } 1289d32c498SHai Li static inline int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll, 1299d32c498SHai Li struct clk **byte_clk_provider, struct clk **pixel_clk_provider) 1309d32c498SHai Li { 1319d32c498SHai Li return -ENODEV; 1329d32c498SHai Li } 133328e1a63SHai Li static inline void msm_dsi_pll_save_state(struct msm_dsi_pll *pll) 134328e1a63SHai Li { 135328e1a63SHai Li } 136328e1a63SHai Li static inline int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll) 137328e1a63SHai Li { 138328e1a63SHai Li return 0; 139328e1a63SHai Li } 1409d32c498SHai Li #endif 1419d32c498SHai Li 142a689554bSHai Li /* dsi host */ 143a689554bSHai Li int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host, 144a689554bSHai Li const struct mipi_dsi_msg *msg); 145a689554bSHai Li void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host, 146a689554bSHai Li const struct mipi_dsi_msg *msg); 147a689554bSHai Li int msm_dsi_host_cmd_tx(struct mipi_dsi_host *host, 148a689554bSHai Li const struct mipi_dsi_msg *msg); 149a689554bSHai Li int msm_dsi_host_cmd_rx(struct mipi_dsi_host *host, 150a689554bSHai Li const struct mipi_dsi_msg *msg); 151a689554bSHai Li void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host, 1524ff9d4cbSArchit Taneja u32 dma_base, u32 len); 153a689554bSHai Li int msm_dsi_host_enable(struct mipi_dsi_host *host); 154a689554bSHai Li int msm_dsi_host_disable(struct mipi_dsi_host *host); 155*b62aa70aSHai Li int msm_dsi_host_power_on(struct mipi_dsi_host *host, 156*b62aa70aSHai Li struct msm_dsi_phy_shared_timings *phy_shared_timings); 157a689554bSHai Li int msm_dsi_host_power_off(struct mipi_dsi_host *host); 158a689554bSHai Li int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, 159a689554bSHai Li struct drm_display_mode *mode); 160a689554bSHai Li struct drm_panel *msm_dsi_host_get_panel(struct mipi_dsi_host *host, 161a689554bSHai Li unsigned long *panel_flags); 162c118e290SArchit Taneja struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host *host); 163a689554bSHai Li int msm_dsi_host_register(struct mipi_dsi_host *host, bool check_defer); 164a689554bSHai Li void msm_dsi_host_unregister(struct mipi_dsi_host *host); 1659d32c498SHai Li int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host, 1669d32c498SHai Li struct msm_dsi_pll *src_pll); 16734d9545bSArchit Taneja void msm_dsi_host_reset_phy(struct mipi_dsi_host *host); 168*b62aa70aSHai Li void msm_dsi_host_get_phy_clk_req(struct mipi_dsi_host *host, 169*b62aa70aSHai Li struct msm_dsi_phy_clk_request *clk_req); 170a689554bSHai Li void msm_dsi_host_destroy(struct mipi_dsi_host *host); 171a689554bSHai Li int msm_dsi_host_modeset_init(struct mipi_dsi_host *host, 172a689554bSHai Li struct drm_device *dev); 173a689554bSHai Li int msm_dsi_host_init(struct msm_dsi *msm_dsi); 174a689554bSHai Li 175a689554bSHai Li /* dsi phy */ 176a689554bSHai Li struct msm_dsi_phy; 177dceac340SHai Li struct msm_dsi_phy_shared_timings { 178dceac340SHai Li u32 clk_post; 179dceac340SHai Li u32 clk_pre; 180dceac340SHai Li bool clk_pre_inc_by_2; 181dceac340SHai Li }; 182*b62aa70aSHai Li 183*b62aa70aSHai Li struct msm_dsi_phy_clk_request { 184*b62aa70aSHai Li unsigned long bitclk_rate; 185*b62aa70aSHai Li unsigned long escclk_rate; 186*b62aa70aSHai Li }; 187*b62aa70aSHai Li 188ec31abf6SHai Li void msm_dsi_phy_driver_register(void); 189ec31abf6SHai Li void msm_dsi_phy_driver_unregister(void); 19013351cd1SHai Li int msm_dsi_phy_enable(struct msm_dsi_phy *phy, int src_pll_id, 191*b62aa70aSHai Li struct msm_dsi_phy_clk_request *clk_req); 19229e61690SHai Li void msm_dsi_phy_disable(struct msm_dsi_phy *phy); 193dceac340SHai Li void msm_dsi_phy_get_shared_timings(struct msm_dsi_phy *phy, 194dceac340SHai Li struct msm_dsi_phy_shared_timings *shared_timing); 1959d32c498SHai Li struct msm_dsi_pll *msm_dsi_phy_get_pll(struct msm_dsi_phy *phy); 19657bf4338SHai Li void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy, 19757bf4338SHai Li enum msm_dsi_phy_usecase uc); 1989d32c498SHai Li 199a689554bSHai Li #endif /* __DSI_CONNECTOR_H__ */ 200a689554bSHai Li 201