xref: /linux/drivers/gpu/drm/msm/dsi/dsi.h (revision aaadcbb4d70239b24b469ede7637c332820c12f0)
197fb5e8dSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2a689554bSHai Li /*
3a689554bSHai Li  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
4a689554bSHai Li  */
5a689554bSHai Li 
6a689554bSHai Li #ifndef __DSI_CONNECTOR_H__
7a689554bSHai Li #define __DSI_CONNECTOR_H__
8a689554bSHai Li 
9ec31abf6SHai Li #include <linux/of_platform.h>
10a689554bSHai Li #include <linux/platform_device.h>
11a689554bSHai Li 
12ee68c743SBoris Brezillon #include <drm/drm_bridge.h>
1378f27b1cSMasahiro Yamada #include <drm/drm_crtc.h>
1478f27b1cSMasahiro Yamada #include <drm/drm_mipi_dsi.h>
1578f27b1cSMasahiro Yamada #include <drm/drm_panel.h>
16a689554bSHai Li 
17a689554bSHai Li #include "msm_drv.h"
18a689554bSHai Li 
19a689554bSHai Li #define DSI_0	0
20a689554bSHai Li #define DSI_1	1
21a689554bSHai Li #define DSI_MAX	2
22a689554bSHai Li 
23dceac340SHai Li struct msm_dsi_phy_shared_timings;
24b62aa70aSHai Li struct msm_dsi_phy_clk_request;
25dceac340SHai Li 
2657bf4338SHai Li enum msm_dsi_phy_usecase {
2757bf4338SHai Li 	MSM_DSI_PHY_STANDALONE,
2857bf4338SHai Li 	MSM_DSI_PHY_MASTER,
2957bf4338SHai Li 	MSM_DSI_PHY_SLAVE,
3057bf4338SHai Li };
3157bf4338SHai Li 
32ec31abf6SHai Li #define DSI_DEV_REGULATOR_MAX	8
336e0eb52eSArchit Taneja #define DSI_BUS_CLK_MAX		4
34ec31abf6SHai Li 
35ec31abf6SHai Li /* Regulators for DSI devices */
36ec31abf6SHai Li struct dsi_reg_entry {
37ec31abf6SHai Li 	char name[32];
38ec31abf6SHai Li 	int enable_load;
39ec31abf6SHai Li 	int disable_load;
40ec31abf6SHai Li };
41ec31abf6SHai Li 
42ec31abf6SHai Li struct dsi_reg_config {
43ec31abf6SHai Li 	int num;
44ec31abf6SHai Li 	struct dsi_reg_entry regs[DSI_DEV_REGULATOR_MAX];
45ec31abf6SHai Li };
46ec31abf6SHai Li 
47a689554bSHai Li struct msm_dsi {
48a689554bSHai Li 	struct drm_device *dev;
49a689554bSHai Li 	struct platform_device *pdev;
50a689554bSHai Li 
51c118e290SArchit Taneja 	/* connector managed by us when we're connected to a drm_panel */
52a689554bSHai Li 	struct drm_connector *connector;
53c118e290SArchit Taneja 	/* internal dsi bridge attached to MDP interface */
54a689554bSHai Li 	struct drm_bridge *bridge;
55a689554bSHai Li 
56a689554bSHai Li 	struct mipi_dsi_host *host;
57a689554bSHai Li 	struct msm_dsi_phy *phy;
58c118e290SArchit Taneja 
59c118e290SArchit Taneja 	/*
60c118e290SArchit Taneja 	 * panel/external_bridge connected to dsi bridge output, only one of the
61c118e290SArchit Taneja 	 * two can be valid at a time
62c118e290SArchit Taneja 	 */
63a689554bSHai Li 	struct drm_panel *panel;
64c118e290SArchit Taneja 	struct drm_bridge *external_bridge;
659d32c498SHai Li 
66ec31abf6SHai Li 	struct device *phy_dev;
67a689554bSHai Li 	bool phy_enabled;
68a689554bSHai Li 
6997e00119SArchit Taneja 	/* the encoder we are hooked to (outside of dsi block) */
7097e00119SArchit Taneja 	struct drm_encoder *encoder;
71a689554bSHai Li 
72a689554bSHai Li 	int id;
73a689554bSHai Li };
74a689554bSHai Li 
75a689554bSHai Li /* dsi manager */
76a689554bSHai Li struct drm_bridge *msm_dsi_manager_bridge_init(u8 id);
77a689554bSHai Li void msm_dsi_manager_bridge_destroy(struct drm_bridge *bridge);
78a689554bSHai Li struct drm_connector *msm_dsi_manager_connector_init(u8 id);
79c118e290SArchit Taneja struct drm_connector *msm_dsi_manager_ext_bridge_init(u8 id);
80a689554bSHai Li int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg);
814ff9d4cbSArchit Taneja bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len);
8203436e3eSSean Paul void msm_dsi_manager_setup_encoder(int id);
83a689554bSHai Li int msm_dsi_manager_register(struct msm_dsi *msm_dsi);
84a689554bSHai Li void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi);
858b03ad30SChandan Uddaraju bool msm_dsi_manager_validate_current_config(u8 id);
86a689554bSHai Li 
87a689554bSHai Li /* msm dsi */
886f054ec5SArchit Taneja static inline bool msm_dsi_device_connected(struct msm_dsi *msm_dsi)
896f054ec5SArchit Taneja {
90c118e290SArchit Taneja 	return msm_dsi->panel || msm_dsi->external_bridge;
916f054ec5SArchit Taneja }
926f054ec5SArchit Taneja 
93a689554bSHai Li struct drm_encoder *msm_dsi_get_encoder(struct msm_dsi *msm_dsi);
94a689554bSHai Li 
95a689554bSHai Li /* dsi host */
96e18177ccSSibi Sankar struct msm_dsi_host;
97a689554bSHai Li int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host,
98a689554bSHai Li 					const struct mipi_dsi_msg *msg);
99a689554bSHai Li void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host,
100a689554bSHai Li 					const struct mipi_dsi_msg *msg);
101a689554bSHai Li int msm_dsi_host_cmd_tx(struct mipi_dsi_host *host,
102a689554bSHai Li 					const struct mipi_dsi_msg *msg);
103a689554bSHai Li int msm_dsi_host_cmd_rx(struct mipi_dsi_host *host,
104a689554bSHai Li 					const struct mipi_dsi_msg *msg);
105a689554bSHai Li void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host,
1064ff9d4cbSArchit Taneja 					u32 dma_base, u32 len);
107a689554bSHai Li int msm_dsi_host_enable(struct mipi_dsi_host *host);
108a689554bSHai Li int msm_dsi_host_disable(struct mipi_dsi_host *host);
109b62aa70aSHai Li int msm_dsi_host_power_on(struct mipi_dsi_host *host,
110ed9976a0SChandan Uddaraju 			struct msm_dsi_phy_shared_timings *phy_shared_timings,
111ed9976a0SChandan Uddaraju 			bool is_dual_dsi);
112a689554bSHai Li int msm_dsi_host_power_off(struct mipi_dsi_host *host);
113a689554bSHai Li int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host,
11463f8f3baSLaurent Pinchart 				  const struct drm_display_mode *mode);
115e3a91f89SSean Paul struct drm_panel *msm_dsi_host_get_panel(struct mipi_dsi_host *host);
116e3a91f89SSean Paul unsigned long msm_dsi_host_get_mode_flags(struct mipi_dsi_host *host);
117c118e290SArchit Taneja struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host *host);
118a689554bSHai Li int msm_dsi_host_register(struct mipi_dsi_host *host, bool check_defer);
119a689554bSHai Li void msm_dsi_host_unregister(struct mipi_dsi_host *host);
1209d32c498SHai Li int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
1215d134596SDmitry Baryshkov 			struct msm_dsi_phy *src_phy);
12234d9545bSArchit Taneja void msm_dsi_host_reset_phy(struct mipi_dsi_host *host);
123b62aa70aSHai Li void msm_dsi_host_get_phy_clk_req(struct mipi_dsi_host *host,
124ed9976a0SChandan Uddaraju 	struct msm_dsi_phy_clk_request *clk_req,
125ed9976a0SChandan Uddaraju 	bool is_dual_dsi);
126a689554bSHai Li void msm_dsi_host_destroy(struct mipi_dsi_host *host);
127a689554bSHai Li int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,
128a689554bSHai Li 					struct drm_device *dev);
129a689554bSHai Li int msm_dsi_host_init(struct msm_dsi *msm_dsi);
130f54ca1a0SArchit Taneja int msm_dsi_runtime_suspend(struct device *dev);
131f54ca1a0SArchit Taneja int msm_dsi_runtime_resume(struct device *dev);
1326b16f05aSRob Clark int dsi_link_clk_set_rate_6g(struct msm_dsi_host *msm_host);
1336b16f05aSRob Clark int dsi_link_clk_set_rate_v2(struct msm_dsi_host *msm_host);
134c4d8cfe5SSibi Sankar int dsi_link_clk_enable_6g(struct msm_dsi_host *msm_host);
135c4d8cfe5SSibi Sankar int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host);
136c4d8cfe5SSibi Sankar void dsi_link_clk_disable_6g(struct msm_dsi_host *msm_host);
137c4d8cfe5SSibi Sankar void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host);
138c4d8cfe5SSibi Sankar int dsi_tx_buf_alloc_6g(struct msm_dsi_host *msm_host, int size);
139c4d8cfe5SSibi Sankar int dsi_tx_buf_alloc_v2(struct msm_dsi_host *msm_host, int size);
140c4d8cfe5SSibi Sankar void *dsi_tx_buf_get_6g(struct msm_dsi_host *msm_host);
141c4d8cfe5SSibi Sankar void *dsi_tx_buf_get_v2(struct msm_dsi_host *msm_host);
142c4d8cfe5SSibi Sankar void dsi_tx_buf_put_6g(struct msm_dsi_host *msm_host);
143c4d8cfe5SSibi Sankar int dsi_dma_base_get_6g(struct msm_dsi_host *msm_host, uint64_t *iova);
144c4d8cfe5SSibi Sankar int dsi_dma_base_get_v2(struct msm_dsi_host *msm_host, uint64_t *iova);
145c4d8cfe5SSibi Sankar int dsi_clk_init_v2(struct msm_dsi_host *msm_host);
146c4d8cfe5SSibi Sankar int dsi_clk_init_6g_v2(struct msm_dsi_host *msm_host);
147ed9976a0SChandan Uddaraju int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_dual_dsi);
148ed9976a0SChandan Uddaraju int dsi_calc_clk_rate_6g(struct msm_dsi_host *msm_host, bool is_dual_dsi);
149a689554bSHai Li 
150a689554bSHai Li /* dsi phy */
151a689554bSHai Li struct msm_dsi_phy;
152dceac340SHai Li struct msm_dsi_phy_shared_timings {
153dceac340SHai Li 	u32 clk_post;
154dceac340SHai Li 	u32 clk_pre;
155dceac340SHai Li 	bool clk_pre_inc_by_2;
156dceac340SHai Li };
157b62aa70aSHai Li 
158b62aa70aSHai Li struct msm_dsi_phy_clk_request {
159b62aa70aSHai Li 	unsigned long bitclk_rate;
160b62aa70aSHai Li 	unsigned long escclk_rate;
161b62aa70aSHai Li };
162b62aa70aSHai Li 
163ec31abf6SHai Li void msm_dsi_phy_driver_register(void);
164ec31abf6SHai Li void msm_dsi_phy_driver_unregister(void);
16513351cd1SHai Li int msm_dsi_phy_enable(struct msm_dsi_phy *phy, int src_pll_id,
166b62aa70aSHai Li 			struct msm_dsi_phy_clk_request *clk_req);
16729e61690SHai Li void msm_dsi_phy_disable(struct msm_dsi_phy *phy);
168dceac340SHai Li void msm_dsi_phy_get_shared_timings(struct msm_dsi_phy *phy,
169dceac340SHai Li 			struct msm_dsi_phy_shared_timings *shared_timing);
17057bf4338SHai Li void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
17157bf4338SHai Li 			     enum msm_dsi_phy_usecase uc);
1725d134596SDmitry Baryshkov int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
1735d134596SDmitry Baryshkov 	struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
174*aaadcbb4SDmitry Baryshkov void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy);
175*aaadcbb4SDmitry Baryshkov int msm_dsi_phy_pll_restore_state(struct msm_dsi_phy *phy);
1769d32c498SHai Li 
177a689554bSHai Li #endif /* __DSI_CONNECTOR_H__ */
178a689554bSHai Li 
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