xref: /linux/drivers/gpu/drm/msm/dsi/dsi.h (revision 9c9f6f8d472cc9e11f2c0b370685ce78ab7eb2fa)
1a689554bSHai Li /*
2a689554bSHai Li  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
3a689554bSHai Li  *
4a689554bSHai Li  * This program is free software; you can redistribute it and/or modify
5a689554bSHai Li  * it under the terms of the GNU General Public License version 2 and
6a689554bSHai Li  * only version 2 as published by the Free Software Foundation.
7a689554bSHai Li  *
8a689554bSHai Li  * This program is distributed in the hope that it will be useful,
9a689554bSHai Li  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10a689554bSHai Li  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11a689554bSHai Li  * GNU General Public License for more details.
12a689554bSHai Li  */
13a689554bSHai Li 
14a689554bSHai Li #ifndef __DSI_CONNECTOR_H__
15a689554bSHai Li #define __DSI_CONNECTOR_H__
16a689554bSHai Li 
17ec31abf6SHai Li #include <linux/of_platform.h>
18a689554bSHai Li #include <linux/platform_device.h>
19a689554bSHai Li 
20a689554bSHai Li #include "drm_crtc.h"
21a689554bSHai Li #include "drm_mipi_dsi.h"
22a689554bSHai Li #include "drm_panel.h"
23a689554bSHai Li 
24a689554bSHai Li #include "msm_drv.h"
25a689554bSHai Li 
26a689554bSHai Li #define DSI_0	0
27a689554bSHai Li #define DSI_1	1
28a689554bSHai Li #define DSI_MAX	2
29a689554bSHai Li 
309d32c498SHai Li enum msm_dsi_phy_type {
319d32c498SHai Li 	MSM_DSI_PHY_28NM_HPM,
329d32c498SHai Li 	MSM_DSI_PHY_28NM_LP,
33dcefc117SHai Li 	MSM_DSI_PHY_20NM,
34225380b3SArchit Taneja 	MSM_DSI_PHY_28NM_8960,
359d32c498SHai Li 	MSM_DSI_PHY_MAX
369d32c498SHai Li };
379d32c498SHai Li 
38ec31abf6SHai Li #define DSI_DEV_REGULATOR_MAX	8
396e0eb52eSArchit Taneja #define DSI_BUS_CLK_MAX		4
40ec31abf6SHai Li 
41ec31abf6SHai Li /* Regulators for DSI devices */
42ec31abf6SHai Li struct dsi_reg_entry {
43ec31abf6SHai Li 	char name[32];
44ec31abf6SHai Li 	int enable_load;
45ec31abf6SHai Li 	int disable_load;
46ec31abf6SHai Li };
47ec31abf6SHai Li 
48ec31abf6SHai Li struct dsi_reg_config {
49ec31abf6SHai Li 	int num;
50ec31abf6SHai Li 	struct dsi_reg_entry regs[DSI_DEV_REGULATOR_MAX];
51ec31abf6SHai Li };
52ec31abf6SHai Li 
53a689554bSHai Li struct msm_dsi {
54a689554bSHai Li 	struct drm_device *dev;
55a689554bSHai Li 	struct platform_device *pdev;
56a689554bSHai Li 
57c118e290SArchit Taneja 	/* connector managed by us when we're connected to a drm_panel */
58a689554bSHai Li 	struct drm_connector *connector;
59c118e290SArchit Taneja 	/* internal dsi bridge attached to MDP interface */
60a689554bSHai Li 	struct drm_bridge *bridge;
61a689554bSHai Li 
62a689554bSHai Li 	struct mipi_dsi_host *host;
63a689554bSHai Li 	struct msm_dsi_phy *phy;
64c118e290SArchit Taneja 
65c118e290SArchit Taneja 	/*
66c118e290SArchit Taneja 	 * panel/external_bridge connected to dsi bridge output, only one of the
67c118e290SArchit Taneja 	 * two can be valid at a time
68c118e290SArchit Taneja 	 */
69a689554bSHai Li 	struct drm_panel *panel;
70c118e290SArchit Taneja 	struct drm_bridge *external_bridge;
71a9ddac9cSArchit Taneja 	unsigned long device_flags;
729d32c498SHai Li 
73ec31abf6SHai Li 	struct device *phy_dev;
74a689554bSHai Li 	bool phy_enabled;
75a689554bSHai Li 
7697e00119SArchit Taneja 	/* the encoder we are hooked to (outside of dsi block) */
7797e00119SArchit Taneja 	struct drm_encoder *encoder;
78a689554bSHai Li 
79a689554bSHai Li 	int id;
80a689554bSHai Li };
81a689554bSHai Li 
82a689554bSHai Li /* dsi manager */
83a689554bSHai Li struct drm_bridge *msm_dsi_manager_bridge_init(u8 id);
84a689554bSHai Li void msm_dsi_manager_bridge_destroy(struct drm_bridge *bridge);
85a689554bSHai Li struct drm_connector *msm_dsi_manager_connector_init(u8 id);
86c118e290SArchit Taneja struct drm_connector *msm_dsi_manager_ext_bridge_init(u8 id);
87a689554bSHai Li int msm_dsi_manager_phy_enable(int id,
88a689554bSHai Li 		const unsigned long bit_rate, const unsigned long esc_rate,
89a689554bSHai Li 		u32 *clk_pre, u32 *clk_post);
90a689554bSHai Li void msm_dsi_manager_phy_disable(int id);
91a689554bSHai Li int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg);
924ff9d4cbSArchit Taneja bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len);
93*9c9f6f8dSArchit Taneja void msm_dsi_manager_attach_dsi_device(int id, u32 device_flags);
94a689554bSHai Li int msm_dsi_manager_register(struct msm_dsi *msm_dsi);
95a689554bSHai Li void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi);
96a689554bSHai Li 
97a689554bSHai Li /* msm dsi */
986f054ec5SArchit Taneja static inline bool msm_dsi_device_connected(struct msm_dsi *msm_dsi)
996f054ec5SArchit Taneja {
100c118e290SArchit Taneja 	return msm_dsi->panel || msm_dsi->external_bridge;
1016f054ec5SArchit Taneja }
1026f054ec5SArchit Taneja 
103a689554bSHai Li struct drm_encoder *msm_dsi_get_encoder(struct msm_dsi *msm_dsi);
104a689554bSHai Li 
1059d32c498SHai Li /* dsi pll */
1069d32c498SHai Li struct msm_dsi_pll;
1079d32c498SHai Li #ifdef CONFIG_DRM_MSM_DSI_PLL
1089d32c498SHai Li struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev,
1099d32c498SHai Li 			enum msm_dsi_phy_type type, int dsi_id);
1109d32c498SHai Li void msm_dsi_pll_destroy(struct msm_dsi_pll *pll);
1119d32c498SHai Li int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll,
1129d32c498SHai Li 	struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
113328e1a63SHai Li void msm_dsi_pll_save_state(struct msm_dsi_pll *pll);
114328e1a63SHai Li int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll);
1159d32c498SHai Li #else
1169d32c498SHai Li static inline struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev,
1179d32c498SHai Li 			 enum msm_dsi_phy_type type, int id) {
1189d32c498SHai Li 	return ERR_PTR(-ENODEV);
1199d32c498SHai Li }
1209d32c498SHai Li static inline void msm_dsi_pll_destroy(struct msm_dsi_pll *pll)
1219d32c498SHai Li {
1229d32c498SHai Li }
1239d32c498SHai Li static inline int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll,
1249d32c498SHai Li 	struct clk **byte_clk_provider, struct clk **pixel_clk_provider)
1259d32c498SHai Li {
1269d32c498SHai Li 	return -ENODEV;
1279d32c498SHai Li }
128328e1a63SHai Li static inline void msm_dsi_pll_save_state(struct msm_dsi_pll *pll)
129328e1a63SHai Li {
130328e1a63SHai Li }
131328e1a63SHai Li static inline int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll)
132328e1a63SHai Li {
133328e1a63SHai Li 	return 0;
134328e1a63SHai Li }
1359d32c498SHai Li #endif
1369d32c498SHai Li 
137a689554bSHai Li /* dsi host */
138a689554bSHai Li int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host,
139a689554bSHai Li 					const struct mipi_dsi_msg *msg);
140a689554bSHai Li void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host,
141a689554bSHai Li 					const struct mipi_dsi_msg *msg);
142a689554bSHai Li int msm_dsi_host_cmd_tx(struct mipi_dsi_host *host,
143a689554bSHai Li 					const struct mipi_dsi_msg *msg);
144a689554bSHai Li int msm_dsi_host_cmd_rx(struct mipi_dsi_host *host,
145a689554bSHai Li 					const struct mipi_dsi_msg *msg);
146a689554bSHai Li void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host,
1474ff9d4cbSArchit Taneja 					u32 dma_base, u32 len);
148a689554bSHai Li int msm_dsi_host_enable(struct mipi_dsi_host *host);
149a689554bSHai Li int msm_dsi_host_disable(struct mipi_dsi_host *host);
150a689554bSHai Li int msm_dsi_host_power_on(struct mipi_dsi_host *host);
151a689554bSHai Li int msm_dsi_host_power_off(struct mipi_dsi_host *host);
152a689554bSHai Li int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host,
153a689554bSHai Li 					struct drm_display_mode *mode);
154a689554bSHai Li struct drm_panel *msm_dsi_host_get_panel(struct mipi_dsi_host *host,
155a689554bSHai Li 					unsigned long *panel_flags);
156c118e290SArchit Taneja struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host *host);
157a689554bSHai Li int msm_dsi_host_register(struct mipi_dsi_host *host, bool check_defer);
158a689554bSHai Li void msm_dsi_host_unregister(struct mipi_dsi_host *host);
1599d32c498SHai Li int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
1609d32c498SHai Li 			struct msm_dsi_pll *src_pll);
161a689554bSHai Li void msm_dsi_host_destroy(struct mipi_dsi_host *host);
162a689554bSHai Li int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,
163a689554bSHai Li 					struct drm_device *dev);
164a689554bSHai Li int msm_dsi_host_init(struct msm_dsi *msm_dsi);
165a689554bSHai Li 
166a689554bSHai Li /* dsi phy */
167a689554bSHai Li struct msm_dsi_phy;
168ec31abf6SHai Li void msm_dsi_phy_driver_register(void);
169ec31abf6SHai Li void msm_dsi_phy_driver_unregister(void);
17013351cd1SHai Li int msm_dsi_phy_enable(struct msm_dsi_phy *phy, int src_pll_id,
171a689554bSHai Li 	const unsigned long bit_rate, const unsigned long esc_rate);
17229e61690SHai Li void msm_dsi_phy_disable(struct msm_dsi_phy *phy);
173a689554bSHai Li void msm_dsi_phy_get_clk_pre_post(struct msm_dsi_phy *phy,
174a689554bSHai Li 					u32 *clk_pre, u32 *clk_post);
1759d32c498SHai Li struct msm_dsi_pll *msm_dsi_phy_get_pll(struct msm_dsi_phy *phy);
1769d32c498SHai Li 
177a689554bSHai Li #endif /* __DSI_CONNECTOR_H__ */
178a689554bSHai Li 
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