1*97fb5e8dSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2a689554bSHai Li /* 3a689554bSHai Li * Copyright (c) 2015, The Linux Foundation. All rights reserved. 4a689554bSHai Li */ 5a689554bSHai Li 6a689554bSHai Li #ifndef __DSI_CONNECTOR_H__ 7a689554bSHai Li #define __DSI_CONNECTOR_H__ 8a689554bSHai Li 9ec31abf6SHai Li #include <linux/of_platform.h> 10a689554bSHai Li #include <linux/platform_device.h> 11a689554bSHai Li 1278f27b1cSMasahiro Yamada #include <drm/drm_crtc.h> 1378f27b1cSMasahiro Yamada #include <drm/drm_mipi_dsi.h> 1478f27b1cSMasahiro Yamada #include <drm/drm_panel.h> 15a689554bSHai Li 16a689554bSHai Li #include "msm_drv.h" 17a689554bSHai Li 18a689554bSHai Li #define DSI_0 0 19a689554bSHai Li #define DSI_1 1 20a689554bSHai Li #define DSI_MAX 2 21a689554bSHai Li 22dceac340SHai Li struct msm_dsi_phy_shared_timings; 23b62aa70aSHai Li struct msm_dsi_phy_clk_request; 24dceac340SHai Li 259d32c498SHai Li enum msm_dsi_phy_type { 269d32c498SHai Li MSM_DSI_PHY_28NM_HPM, 279d32c498SHai Li MSM_DSI_PHY_28NM_LP, 28dcefc117SHai Li MSM_DSI_PHY_20NM, 29225380b3SArchit Taneja MSM_DSI_PHY_28NM_8960, 30f079f6d9SArchit Taneja MSM_DSI_PHY_14NM, 31973e02dbSArchit Taneja MSM_DSI_PHY_10NM, 329d32c498SHai Li MSM_DSI_PHY_MAX 339d32c498SHai Li }; 349d32c498SHai Li 3557bf4338SHai Li enum msm_dsi_phy_usecase { 3657bf4338SHai Li MSM_DSI_PHY_STANDALONE, 3757bf4338SHai Li MSM_DSI_PHY_MASTER, 3857bf4338SHai Li MSM_DSI_PHY_SLAVE, 3957bf4338SHai Li }; 4057bf4338SHai Li 41ec31abf6SHai Li #define DSI_DEV_REGULATOR_MAX 8 426e0eb52eSArchit Taneja #define DSI_BUS_CLK_MAX 4 43ec31abf6SHai Li 44ec31abf6SHai Li /* Regulators for DSI devices */ 45ec31abf6SHai Li struct dsi_reg_entry { 46ec31abf6SHai Li char name[32]; 47ec31abf6SHai Li int enable_load; 48ec31abf6SHai Li int disable_load; 49ec31abf6SHai Li }; 50ec31abf6SHai Li 51ec31abf6SHai Li struct dsi_reg_config { 52ec31abf6SHai Li int num; 53ec31abf6SHai Li struct dsi_reg_entry regs[DSI_DEV_REGULATOR_MAX]; 54ec31abf6SHai Li }; 55ec31abf6SHai Li 56a689554bSHai Li struct msm_dsi { 57a689554bSHai Li struct drm_device *dev; 58a689554bSHai Li struct platform_device *pdev; 59a689554bSHai Li 60c118e290SArchit Taneja /* connector managed by us when we're connected to a drm_panel */ 61a689554bSHai Li struct drm_connector *connector; 62c118e290SArchit Taneja /* internal dsi bridge attached to MDP interface */ 63a689554bSHai Li struct drm_bridge *bridge; 64a689554bSHai Li 65a689554bSHai Li struct mipi_dsi_host *host; 66a689554bSHai Li struct msm_dsi_phy *phy; 67c118e290SArchit Taneja 68c118e290SArchit Taneja /* 69c118e290SArchit Taneja * panel/external_bridge connected to dsi bridge output, only one of the 70c118e290SArchit Taneja * two can be valid at a time 71c118e290SArchit Taneja */ 72a689554bSHai Li struct drm_panel *panel; 73c118e290SArchit Taneja struct drm_bridge *external_bridge; 74a9ddac9cSArchit Taneja unsigned long device_flags; 759d32c498SHai Li 76ec31abf6SHai Li struct device *phy_dev; 77a689554bSHai Li bool phy_enabled; 78a689554bSHai Li 7997e00119SArchit Taneja /* the encoder we are hooked to (outside of dsi block) */ 8097e00119SArchit Taneja struct drm_encoder *encoder; 81a689554bSHai Li 82a689554bSHai Li int id; 83a689554bSHai Li }; 84a689554bSHai Li 85a689554bSHai Li /* dsi manager */ 86a689554bSHai Li struct drm_bridge *msm_dsi_manager_bridge_init(u8 id); 87a689554bSHai Li void msm_dsi_manager_bridge_destroy(struct drm_bridge *bridge); 88a689554bSHai Li struct drm_connector *msm_dsi_manager_connector_init(u8 id); 89c118e290SArchit Taneja struct drm_connector *msm_dsi_manager_ext_bridge_init(u8 id); 90a689554bSHai Li int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg); 914ff9d4cbSArchit Taneja bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len); 929c9f6f8dSArchit Taneja void msm_dsi_manager_attach_dsi_device(int id, u32 device_flags); 93a689554bSHai Li int msm_dsi_manager_register(struct msm_dsi *msm_dsi); 94a689554bSHai Li void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi); 958b03ad30SChandan Uddaraju bool msm_dsi_manager_validate_current_config(u8 id); 96a689554bSHai Li 97a689554bSHai Li /* msm dsi */ 986f054ec5SArchit Taneja static inline bool msm_dsi_device_connected(struct msm_dsi *msm_dsi) 996f054ec5SArchit Taneja { 100c118e290SArchit Taneja return msm_dsi->panel || msm_dsi->external_bridge; 1016f054ec5SArchit Taneja } 1026f054ec5SArchit Taneja 103a689554bSHai Li struct drm_encoder *msm_dsi_get_encoder(struct msm_dsi *msm_dsi); 104a689554bSHai Li 1059d32c498SHai Li /* dsi pll */ 1069d32c498SHai Li struct msm_dsi_pll; 1079d32c498SHai Li #ifdef CONFIG_DRM_MSM_DSI_PLL 1089d32c498SHai Li struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev, 1099d32c498SHai Li enum msm_dsi_phy_type type, int dsi_id); 1109d32c498SHai Li void msm_dsi_pll_destroy(struct msm_dsi_pll *pll); 1119d32c498SHai Li int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll, 1129d32c498SHai Li struct clk **byte_clk_provider, struct clk **pixel_clk_provider); 113328e1a63SHai Li void msm_dsi_pll_save_state(struct msm_dsi_pll *pll); 114328e1a63SHai Li int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll); 115f079f6d9SArchit Taneja int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll, 116f079f6d9SArchit Taneja enum msm_dsi_phy_usecase uc); 1179d32c498SHai Li #else 1189d32c498SHai Li static inline struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev, 1199d32c498SHai Li enum msm_dsi_phy_type type, int id) { 1209d32c498SHai Li return ERR_PTR(-ENODEV); 1219d32c498SHai Li } 1229d32c498SHai Li static inline void msm_dsi_pll_destroy(struct msm_dsi_pll *pll) 1239d32c498SHai Li { 1249d32c498SHai Li } 1259d32c498SHai Li static inline int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll, 1269d32c498SHai Li struct clk **byte_clk_provider, struct clk **pixel_clk_provider) 1279d32c498SHai Li { 1289d32c498SHai Li return -ENODEV; 1299d32c498SHai Li } 130328e1a63SHai Li static inline void msm_dsi_pll_save_state(struct msm_dsi_pll *pll) 131328e1a63SHai Li { 132328e1a63SHai Li } 133328e1a63SHai Li static inline int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll) 134328e1a63SHai Li { 135328e1a63SHai Li return 0; 136328e1a63SHai Li } 137f079f6d9SArchit Taneja static inline int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll, 138f079f6d9SArchit Taneja enum msm_dsi_phy_usecase uc) 139f079f6d9SArchit Taneja { 140f079f6d9SArchit Taneja return -ENODEV; 141f079f6d9SArchit Taneja } 1429d32c498SHai Li #endif 1439d32c498SHai Li 144a689554bSHai Li /* dsi host */ 145e18177ccSSibi Sankar struct msm_dsi_host; 146a689554bSHai Li int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host, 147a689554bSHai Li const struct mipi_dsi_msg *msg); 148a689554bSHai Li void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host, 149a689554bSHai Li const struct mipi_dsi_msg *msg); 150a689554bSHai Li int msm_dsi_host_cmd_tx(struct mipi_dsi_host *host, 151a689554bSHai Li const struct mipi_dsi_msg *msg); 152a689554bSHai Li int msm_dsi_host_cmd_rx(struct mipi_dsi_host *host, 153a689554bSHai Li const struct mipi_dsi_msg *msg); 154a689554bSHai Li void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host, 1554ff9d4cbSArchit Taneja u32 dma_base, u32 len); 156a689554bSHai Li int msm_dsi_host_enable(struct mipi_dsi_host *host); 157a689554bSHai Li int msm_dsi_host_disable(struct mipi_dsi_host *host); 158b62aa70aSHai Li int msm_dsi_host_power_on(struct mipi_dsi_host *host, 159ed9976a0SChandan Uddaraju struct msm_dsi_phy_shared_timings *phy_shared_timings, 160ed9976a0SChandan Uddaraju bool is_dual_dsi); 161a689554bSHai Li int msm_dsi_host_power_off(struct mipi_dsi_host *host); 162a689554bSHai Li int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, 16363f8f3baSLaurent Pinchart const struct drm_display_mode *mode); 164a689554bSHai Li struct drm_panel *msm_dsi_host_get_panel(struct mipi_dsi_host *host, 165a689554bSHai Li unsigned long *panel_flags); 166c118e290SArchit Taneja struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host *host); 167a689554bSHai Li int msm_dsi_host_register(struct mipi_dsi_host *host, bool check_defer); 168a689554bSHai Li void msm_dsi_host_unregister(struct mipi_dsi_host *host); 1699d32c498SHai Li int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host, 1709d32c498SHai Li struct msm_dsi_pll *src_pll); 17134d9545bSArchit Taneja void msm_dsi_host_reset_phy(struct mipi_dsi_host *host); 172b62aa70aSHai Li void msm_dsi_host_get_phy_clk_req(struct mipi_dsi_host *host, 173ed9976a0SChandan Uddaraju struct msm_dsi_phy_clk_request *clk_req, 174ed9976a0SChandan Uddaraju bool is_dual_dsi); 175a689554bSHai Li void msm_dsi_host_destroy(struct mipi_dsi_host *host); 176a689554bSHai Li int msm_dsi_host_modeset_init(struct mipi_dsi_host *host, 177a689554bSHai Li struct drm_device *dev); 178a689554bSHai Li int msm_dsi_host_init(struct msm_dsi *msm_dsi); 179f54ca1a0SArchit Taneja int msm_dsi_runtime_suspend(struct device *dev); 180f54ca1a0SArchit Taneja int msm_dsi_runtime_resume(struct device *dev); 181c4d8cfe5SSibi Sankar int dsi_link_clk_enable_6g(struct msm_dsi_host *msm_host); 182c4d8cfe5SSibi Sankar int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host); 183c4d8cfe5SSibi Sankar void dsi_link_clk_disable_6g(struct msm_dsi_host *msm_host); 184c4d8cfe5SSibi Sankar void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host); 185c4d8cfe5SSibi Sankar int dsi_tx_buf_alloc_6g(struct msm_dsi_host *msm_host, int size); 186c4d8cfe5SSibi Sankar int dsi_tx_buf_alloc_v2(struct msm_dsi_host *msm_host, int size); 187c4d8cfe5SSibi Sankar void *dsi_tx_buf_get_6g(struct msm_dsi_host *msm_host); 188c4d8cfe5SSibi Sankar void *dsi_tx_buf_get_v2(struct msm_dsi_host *msm_host); 189c4d8cfe5SSibi Sankar void dsi_tx_buf_put_6g(struct msm_dsi_host *msm_host); 190c4d8cfe5SSibi Sankar int dsi_dma_base_get_6g(struct msm_dsi_host *msm_host, uint64_t *iova); 191c4d8cfe5SSibi Sankar int dsi_dma_base_get_v2(struct msm_dsi_host *msm_host, uint64_t *iova); 192c4d8cfe5SSibi Sankar int dsi_clk_init_v2(struct msm_dsi_host *msm_host); 193c4d8cfe5SSibi Sankar int dsi_clk_init_6g_v2(struct msm_dsi_host *msm_host); 194ed9976a0SChandan Uddaraju int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_dual_dsi); 195ed9976a0SChandan Uddaraju int dsi_calc_clk_rate_6g(struct msm_dsi_host *msm_host, bool is_dual_dsi); 196a689554bSHai Li 197a689554bSHai Li /* dsi phy */ 198a689554bSHai Li struct msm_dsi_phy; 199dceac340SHai Li struct msm_dsi_phy_shared_timings { 200dceac340SHai Li u32 clk_post; 201dceac340SHai Li u32 clk_pre; 202dceac340SHai Li bool clk_pre_inc_by_2; 203dceac340SHai Li }; 204b62aa70aSHai Li 205b62aa70aSHai Li struct msm_dsi_phy_clk_request { 206b62aa70aSHai Li unsigned long bitclk_rate; 207b62aa70aSHai Li unsigned long escclk_rate; 208b62aa70aSHai Li }; 209b62aa70aSHai Li 210ec31abf6SHai Li void msm_dsi_phy_driver_register(void); 211ec31abf6SHai Li void msm_dsi_phy_driver_unregister(void); 21213351cd1SHai Li int msm_dsi_phy_enable(struct msm_dsi_phy *phy, int src_pll_id, 213b62aa70aSHai Li struct msm_dsi_phy_clk_request *clk_req); 21429e61690SHai Li void msm_dsi_phy_disable(struct msm_dsi_phy *phy); 215dceac340SHai Li void msm_dsi_phy_get_shared_timings(struct msm_dsi_phy *phy, 216dceac340SHai Li struct msm_dsi_phy_shared_timings *shared_timing); 2179d32c498SHai Li struct msm_dsi_pll *msm_dsi_phy_get_pll(struct msm_dsi_phy *phy); 21857bf4338SHai Li void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy, 21957bf4338SHai Li enum msm_dsi_phy_usecase uc); 2209d32c498SHai Li 221a689554bSHai Li #endif /* __DSI_CONNECTOR_H__ */ 222a689554bSHai Li 223