xref: /linux/drivers/gpu/drm/msm/dsi/dsi.h (revision 34d9545b9f769c6553e31a6820c9cb51f5e93099)
1a689554bSHai Li /*
2a689554bSHai Li  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
3a689554bSHai Li  *
4a689554bSHai Li  * This program is free software; you can redistribute it and/or modify
5a689554bSHai Li  * it under the terms of the GNU General Public License version 2 and
6a689554bSHai Li  * only version 2 as published by the Free Software Foundation.
7a689554bSHai Li  *
8a689554bSHai Li  * This program is distributed in the hope that it will be useful,
9a689554bSHai Li  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10a689554bSHai Li  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11a689554bSHai Li  * GNU General Public License for more details.
12a689554bSHai Li  */
13a689554bSHai Li 
14a689554bSHai Li #ifndef __DSI_CONNECTOR_H__
15a689554bSHai Li #define __DSI_CONNECTOR_H__
16a689554bSHai Li 
17ec31abf6SHai Li #include <linux/of_platform.h>
18a689554bSHai Li #include <linux/platform_device.h>
19a689554bSHai Li 
20a689554bSHai Li #include "drm_crtc.h"
21a689554bSHai Li #include "drm_mipi_dsi.h"
22a689554bSHai Li #include "drm_panel.h"
23a689554bSHai Li 
24a689554bSHai Li #include "msm_drv.h"
25a689554bSHai Li 
26a689554bSHai Li #define DSI_0	0
27a689554bSHai Li #define DSI_1	1
28a689554bSHai Li #define DSI_MAX	2
29a689554bSHai Li 
30dceac340SHai Li struct msm_dsi_phy_shared_timings;
31dceac340SHai Li 
329d32c498SHai Li enum msm_dsi_phy_type {
339d32c498SHai Li 	MSM_DSI_PHY_28NM_HPM,
349d32c498SHai Li 	MSM_DSI_PHY_28NM_LP,
35dcefc117SHai Li 	MSM_DSI_PHY_20NM,
36225380b3SArchit Taneja 	MSM_DSI_PHY_28NM_8960,
379d32c498SHai Li 	MSM_DSI_PHY_MAX
389d32c498SHai Li };
399d32c498SHai Li 
4057bf4338SHai Li enum msm_dsi_phy_usecase {
4157bf4338SHai Li 	MSM_DSI_PHY_STANDALONE,
4257bf4338SHai Li 	MSM_DSI_PHY_MASTER,
4357bf4338SHai Li 	MSM_DSI_PHY_SLAVE,
4457bf4338SHai Li };
4557bf4338SHai Li 
46ec31abf6SHai Li #define DSI_DEV_REGULATOR_MAX	8
476e0eb52eSArchit Taneja #define DSI_BUS_CLK_MAX		4
48ec31abf6SHai Li 
49ec31abf6SHai Li /* Regulators for DSI devices */
50ec31abf6SHai Li struct dsi_reg_entry {
51ec31abf6SHai Li 	char name[32];
52ec31abf6SHai Li 	int enable_load;
53ec31abf6SHai Li 	int disable_load;
54ec31abf6SHai Li };
55ec31abf6SHai Li 
56ec31abf6SHai Li struct dsi_reg_config {
57ec31abf6SHai Li 	int num;
58ec31abf6SHai Li 	struct dsi_reg_entry regs[DSI_DEV_REGULATOR_MAX];
59ec31abf6SHai Li };
60ec31abf6SHai Li 
61a689554bSHai Li struct msm_dsi {
62a689554bSHai Li 	struct drm_device *dev;
63a689554bSHai Li 	struct platform_device *pdev;
64a689554bSHai Li 
65c118e290SArchit Taneja 	/* connector managed by us when we're connected to a drm_panel */
66a689554bSHai Li 	struct drm_connector *connector;
67c118e290SArchit Taneja 	/* internal dsi bridge attached to MDP interface */
68a689554bSHai Li 	struct drm_bridge *bridge;
69a689554bSHai Li 
70a689554bSHai Li 	struct mipi_dsi_host *host;
71a689554bSHai Li 	struct msm_dsi_phy *phy;
72c118e290SArchit Taneja 
73c118e290SArchit Taneja 	/*
74c118e290SArchit Taneja 	 * panel/external_bridge connected to dsi bridge output, only one of the
75c118e290SArchit Taneja 	 * two can be valid at a time
76c118e290SArchit Taneja 	 */
77a689554bSHai Li 	struct drm_panel *panel;
78c118e290SArchit Taneja 	struct drm_bridge *external_bridge;
79a9ddac9cSArchit Taneja 	unsigned long device_flags;
809d32c498SHai Li 
81ec31abf6SHai Li 	struct device *phy_dev;
82a689554bSHai Li 	bool phy_enabled;
83a689554bSHai Li 
8497e00119SArchit Taneja 	/* the encoder we are hooked to (outside of dsi block) */
8597e00119SArchit Taneja 	struct drm_encoder *encoder;
86a689554bSHai Li 
87a689554bSHai Li 	int id;
88a689554bSHai Li };
89a689554bSHai Li 
90a689554bSHai Li /* dsi manager */
91a689554bSHai Li struct drm_bridge *msm_dsi_manager_bridge_init(u8 id);
92a689554bSHai Li void msm_dsi_manager_bridge_destroy(struct drm_bridge *bridge);
93a689554bSHai Li struct drm_connector *msm_dsi_manager_connector_init(u8 id);
94c118e290SArchit Taneja struct drm_connector *msm_dsi_manager_ext_bridge_init(u8 id);
95a689554bSHai Li int msm_dsi_manager_phy_enable(int id,
96a689554bSHai Li 		const unsigned long bit_rate, const unsigned long esc_rate,
97dceac340SHai Li 		struct msm_dsi_phy_shared_timings *shared_timing);
98a689554bSHai Li void msm_dsi_manager_phy_disable(int id);
99a689554bSHai Li int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg);
1004ff9d4cbSArchit Taneja bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len);
1019c9f6f8dSArchit Taneja void msm_dsi_manager_attach_dsi_device(int id, u32 device_flags);
102a689554bSHai Li int msm_dsi_manager_register(struct msm_dsi *msm_dsi);
103a689554bSHai Li void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi);
104a689554bSHai Li 
105a689554bSHai Li /* msm dsi */
1066f054ec5SArchit Taneja static inline bool msm_dsi_device_connected(struct msm_dsi *msm_dsi)
1076f054ec5SArchit Taneja {
108c118e290SArchit Taneja 	return msm_dsi->panel || msm_dsi->external_bridge;
1096f054ec5SArchit Taneja }
1106f054ec5SArchit Taneja 
111a689554bSHai Li struct drm_encoder *msm_dsi_get_encoder(struct msm_dsi *msm_dsi);
112a689554bSHai Li 
1139d32c498SHai Li /* dsi pll */
1149d32c498SHai Li struct msm_dsi_pll;
1159d32c498SHai Li #ifdef CONFIG_DRM_MSM_DSI_PLL
1169d32c498SHai Li struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev,
1179d32c498SHai Li 			enum msm_dsi_phy_type type, int dsi_id);
1189d32c498SHai Li void msm_dsi_pll_destroy(struct msm_dsi_pll *pll);
1199d32c498SHai Li int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll,
1209d32c498SHai Li 	struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
121328e1a63SHai Li void msm_dsi_pll_save_state(struct msm_dsi_pll *pll);
122328e1a63SHai Li int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll);
1239d32c498SHai Li #else
1249d32c498SHai Li static inline struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev,
1259d32c498SHai Li 			 enum msm_dsi_phy_type type, int id) {
1269d32c498SHai Li 	return ERR_PTR(-ENODEV);
1279d32c498SHai Li }
1289d32c498SHai Li static inline void msm_dsi_pll_destroy(struct msm_dsi_pll *pll)
1299d32c498SHai Li {
1309d32c498SHai Li }
1319d32c498SHai Li static inline int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll,
1329d32c498SHai Li 	struct clk **byte_clk_provider, struct clk **pixel_clk_provider)
1339d32c498SHai Li {
1349d32c498SHai Li 	return -ENODEV;
1359d32c498SHai Li }
136328e1a63SHai Li static inline void msm_dsi_pll_save_state(struct msm_dsi_pll *pll)
137328e1a63SHai Li {
138328e1a63SHai Li }
139328e1a63SHai Li static inline int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll)
140328e1a63SHai Li {
141328e1a63SHai Li 	return 0;
142328e1a63SHai Li }
1439d32c498SHai Li #endif
1449d32c498SHai Li 
145a689554bSHai Li /* dsi host */
146a689554bSHai Li int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host,
147a689554bSHai Li 					const struct mipi_dsi_msg *msg);
148a689554bSHai Li void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host,
149a689554bSHai Li 					const struct mipi_dsi_msg *msg);
150a689554bSHai Li int msm_dsi_host_cmd_tx(struct mipi_dsi_host *host,
151a689554bSHai Li 					const struct mipi_dsi_msg *msg);
152a689554bSHai Li int msm_dsi_host_cmd_rx(struct mipi_dsi_host *host,
153a689554bSHai Li 					const struct mipi_dsi_msg *msg);
154a689554bSHai Li void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host,
1554ff9d4cbSArchit Taneja 					u32 dma_base, u32 len);
156a689554bSHai Li int msm_dsi_host_enable(struct mipi_dsi_host *host);
157a689554bSHai Li int msm_dsi_host_disable(struct mipi_dsi_host *host);
158a689554bSHai Li int msm_dsi_host_power_on(struct mipi_dsi_host *host);
159a689554bSHai Li int msm_dsi_host_power_off(struct mipi_dsi_host *host);
160a689554bSHai Li int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host,
161a689554bSHai Li 					struct drm_display_mode *mode);
162a689554bSHai Li struct drm_panel *msm_dsi_host_get_panel(struct mipi_dsi_host *host,
163a689554bSHai Li 					unsigned long *panel_flags);
164c118e290SArchit Taneja struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host *host);
165a689554bSHai Li int msm_dsi_host_register(struct mipi_dsi_host *host, bool check_defer);
166a689554bSHai Li void msm_dsi_host_unregister(struct mipi_dsi_host *host);
1679d32c498SHai Li int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
1689d32c498SHai Li 			struct msm_dsi_pll *src_pll);
169*34d9545bSArchit Taneja void msm_dsi_host_reset_phy(struct mipi_dsi_host *host);
170a689554bSHai Li void msm_dsi_host_destroy(struct mipi_dsi_host *host);
171a689554bSHai Li int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,
172a689554bSHai Li 					struct drm_device *dev);
173a689554bSHai Li int msm_dsi_host_init(struct msm_dsi *msm_dsi);
174a689554bSHai Li 
175a689554bSHai Li /* dsi phy */
176a689554bSHai Li struct msm_dsi_phy;
177dceac340SHai Li struct msm_dsi_phy_shared_timings {
178dceac340SHai Li 	u32 clk_post;
179dceac340SHai Li 	u32 clk_pre;
180dceac340SHai Li 	bool clk_pre_inc_by_2;
181dceac340SHai Li };
182ec31abf6SHai Li void msm_dsi_phy_driver_register(void);
183ec31abf6SHai Li void msm_dsi_phy_driver_unregister(void);
18413351cd1SHai Li int msm_dsi_phy_enable(struct msm_dsi_phy *phy, int src_pll_id,
185a689554bSHai Li 	const unsigned long bit_rate, const unsigned long esc_rate);
18629e61690SHai Li void msm_dsi_phy_disable(struct msm_dsi_phy *phy);
187dceac340SHai Li void msm_dsi_phy_get_shared_timings(struct msm_dsi_phy *phy,
188dceac340SHai Li 			struct msm_dsi_phy_shared_timings *shared_timing);
1899d32c498SHai Li struct msm_dsi_pll *msm_dsi_phy_get_pll(struct msm_dsi_phy *phy);
19057bf4338SHai Li void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
19157bf4338SHai Li 			     enum msm_dsi_phy_usecase uc);
1929d32c498SHai Li 
193a689554bSHai Li #endif /* __DSI_CONNECTOR_H__ */
194a689554bSHai Li 
195