1a689554bSHai Li /* 2a689554bSHai Li * Copyright (c) 2015, The Linux Foundation. All rights reserved. 3a689554bSHai Li * 4a689554bSHai Li * This program is free software; you can redistribute it and/or modify 5a689554bSHai Li * it under the terms of the GNU General Public License version 2 and 6a689554bSHai Li * only version 2 as published by the Free Software Foundation. 7a689554bSHai Li * 8a689554bSHai Li * This program is distributed in the hope that it will be useful, 9a689554bSHai Li * but WITHOUT ANY WARRANTY; without even the implied warranty of 10a689554bSHai Li * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11a689554bSHai Li * GNU General Public License for more details. 12a689554bSHai Li */ 13a689554bSHai Li 14a689554bSHai Li #ifndef __DSI_CONNECTOR_H__ 15a689554bSHai Li #define __DSI_CONNECTOR_H__ 16a689554bSHai Li 17ec31abf6SHai Li #include <linux/of_platform.h> 18a689554bSHai Li #include <linux/platform_device.h> 19a689554bSHai Li 2078f27b1cSMasahiro Yamada #include <drm/drm_crtc.h> 2178f27b1cSMasahiro Yamada #include <drm/drm_mipi_dsi.h> 2278f27b1cSMasahiro Yamada #include <drm/drm_panel.h> 23a689554bSHai Li 24a689554bSHai Li #include "msm_drv.h" 25a689554bSHai Li 26a689554bSHai Li #define DSI_0 0 27a689554bSHai Li #define DSI_1 1 28a689554bSHai Li #define DSI_MAX 2 29a689554bSHai Li 30dceac340SHai Li struct msm_dsi_phy_shared_timings; 31b62aa70aSHai Li struct msm_dsi_phy_clk_request; 32dceac340SHai Li 339d32c498SHai Li enum msm_dsi_phy_type { 349d32c498SHai Li MSM_DSI_PHY_28NM_HPM, 359d32c498SHai Li MSM_DSI_PHY_28NM_LP, 36dcefc117SHai Li MSM_DSI_PHY_20NM, 37225380b3SArchit Taneja MSM_DSI_PHY_28NM_8960, 38f079f6d9SArchit Taneja MSM_DSI_PHY_14NM, 39973e02dbSArchit Taneja MSM_DSI_PHY_10NM, 409d32c498SHai Li MSM_DSI_PHY_MAX 419d32c498SHai Li }; 429d32c498SHai Li 4357bf4338SHai Li enum msm_dsi_phy_usecase { 4457bf4338SHai Li MSM_DSI_PHY_STANDALONE, 4557bf4338SHai Li MSM_DSI_PHY_MASTER, 4657bf4338SHai Li MSM_DSI_PHY_SLAVE, 4757bf4338SHai Li }; 4857bf4338SHai Li 49ec31abf6SHai Li #define DSI_DEV_REGULATOR_MAX 8 506e0eb52eSArchit Taneja #define DSI_BUS_CLK_MAX 4 51ec31abf6SHai Li 52ec31abf6SHai Li /* Regulators for DSI devices */ 53ec31abf6SHai Li struct dsi_reg_entry { 54ec31abf6SHai Li char name[32]; 55ec31abf6SHai Li int enable_load; 56ec31abf6SHai Li int disable_load; 57ec31abf6SHai Li }; 58ec31abf6SHai Li 59ec31abf6SHai Li struct dsi_reg_config { 60ec31abf6SHai Li int num; 61ec31abf6SHai Li struct dsi_reg_entry regs[DSI_DEV_REGULATOR_MAX]; 62ec31abf6SHai Li }; 63ec31abf6SHai Li 64a689554bSHai Li struct msm_dsi { 65a689554bSHai Li struct drm_device *dev; 66a689554bSHai Li struct platform_device *pdev; 67a689554bSHai Li 68c118e290SArchit Taneja /* connector managed by us when we're connected to a drm_panel */ 69a689554bSHai Li struct drm_connector *connector; 70c118e290SArchit Taneja /* internal dsi bridge attached to MDP interface */ 71a689554bSHai Li struct drm_bridge *bridge; 72a689554bSHai Li 73a689554bSHai Li struct mipi_dsi_host *host; 74a689554bSHai Li struct msm_dsi_phy *phy; 75c118e290SArchit Taneja 76c118e290SArchit Taneja /* 77c118e290SArchit Taneja * panel/external_bridge connected to dsi bridge output, only one of the 78c118e290SArchit Taneja * two can be valid at a time 79c118e290SArchit Taneja */ 80a689554bSHai Li struct drm_panel *panel; 81c118e290SArchit Taneja struct drm_bridge *external_bridge; 829d32c498SHai Li 83ec31abf6SHai Li struct device *phy_dev; 84a689554bSHai Li bool phy_enabled; 85a689554bSHai Li 8697e00119SArchit Taneja /* the encoder we are hooked to (outside of dsi block) */ 8797e00119SArchit Taneja struct drm_encoder *encoder; 88a689554bSHai Li 89a689554bSHai Li int id; 90a689554bSHai Li }; 91a689554bSHai Li 92a689554bSHai Li /* dsi manager */ 93a689554bSHai Li struct drm_bridge *msm_dsi_manager_bridge_init(u8 id); 94a689554bSHai Li void msm_dsi_manager_bridge_destroy(struct drm_bridge *bridge); 95a689554bSHai Li struct drm_connector *msm_dsi_manager_connector_init(u8 id); 96c118e290SArchit Taneja struct drm_connector *msm_dsi_manager_ext_bridge_init(u8 id); 97a689554bSHai Li int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg); 984ff9d4cbSArchit Taneja bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len); 99*03436e3eSSean Paul void msm_dsi_manager_setup_encoder(int id); 100a689554bSHai Li int msm_dsi_manager_register(struct msm_dsi *msm_dsi); 101a689554bSHai Li void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi); 1028b03ad30SChandan Uddaraju bool msm_dsi_manager_validate_current_config(u8 id); 103a689554bSHai Li 104a689554bSHai Li /* msm dsi */ 1056f054ec5SArchit Taneja static inline bool msm_dsi_device_connected(struct msm_dsi *msm_dsi) 1066f054ec5SArchit Taneja { 107c118e290SArchit Taneja return msm_dsi->panel || msm_dsi->external_bridge; 1086f054ec5SArchit Taneja } 1096f054ec5SArchit Taneja 110a689554bSHai Li struct drm_encoder *msm_dsi_get_encoder(struct msm_dsi *msm_dsi); 111a689554bSHai Li 1129d32c498SHai Li /* dsi pll */ 1139d32c498SHai Li struct msm_dsi_pll; 1149d32c498SHai Li #ifdef CONFIG_DRM_MSM_DSI_PLL 1159d32c498SHai Li struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev, 1169d32c498SHai Li enum msm_dsi_phy_type type, int dsi_id); 1179d32c498SHai Li void msm_dsi_pll_destroy(struct msm_dsi_pll *pll); 1189d32c498SHai Li int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll, 1199d32c498SHai Li struct clk **byte_clk_provider, struct clk **pixel_clk_provider); 120328e1a63SHai Li void msm_dsi_pll_save_state(struct msm_dsi_pll *pll); 121328e1a63SHai Li int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll); 122f079f6d9SArchit Taneja int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll, 123f079f6d9SArchit Taneja enum msm_dsi_phy_usecase uc); 1249d32c498SHai Li #else 1259d32c498SHai Li static inline struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev, 1269d32c498SHai Li enum msm_dsi_phy_type type, int id) { 1279d32c498SHai Li return ERR_PTR(-ENODEV); 1289d32c498SHai Li } 1299d32c498SHai Li static inline void msm_dsi_pll_destroy(struct msm_dsi_pll *pll) 1309d32c498SHai Li { 1319d32c498SHai Li } 1329d32c498SHai Li static inline int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll, 1339d32c498SHai Li struct clk **byte_clk_provider, struct clk **pixel_clk_provider) 1349d32c498SHai Li { 1359d32c498SHai Li return -ENODEV; 1369d32c498SHai Li } 137328e1a63SHai Li static inline void msm_dsi_pll_save_state(struct msm_dsi_pll *pll) 138328e1a63SHai Li { 139328e1a63SHai Li } 140328e1a63SHai Li static inline int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll) 141328e1a63SHai Li { 142328e1a63SHai Li return 0; 143328e1a63SHai Li } 144f079f6d9SArchit Taneja static inline int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll, 145f079f6d9SArchit Taneja enum msm_dsi_phy_usecase uc) 146f079f6d9SArchit Taneja { 147f079f6d9SArchit Taneja return -ENODEV; 148f079f6d9SArchit Taneja } 1499d32c498SHai Li #endif 1509d32c498SHai Li 151a689554bSHai Li /* dsi host */ 152e18177ccSSibi Sankar struct msm_dsi_host; 153a689554bSHai Li int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host, 154a689554bSHai Li const struct mipi_dsi_msg *msg); 155a689554bSHai Li void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host, 156a689554bSHai Li const struct mipi_dsi_msg *msg); 157a689554bSHai Li int msm_dsi_host_cmd_tx(struct mipi_dsi_host *host, 158a689554bSHai Li const struct mipi_dsi_msg *msg); 159a689554bSHai Li int msm_dsi_host_cmd_rx(struct mipi_dsi_host *host, 160a689554bSHai Li const struct mipi_dsi_msg *msg); 161a689554bSHai Li void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host, 1624ff9d4cbSArchit Taneja u32 dma_base, u32 len); 163a689554bSHai Li int msm_dsi_host_enable(struct mipi_dsi_host *host); 164a689554bSHai Li int msm_dsi_host_disable(struct mipi_dsi_host *host); 165b62aa70aSHai Li int msm_dsi_host_power_on(struct mipi_dsi_host *host, 166ed9976a0SChandan Uddaraju struct msm_dsi_phy_shared_timings *phy_shared_timings, 167ed9976a0SChandan Uddaraju bool is_dual_dsi); 168a689554bSHai Li int msm_dsi_host_power_off(struct mipi_dsi_host *host); 169a689554bSHai Li int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, 17063f8f3baSLaurent Pinchart const struct drm_display_mode *mode); 171e3a91f89SSean Paul struct drm_panel *msm_dsi_host_get_panel(struct mipi_dsi_host *host); 172e3a91f89SSean Paul unsigned long msm_dsi_host_get_mode_flags(struct mipi_dsi_host *host); 173c118e290SArchit Taneja struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host *host); 174a689554bSHai Li int msm_dsi_host_register(struct mipi_dsi_host *host, bool check_defer); 175a689554bSHai Li void msm_dsi_host_unregister(struct mipi_dsi_host *host); 1769d32c498SHai Li int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host, 1779d32c498SHai Li struct msm_dsi_pll *src_pll); 17834d9545bSArchit Taneja void msm_dsi_host_reset_phy(struct mipi_dsi_host *host); 179b62aa70aSHai Li void msm_dsi_host_get_phy_clk_req(struct mipi_dsi_host *host, 180ed9976a0SChandan Uddaraju struct msm_dsi_phy_clk_request *clk_req, 181ed9976a0SChandan Uddaraju bool is_dual_dsi); 182a689554bSHai Li void msm_dsi_host_destroy(struct mipi_dsi_host *host); 183a689554bSHai Li int msm_dsi_host_modeset_init(struct mipi_dsi_host *host, 184a689554bSHai Li struct drm_device *dev); 185a689554bSHai Li int msm_dsi_host_init(struct msm_dsi *msm_dsi); 186f54ca1a0SArchit Taneja int msm_dsi_runtime_suspend(struct device *dev); 187f54ca1a0SArchit Taneja int msm_dsi_runtime_resume(struct device *dev); 188c4d8cfe5SSibi Sankar int dsi_link_clk_enable_6g(struct msm_dsi_host *msm_host); 189c4d8cfe5SSibi Sankar int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host); 190c4d8cfe5SSibi Sankar void dsi_link_clk_disable_6g(struct msm_dsi_host *msm_host); 191c4d8cfe5SSibi Sankar void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host); 192c4d8cfe5SSibi Sankar int dsi_tx_buf_alloc_6g(struct msm_dsi_host *msm_host, int size); 193c4d8cfe5SSibi Sankar int dsi_tx_buf_alloc_v2(struct msm_dsi_host *msm_host, int size); 194c4d8cfe5SSibi Sankar void *dsi_tx_buf_get_6g(struct msm_dsi_host *msm_host); 195c4d8cfe5SSibi Sankar void *dsi_tx_buf_get_v2(struct msm_dsi_host *msm_host); 196c4d8cfe5SSibi Sankar void dsi_tx_buf_put_6g(struct msm_dsi_host *msm_host); 197c4d8cfe5SSibi Sankar int dsi_dma_base_get_6g(struct msm_dsi_host *msm_host, uint64_t *iova); 198c4d8cfe5SSibi Sankar int dsi_dma_base_get_v2(struct msm_dsi_host *msm_host, uint64_t *iova); 199c4d8cfe5SSibi Sankar int dsi_clk_init_v2(struct msm_dsi_host *msm_host); 200c4d8cfe5SSibi Sankar int dsi_clk_init_6g_v2(struct msm_dsi_host *msm_host); 201ed9976a0SChandan Uddaraju int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_dual_dsi); 202ed9976a0SChandan Uddaraju int dsi_calc_clk_rate_6g(struct msm_dsi_host *msm_host, bool is_dual_dsi); 203a689554bSHai Li 204a689554bSHai Li /* dsi phy */ 205a689554bSHai Li struct msm_dsi_phy; 206dceac340SHai Li struct msm_dsi_phy_shared_timings { 207dceac340SHai Li u32 clk_post; 208dceac340SHai Li u32 clk_pre; 209dceac340SHai Li bool clk_pre_inc_by_2; 210dceac340SHai Li }; 211b62aa70aSHai Li 212b62aa70aSHai Li struct msm_dsi_phy_clk_request { 213b62aa70aSHai Li unsigned long bitclk_rate; 214b62aa70aSHai Li unsigned long escclk_rate; 215b62aa70aSHai Li }; 216b62aa70aSHai Li 217ec31abf6SHai Li void msm_dsi_phy_driver_register(void); 218ec31abf6SHai Li void msm_dsi_phy_driver_unregister(void); 21913351cd1SHai Li int msm_dsi_phy_enable(struct msm_dsi_phy *phy, int src_pll_id, 220b62aa70aSHai Li struct msm_dsi_phy_clk_request *clk_req); 22129e61690SHai Li void msm_dsi_phy_disable(struct msm_dsi_phy *phy); 222dceac340SHai Li void msm_dsi_phy_get_shared_timings(struct msm_dsi_phy *phy, 223dceac340SHai Li struct msm_dsi_phy_shared_timings *shared_timing); 2249d32c498SHai Li struct msm_dsi_pll *msm_dsi_phy_get_pll(struct msm_dsi_phy *phy); 22557bf4338SHai Li void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy, 22657bf4338SHai Li enum msm_dsi_phy_usecase uc); 2279d32c498SHai Li 228a689554bSHai Li #endif /* __DSI_CONNECTOR_H__ */ 229a689554bSHai Li 230