xref: /linux/drivers/gpu/drm/msm/dp/dp_panel.h (revision da5b2ad1c2f18834cb1ce429e2e5a5cf5cbdf21b)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef _DP_PANEL_H_
7 #define _DP_PANEL_H_
8 
9 #include <drm/msm_drm.h>
10 
11 #include "dp_aux.h"
12 #include "dp_link.h"
13 
14 struct edid;
15 
16 struct dp_display_mode {
17 	struct drm_display_mode drm_mode;
18 	u32 bpp;
19 	u32 h_active_low;
20 	u32 v_active_low;
21 	bool out_fmt_is_yuv_420;
22 };
23 
24 struct dp_panel_in {
25 	struct device *dev;
26 	struct drm_dp_aux *aux;
27 	struct dp_link *link;
28 	struct dp_catalog *catalog;
29 };
30 
31 struct dp_panel_psr {
32 	u8 version;
33 	u8 capabilities;
34 };
35 
36 struct dp_panel {
37 	/* dpcd raw data */
38 	u8 dpcd[DP_RECEIVER_CAP_SIZE];
39 	u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
40 
41 	struct dp_link_info link_info;
42 	const struct drm_edid *drm_edid;
43 	struct drm_connector *connector;
44 	struct dp_display_mode dp_mode;
45 	struct dp_panel_psr psr_cap;
46 	bool video_test;
47 	bool vsc_sdp_supported;
48 
49 	u32 max_dp_lanes;
50 	u32 max_dp_link_rate;
51 
52 	u32 max_bw_code;
53 };
54 
55 int dp_panel_init_panel_info(struct dp_panel *dp_panel);
56 int dp_panel_deinit(struct dp_panel *dp_panel);
57 int dp_panel_timing_cfg(struct dp_panel *dp_panel);
58 void dp_panel_dump_regs(struct dp_panel *dp_panel);
59 int dp_panel_read_sink_caps(struct dp_panel *dp_panel,
60 		struct drm_connector *connector);
61 u32 dp_panel_get_mode_bpp(struct dp_panel *dp_panel, u32 mode_max_bpp,
62 			u32 mode_pclk_khz);
63 int dp_panel_get_modes(struct dp_panel *dp_panel,
64 		struct drm_connector *connector);
65 void dp_panel_handle_sink_request(struct dp_panel *dp_panel);
66 void dp_panel_tpg_config(struct dp_panel *dp_panel, bool enable);
67 
68 /**
69  * is_link_rate_valid() - validates the link rate
70  * @lane_rate: link rate requested by the sink
71  *
72  * Returns true if the requested link rate is supported.
73  */
74 static inline bool is_link_rate_valid(u32 bw_code)
75 {
76 	return (bw_code == DP_LINK_BW_1_62 ||
77 		bw_code == DP_LINK_BW_2_7 ||
78 		bw_code == DP_LINK_BW_5_4 ||
79 		bw_code == DP_LINK_BW_8_1);
80 }
81 
82 /**
83  * dp_link_is_lane_count_valid() - validates the lane count
84  * @lane_count: lane count requested by the sink
85  *
86  * Returns true if the requested lane count is supported.
87  */
88 static inline bool is_lane_count_valid(u32 lane_count)
89 {
90 	return (lane_count == 1 ||
91 		lane_count == 2 ||
92 		lane_count == 4);
93 }
94 
95 struct dp_panel *dp_panel_get(struct dp_panel_in *in);
96 void dp_panel_put(struct dp_panel *dp_panel);
97 #endif /* _DP_PANEL_H_ */
98