xref: /linux/drivers/gpu/drm/msm/dp/dp_panel.h (revision 9e56ff53b4115875667760445b028357848b4748)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef _DP_PANEL_H_
7 #define _DP_PANEL_H_
8 
9 #include <drm/msm_drm.h>
10 
11 #include "dp_aux.h"
12 #include "dp_link.h"
13 
14 struct edid;
15 
16 struct dp_display_mode {
17 	struct drm_display_mode drm_mode;
18 	u32 capabilities;
19 	u32 bpp;
20 	u32 h_active_low;
21 	u32 v_active_low;
22 };
23 
24 struct dp_panel_in {
25 	struct device *dev;
26 	struct drm_dp_aux *aux;
27 	struct dp_link *link;
28 	struct dp_catalog *catalog;
29 };
30 
31 struct dp_panel_psr {
32 	u8 version;
33 	u8 capabilities;
34 };
35 
36 struct dp_panel {
37 	/* dpcd raw data */
38 	u8 dpcd[DP_RECEIVER_CAP_SIZE];
39 	u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
40 
41 	struct dp_link_info link_info;
42 	struct drm_dp_desc desc;
43 	struct edid *edid;
44 	struct drm_connector *connector;
45 	struct dp_display_mode dp_mode;
46 	struct dp_panel_psr psr_cap;
47 	bool video_test;
48 
49 	u32 vic;
50 	u32 max_dp_lanes;
51 	u32 max_dp_link_rate;
52 
53 	u32 max_bw_code;
54 };
55 
56 int dp_panel_init_panel_info(struct dp_panel *dp_panel);
57 int dp_panel_deinit(struct dp_panel *dp_panel);
58 int dp_panel_timing_cfg(struct dp_panel *dp_panel);
59 void dp_panel_dump_regs(struct dp_panel *dp_panel);
60 int dp_panel_read_sink_caps(struct dp_panel *dp_panel,
61 		struct drm_connector *connector);
62 u32 dp_panel_get_mode_bpp(struct dp_panel *dp_panel, u32 mode_max_bpp,
63 			u32 mode_pclk_khz);
64 int dp_panel_get_modes(struct dp_panel *dp_panel,
65 		struct drm_connector *connector);
66 void dp_panel_handle_sink_request(struct dp_panel *dp_panel);
67 void dp_panel_tpg_config(struct dp_panel *dp_panel, bool enable);
68 
69 /**
70  * is_link_rate_valid() - validates the link rate
71  * @lane_rate: link rate requested by the sink
72  *
73  * Returns true if the requested link rate is supported.
74  */
75 static inline bool is_link_rate_valid(u32 bw_code)
76 {
77 	return (bw_code == DP_LINK_BW_1_62 ||
78 		bw_code == DP_LINK_BW_2_7 ||
79 		bw_code == DP_LINK_BW_5_4 ||
80 		bw_code == DP_LINK_BW_8_1);
81 }
82 
83 /**
84  * dp_link_is_lane_count_valid() - validates the lane count
85  * @lane_count: lane count requested by the sink
86  *
87  * Returns true if the requested lane count is supported.
88  */
89 static inline bool is_lane_count_valid(u32 lane_count)
90 {
91 	return (lane_count == 1 ||
92 		lane_count == 2 ||
93 		lane_count == 4);
94 }
95 
96 struct dp_panel *dp_panel_get(struct dp_panel_in *in);
97 void dp_panel_put(struct dp_panel *dp_panel);
98 #endif /* _DP_PANEL_H_ */
99