1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef _DP_PANEL_H_ 7 #define _DP_PANEL_H_ 8 9 #include <drm/msm_drm.h> 10 11 #include "dp_aux.h" 12 #include "dp_link.h" 13 14 struct edid; 15 16 struct msm_dp_display_mode { 17 struct drm_display_mode drm_mode; 18 u32 bpp; 19 u32 h_active_low; 20 u32 v_active_low; 21 bool out_fmt_is_yuv_420; 22 }; 23 24 struct msm_dp_panel_in { 25 struct device *dev; 26 struct drm_dp_aux *aux; 27 struct msm_dp_link *link; 28 struct msm_dp_catalog *catalog; 29 }; 30 31 struct msm_dp_panel_psr { 32 u8 version; 33 u8 capabilities; 34 }; 35 36 struct msm_dp_panel { 37 /* dpcd raw data */ 38 u8 dpcd[DP_RECEIVER_CAP_SIZE]; 39 u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]; 40 41 struct msm_dp_link_info link_info; 42 const struct drm_edid *drm_edid; 43 struct drm_connector *connector; 44 struct msm_dp_display_mode msm_dp_mode; 45 struct msm_dp_panel_psr psr_cap; 46 bool video_test; 47 bool vsc_sdp_supported; 48 49 u32 max_dp_lanes; 50 u32 max_dp_link_rate; 51 52 u32 max_bw_code; 53 }; 54 55 int msm_dp_panel_init_panel_info(struct msm_dp_panel *msm_dp_panel); 56 int msm_dp_panel_deinit(struct msm_dp_panel *msm_dp_panel); 57 int msm_dp_panel_timing_cfg(struct msm_dp_panel *msm_dp_panel); 58 void msm_dp_panel_dump_regs(struct msm_dp_panel *msm_dp_panel); 59 int msm_dp_panel_read_sink_caps(struct msm_dp_panel *msm_dp_panel, 60 struct drm_connector *connector); 61 u32 msm_dp_panel_get_mode_bpp(struct msm_dp_panel *msm_dp_panel, u32 mode_max_bpp, 62 u32 mode_pclk_khz); 63 int msm_dp_panel_get_modes(struct msm_dp_panel *msm_dp_panel, 64 struct drm_connector *connector); 65 void msm_dp_panel_handle_sink_request(struct msm_dp_panel *msm_dp_panel); 66 void msm_dp_panel_tpg_config(struct msm_dp_panel *msm_dp_panel, bool enable); 67 68 /** 69 * is_link_rate_valid() - validates the link rate 70 * @lane_rate: link rate requested by the sink 71 * 72 * Returns true if the requested link rate is supported. 73 */ 74 static inline bool is_link_rate_valid(u32 bw_code) 75 { 76 return (bw_code == DP_LINK_BW_1_62 || 77 bw_code == DP_LINK_BW_2_7 || 78 bw_code == DP_LINK_BW_5_4 || 79 bw_code == DP_LINK_BW_8_1); 80 } 81 82 /** 83 * msm_dp_link_is_lane_count_valid() - validates the lane count 84 * @lane_count: lane count requested by the sink 85 * 86 * Returns true if the requested lane count is supported. 87 */ 88 static inline bool is_lane_count_valid(u32 lane_count) 89 { 90 return (lane_count == 1 || 91 lane_count == 2 || 92 lane_count == 4); 93 } 94 95 struct msm_dp_panel *msm_dp_panel_get(struct msm_dp_panel_in *in); 96 void msm_dp_panel_put(struct msm_dp_panel *msm_dp_panel); 97 #endif /* _DP_PANEL_H_ */ 98