1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. 4 */ 5 6 #include "dp_panel.h" 7 #include "dp_utils.h" 8 9 #include <drm/drm_connector.h> 10 #include <drm/drm_edid.h> 11 #include <drm/drm_of.h> 12 #include <drm/drm_print.h> 13 14 #define DP_MAX_NUM_DP_LANES 4 15 #define DP_LINK_RATE_HBR2 540000 /* kbytes */ 16 17 struct msm_dp_panel_private { 18 struct device *dev; 19 struct drm_device *drm_dev; 20 struct msm_dp_panel msm_dp_panel; 21 struct drm_dp_aux *aux; 22 struct msm_dp_link *link; 23 struct msm_dp_catalog *catalog; 24 bool panel_on; 25 }; 26 27 static void msm_dp_panel_read_psr_cap(struct msm_dp_panel_private *panel) 28 { 29 ssize_t rlen; 30 struct msm_dp_panel *msm_dp_panel; 31 32 msm_dp_panel = &panel->msm_dp_panel; 33 34 /* edp sink */ 35 if (msm_dp_panel->dpcd[DP_EDP_CONFIGURATION_CAP]) { 36 rlen = drm_dp_dpcd_read(panel->aux, DP_PSR_SUPPORT, 37 &msm_dp_panel->psr_cap, sizeof(msm_dp_panel->psr_cap)); 38 if (rlen == sizeof(msm_dp_panel->psr_cap)) { 39 drm_dbg_dp(panel->drm_dev, 40 "psr version: 0x%x, psr_cap: 0x%x\n", 41 msm_dp_panel->psr_cap.version, 42 msm_dp_panel->psr_cap.capabilities); 43 } else 44 DRM_ERROR("failed to read psr info, rlen=%zd\n", rlen); 45 } 46 } 47 48 static int msm_dp_panel_read_dpcd(struct msm_dp_panel *msm_dp_panel) 49 { 50 int rc, max_lttpr_lanes, max_lttpr_rate; 51 struct msm_dp_panel_private *panel; 52 struct msm_dp_link_info *link_info; 53 u8 *dpcd, major, minor; 54 55 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); 56 dpcd = msm_dp_panel->dpcd; 57 rc = drm_dp_read_dpcd_caps(panel->aux, dpcd); 58 if (rc) 59 return rc; 60 61 msm_dp_panel->vsc_sdp_supported = drm_dp_vsc_sdp_supported(panel->aux, dpcd); 62 link_info = &msm_dp_panel->link_info; 63 link_info->revision = dpcd[DP_DPCD_REV]; 64 major = (link_info->revision >> 4) & 0x0f; 65 minor = link_info->revision & 0x0f; 66 67 link_info->rate = drm_dp_max_link_rate(dpcd); 68 link_info->num_lanes = drm_dp_max_lane_count(dpcd); 69 70 /* Limit data lanes from data-lanes of endpoint property of dtsi */ 71 if (link_info->num_lanes > msm_dp_panel->max_dp_lanes) 72 link_info->num_lanes = msm_dp_panel->max_dp_lanes; 73 74 /* Limit link rate from link-frequencies of endpoint property of dtsi */ 75 if (link_info->rate > msm_dp_panel->max_dp_link_rate) 76 link_info->rate = msm_dp_panel->max_dp_link_rate; 77 78 /* Limit data lanes from LTTPR capabilities, if any */ 79 max_lttpr_lanes = drm_dp_lttpr_max_lane_count(panel->link->lttpr_common_caps); 80 if (max_lttpr_lanes && max_lttpr_lanes < link_info->num_lanes) 81 link_info->num_lanes = max_lttpr_lanes; 82 83 /* Limit link rate from LTTPR capabilities, if any */ 84 max_lttpr_rate = drm_dp_lttpr_max_link_rate(panel->link->lttpr_common_caps); 85 if (max_lttpr_rate && max_lttpr_rate < link_info->rate) 86 link_info->rate = max_lttpr_rate; 87 88 drm_dbg_dp(panel->drm_dev, "version: %d.%d\n", major, minor); 89 drm_dbg_dp(panel->drm_dev, "link_rate=%d\n", link_info->rate); 90 drm_dbg_dp(panel->drm_dev, "lane_count=%d\n", link_info->num_lanes); 91 92 if (drm_dp_enhanced_frame_cap(dpcd)) 93 link_info->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING; 94 95 msm_dp_panel_read_psr_cap(panel); 96 97 return rc; 98 } 99 100 static u32 msm_dp_panel_get_supported_bpp(struct msm_dp_panel *msm_dp_panel, 101 u32 mode_edid_bpp, u32 mode_pclk_khz) 102 { 103 const struct msm_dp_link_info *link_info; 104 const u32 max_supported_bpp = 30, min_supported_bpp = 18; 105 u32 bpp, data_rate_khz; 106 107 bpp = min(mode_edid_bpp, max_supported_bpp); 108 109 link_info = &msm_dp_panel->link_info; 110 data_rate_khz = link_info->num_lanes * link_info->rate * 8; 111 112 do { 113 if (mode_pclk_khz * bpp <= data_rate_khz) 114 return bpp; 115 bpp -= 6; 116 } while (bpp > min_supported_bpp); 117 118 return min_supported_bpp; 119 } 120 121 int msm_dp_panel_read_sink_caps(struct msm_dp_panel *msm_dp_panel, 122 struct drm_connector *connector) 123 { 124 int rc, bw_code; 125 int count; 126 struct msm_dp_panel_private *panel; 127 128 if (!msm_dp_panel || !connector) { 129 DRM_ERROR("invalid input\n"); 130 return -EINVAL; 131 } 132 133 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); 134 135 drm_dbg_dp(panel->drm_dev, "max_lanes=%d max_link_rate=%d\n", 136 msm_dp_panel->max_dp_lanes, msm_dp_panel->max_dp_link_rate); 137 138 rc = msm_dp_panel_read_dpcd(msm_dp_panel); 139 if (rc) { 140 DRM_ERROR("read dpcd failed %d\n", rc); 141 return rc; 142 } 143 144 bw_code = drm_dp_link_rate_to_bw_code(msm_dp_panel->link_info.rate); 145 if (!is_link_rate_valid(bw_code) || 146 !is_lane_count_valid(msm_dp_panel->link_info.num_lanes) || 147 (bw_code > msm_dp_panel->max_bw_code)) { 148 DRM_ERROR("Illegal link rate=%d lane=%d\n", msm_dp_panel->link_info.rate, 149 msm_dp_panel->link_info.num_lanes); 150 return -EINVAL; 151 } 152 153 if (drm_dp_is_branch(msm_dp_panel->dpcd)) { 154 count = drm_dp_read_sink_count(panel->aux); 155 if (!count) { 156 panel->link->sink_count = 0; 157 return -ENOTCONN; 158 } 159 } 160 161 rc = drm_dp_read_downstream_info(panel->aux, msm_dp_panel->dpcd, 162 msm_dp_panel->downstream_ports); 163 if (rc) 164 return rc; 165 166 drm_edid_free(msm_dp_panel->drm_edid); 167 168 msm_dp_panel->drm_edid = drm_edid_read_ddc(connector, &panel->aux->ddc); 169 170 drm_edid_connector_update(connector, msm_dp_panel->drm_edid); 171 172 if (!msm_dp_panel->drm_edid) { 173 DRM_ERROR("panel edid read failed\n"); 174 /* check edid read fail is due to unplug */ 175 if (!msm_dp_catalog_link_is_connected(panel->catalog)) { 176 rc = -ETIMEDOUT; 177 goto end; 178 } 179 } 180 181 end: 182 return rc; 183 } 184 185 u32 msm_dp_panel_get_mode_bpp(struct msm_dp_panel *msm_dp_panel, 186 u32 mode_edid_bpp, u32 mode_pclk_khz) 187 { 188 struct msm_dp_panel_private *panel; 189 u32 bpp; 190 191 if (!msm_dp_panel || !mode_edid_bpp || !mode_pclk_khz) { 192 DRM_ERROR("invalid input\n"); 193 return 0; 194 } 195 196 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); 197 198 if (msm_dp_panel->video_test) 199 bpp = msm_dp_link_bit_depth_to_bpp( 200 panel->link->test_video.test_bit_depth); 201 else 202 bpp = msm_dp_panel_get_supported_bpp(msm_dp_panel, mode_edid_bpp, 203 mode_pclk_khz); 204 205 return bpp; 206 } 207 208 int msm_dp_panel_get_modes(struct msm_dp_panel *msm_dp_panel, 209 struct drm_connector *connector) 210 { 211 if (!msm_dp_panel) { 212 DRM_ERROR("invalid input\n"); 213 return -EINVAL; 214 } 215 216 if (msm_dp_panel->drm_edid) 217 return drm_edid_connector_add_modes(connector); 218 219 return 0; 220 } 221 222 static u8 msm_dp_panel_get_edid_checksum(const struct edid *edid) 223 { 224 edid += edid->extensions; 225 226 return edid->checksum; 227 } 228 229 void msm_dp_panel_handle_sink_request(struct msm_dp_panel *msm_dp_panel) 230 { 231 struct msm_dp_panel_private *panel; 232 233 if (!msm_dp_panel) { 234 DRM_ERROR("invalid input\n"); 235 return; 236 } 237 238 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); 239 240 if (panel->link->sink_request & DP_TEST_LINK_EDID_READ) { 241 /* FIXME: get rid of drm_edid_raw() */ 242 const struct edid *edid = drm_edid_raw(msm_dp_panel->drm_edid); 243 u8 checksum; 244 245 if (edid) 246 checksum = msm_dp_panel_get_edid_checksum(edid); 247 else 248 checksum = msm_dp_panel->connector->real_edid_checksum; 249 250 msm_dp_link_send_edid_checksum(panel->link, checksum); 251 msm_dp_link_send_test_response(panel->link); 252 } 253 } 254 255 void msm_dp_panel_tpg_config(struct msm_dp_panel *msm_dp_panel, bool enable) 256 { 257 struct msm_dp_catalog *catalog; 258 struct msm_dp_panel_private *panel; 259 260 if (!msm_dp_panel) { 261 DRM_ERROR("invalid input\n"); 262 return; 263 } 264 265 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); 266 catalog = panel->catalog; 267 268 if (!panel->panel_on) { 269 drm_dbg_dp(panel->drm_dev, 270 "DP panel not enabled, handle TPG on next on\n"); 271 return; 272 } 273 274 if (!enable) { 275 msm_dp_catalog_panel_tpg_disable(catalog); 276 return; 277 } 278 279 drm_dbg_dp(panel->drm_dev, "calling catalog tpg_enable\n"); 280 msm_dp_catalog_panel_tpg_enable(catalog, &panel->msm_dp_panel.msm_dp_mode.drm_mode); 281 } 282 283 static int msm_dp_panel_setup_vsc_sdp_yuv_420(struct msm_dp_panel *msm_dp_panel) 284 { 285 struct msm_dp_catalog *catalog; 286 struct msm_dp_panel_private *panel; 287 struct msm_dp_display_mode *msm_dp_mode; 288 struct drm_dp_vsc_sdp vsc_sdp_data; 289 struct dp_sdp vsc_sdp; 290 ssize_t len; 291 292 if (!msm_dp_panel) { 293 DRM_ERROR("invalid input\n"); 294 return -EINVAL; 295 } 296 297 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); 298 catalog = panel->catalog; 299 msm_dp_mode = &msm_dp_panel->msm_dp_mode; 300 301 memset(&vsc_sdp_data, 0, sizeof(vsc_sdp_data)); 302 303 /* VSC SDP header as per table 2-118 of DP 1.4 specification */ 304 vsc_sdp_data.sdp_type = DP_SDP_VSC; 305 vsc_sdp_data.revision = 0x05; 306 vsc_sdp_data.length = 0x13; 307 308 /* VSC SDP Payload for DB16 */ 309 vsc_sdp_data.pixelformat = DP_PIXELFORMAT_YUV420; 310 vsc_sdp_data.colorimetry = DP_COLORIMETRY_DEFAULT; 311 312 /* VSC SDP Payload for DB17 */ 313 vsc_sdp_data.bpc = msm_dp_mode->bpp / 3; 314 vsc_sdp_data.dynamic_range = DP_DYNAMIC_RANGE_CTA; 315 316 /* VSC SDP Payload for DB18 */ 317 vsc_sdp_data.content_type = DP_CONTENT_TYPE_GRAPHICS; 318 319 len = drm_dp_vsc_sdp_pack(&vsc_sdp_data, &vsc_sdp); 320 if (len < 0) { 321 DRM_ERROR("unable to pack vsc sdp\n"); 322 return len; 323 } 324 325 msm_dp_catalog_panel_enable_vsc_sdp(catalog, &vsc_sdp); 326 327 return 0; 328 } 329 330 int msm_dp_panel_timing_cfg(struct msm_dp_panel *msm_dp_panel) 331 { 332 u32 data, total_ver, total_hor; 333 struct msm_dp_catalog *catalog; 334 struct msm_dp_panel_private *panel; 335 struct drm_display_mode *drm_mode; 336 u32 width_blanking; 337 u32 sync_start; 338 u32 msm_dp_active; 339 u32 total; 340 341 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); 342 catalog = panel->catalog; 343 drm_mode = &panel->msm_dp_panel.msm_dp_mode.drm_mode; 344 345 drm_dbg_dp(panel->drm_dev, "width=%d hporch= %d %d %d\n", 346 drm_mode->hdisplay, drm_mode->htotal - drm_mode->hsync_end, 347 drm_mode->hsync_start - drm_mode->hdisplay, 348 drm_mode->hsync_end - drm_mode->hsync_start); 349 350 drm_dbg_dp(panel->drm_dev, "height=%d vporch= %d %d %d\n", 351 drm_mode->vdisplay, drm_mode->vtotal - drm_mode->vsync_end, 352 drm_mode->vsync_start - drm_mode->vdisplay, 353 drm_mode->vsync_end - drm_mode->vsync_start); 354 355 total_hor = drm_mode->htotal; 356 357 total_ver = drm_mode->vtotal; 358 359 data = total_ver; 360 data <<= 16; 361 data |= total_hor; 362 363 total = data; 364 365 data = (drm_mode->vtotal - drm_mode->vsync_start); 366 data <<= 16; 367 data |= (drm_mode->htotal - drm_mode->hsync_start); 368 369 sync_start = data; 370 371 data = drm_mode->vsync_end - drm_mode->vsync_start; 372 data <<= 16; 373 data |= (panel->msm_dp_panel.msm_dp_mode.v_active_low << 31); 374 data |= drm_mode->hsync_end - drm_mode->hsync_start; 375 data |= (panel->msm_dp_panel.msm_dp_mode.h_active_low << 15); 376 377 width_blanking = data; 378 379 data = drm_mode->vdisplay; 380 data <<= 16; 381 data |= drm_mode->hdisplay; 382 383 msm_dp_active = data; 384 385 msm_dp_catalog_panel_timing_cfg(catalog, total, sync_start, width_blanking, msm_dp_active); 386 387 if (msm_dp_panel->msm_dp_mode.out_fmt_is_yuv_420) 388 msm_dp_panel_setup_vsc_sdp_yuv_420(msm_dp_panel); 389 390 panel->panel_on = true; 391 392 return 0; 393 } 394 395 int msm_dp_panel_init_panel_info(struct msm_dp_panel *msm_dp_panel) 396 { 397 struct drm_display_mode *drm_mode; 398 struct msm_dp_panel_private *panel; 399 400 drm_mode = &msm_dp_panel->msm_dp_mode.drm_mode; 401 402 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); 403 404 /* 405 * print resolution info as this is a result 406 * of user initiated action of cable connection 407 */ 408 drm_dbg_dp(panel->drm_dev, "SET NEW RESOLUTION:\n"); 409 drm_dbg_dp(panel->drm_dev, "%dx%d@%dfps\n", 410 drm_mode->hdisplay, drm_mode->vdisplay, drm_mode_vrefresh(drm_mode)); 411 drm_dbg_dp(panel->drm_dev, 412 "h_porches(back|front|width) = (%d|%d|%d)\n", 413 drm_mode->htotal - drm_mode->hsync_end, 414 drm_mode->hsync_start - drm_mode->hdisplay, 415 drm_mode->hsync_end - drm_mode->hsync_start); 416 drm_dbg_dp(panel->drm_dev, 417 "v_porches(back|front|width) = (%d|%d|%d)\n", 418 drm_mode->vtotal - drm_mode->vsync_end, 419 drm_mode->vsync_start - drm_mode->vdisplay, 420 drm_mode->vsync_end - drm_mode->vsync_start); 421 drm_dbg_dp(panel->drm_dev, "pixel clock (KHz)=(%d)\n", 422 drm_mode->clock); 423 drm_dbg_dp(panel->drm_dev, "bpp = %d\n", msm_dp_panel->msm_dp_mode.bpp); 424 425 msm_dp_panel->msm_dp_mode.bpp = msm_dp_panel_get_mode_bpp(msm_dp_panel, msm_dp_panel->msm_dp_mode.bpp, 426 msm_dp_panel->msm_dp_mode.drm_mode.clock); 427 428 drm_dbg_dp(panel->drm_dev, "updated bpp = %d\n", 429 msm_dp_panel->msm_dp_mode.bpp); 430 431 return 0; 432 } 433 434 static u32 msm_dp_panel_link_frequencies(struct device_node *of_node) 435 { 436 struct device_node *endpoint; 437 u64 frequency = 0; 438 int cnt; 439 440 endpoint = of_graph_get_endpoint_by_regs(of_node, 1, 0); /* port@1 */ 441 if (!endpoint) 442 return 0; 443 444 cnt = of_property_count_u64_elems(endpoint, "link-frequencies"); 445 446 if (cnt > 0) 447 of_property_read_u64_index(endpoint, "link-frequencies", 448 cnt - 1, &frequency); 449 of_node_put(endpoint); 450 451 do_div(frequency, 452 10 * /* from symbol rate to link rate */ 453 1000); /* kbytes */ 454 455 return frequency; 456 } 457 458 static int msm_dp_panel_parse_dt(struct msm_dp_panel *msm_dp_panel) 459 { 460 struct msm_dp_panel_private *panel; 461 struct device_node *of_node; 462 int cnt; 463 464 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); 465 of_node = panel->dev->of_node; 466 467 /* 468 * data-lanes is the property of msm_dp_out endpoint 469 */ 470 cnt = drm_of_get_data_lanes_count_ep(of_node, 1, 0, 1, DP_MAX_NUM_DP_LANES); 471 if (cnt < 0) { 472 /* legacy code, data-lanes is the property of mdss_dp node */ 473 cnt = drm_of_get_data_lanes_count(of_node, 1, DP_MAX_NUM_DP_LANES); 474 } 475 476 if (cnt > 0) 477 msm_dp_panel->max_dp_lanes = cnt; 478 else 479 msm_dp_panel->max_dp_lanes = DP_MAX_NUM_DP_LANES; /* 4 lanes */ 480 481 msm_dp_panel->max_dp_link_rate = msm_dp_panel_link_frequencies(of_node); 482 if (!msm_dp_panel->max_dp_link_rate) 483 msm_dp_panel->max_dp_link_rate = DP_LINK_RATE_HBR2; 484 485 return 0; 486 } 487 488 struct msm_dp_panel *msm_dp_panel_get(struct device *dev, struct drm_dp_aux *aux, 489 struct msm_dp_link *link, struct msm_dp_catalog *catalog) 490 { 491 struct msm_dp_panel_private *panel; 492 struct msm_dp_panel *msm_dp_panel; 493 int ret; 494 495 if (!dev || !catalog || !aux || !link) { 496 DRM_ERROR("invalid input\n"); 497 return ERR_PTR(-EINVAL); 498 } 499 500 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL); 501 if (!panel) 502 return ERR_PTR(-ENOMEM); 503 504 panel->dev = dev; 505 panel->aux = aux; 506 panel->catalog = catalog; 507 panel->link = link; 508 509 msm_dp_panel = &panel->msm_dp_panel; 510 msm_dp_panel->max_bw_code = DP_LINK_BW_8_1; 511 512 ret = msm_dp_panel_parse_dt(msm_dp_panel); 513 if (ret) 514 return ERR_PTR(ret); 515 516 return msm_dp_panel; 517 } 518 519 void msm_dp_panel_put(struct msm_dp_panel *msm_dp_panel) 520 { 521 if (!msm_dp_panel) 522 return; 523 524 drm_edid_free(msm_dp_panel->drm_edid); 525 } 526