1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/slab.h> 8 #include <linux/uaccess.h> 9 #include <linux/debugfs.h> 10 #include <linux/component.h> 11 #include <linux/of_irq.h> 12 #include <linux/phy/phy.h> 13 #include <linux/delay.h> 14 #include <linux/string_choices.h> 15 #include <drm/display/drm_dp_aux_bus.h> 16 #include <drm/display/drm_hdmi_audio_helper.h> 17 #include <drm/drm_edid.h> 18 19 #include "msm_drv.h" 20 #include "msm_kms.h" 21 #include "dp_ctrl.h" 22 #include "dp_aux.h" 23 #include "dp_reg.h" 24 #include "dp_link.h" 25 #include "dp_panel.h" 26 #include "dp_display.h" 27 #include "dp_drm.h" 28 #include "dp_audio.h" 29 #include "dp_debug.h" 30 31 static bool psr_enabled = false; 32 module_param(psr_enabled, bool, 0); 33 MODULE_PARM_DESC(psr_enabled, "enable PSR for eDP and DP displays"); 34 35 #define HPD_STRING_SIZE 30 36 37 enum { 38 ISR_DISCONNECTED, 39 ISR_CONNECT_PENDING, 40 ISR_CONNECTED, 41 ISR_HPD_IO_GLITCH_COUNT, 42 ISR_IRQ_HPD_PULSE_COUNT, 43 ISR_HPD_REPLUG_COUNT, 44 }; 45 46 struct msm_dp_display_private { 47 int irq; 48 49 unsigned int id; 50 51 /* state variables */ 52 bool core_initialized; 53 bool phy_initialized; 54 bool audio_supported; 55 56 struct mutex plugged_lock; 57 bool plugged; 58 59 struct drm_device *drm_dev; 60 61 struct drm_dp_aux *aux; 62 struct msm_dp_link *link; 63 struct msm_dp_panel *panel; 64 struct msm_dp_ctrl *ctrl; 65 66 struct msm_dp_display_mode msm_dp_mode; 67 struct msm_dp msm_dp_display; 68 69 /* wait for audio signaling */ 70 struct completion audio_comp; 71 72 /* HPD IRQ handling */ 73 spinlock_t irq_thread_lock; 74 u32 hpd_isr_status; 75 76 bool wide_bus_supported; 77 78 struct msm_dp_audio *audio; 79 80 void __iomem *ahb_base; 81 size_t ahb_len; 82 83 void __iomem *aux_base; 84 size_t aux_len; 85 86 void __iomem *link_base; 87 size_t link_len; 88 89 void __iomem *p0_base; 90 size_t p0_len; 91 }; 92 93 struct msm_dp_desc { 94 phys_addr_t io_start; 95 unsigned int id; 96 bool wide_bus_supported; 97 }; 98 99 static const struct msm_dp_desc msm_dp_desc_glymur[] = { 100 { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 101 { .io_start = 0x0af5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 102 { .io_start = 0x0af64000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 103 { .io_start = 0x0af6c000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true }, 104 {} 105 }; 106 107 static const struct msm_dp_desc msm_dp_desc_sa8775p[] = { 108 { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 109 { .io_start = 0x0af5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 110 { .io_start = 0x22154000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 111 { .io_start = 0x2215c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 112 {} 113 }; 114 115 static const struct msm_dp_desc msm_dp_desc_sdm845[] = { 116 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0 }, 117 {} 118 }; 119 120 static const struct msm_dp_desc msm_dp_desc_sc7180[] = { 121 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 122 {} 123 }; 124 125 static const struct msm_dp_desc msm_dp_desc_sc7280[] = { 126 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 127 { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 128 {} 129 }; 130 131 static const struct msm_dp_desc msm_dp_desc_sc8180x[] = { 132 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 133 { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 134 { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 135 {} 136 }; 137 138 static const struct msm_dp_desc msm_dp_desc_sc8280xp[] = { 139 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 140 { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 141 { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 142 { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true }, 143 { .io_start = 0x22090000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 144 { .io_start = 0x22098000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 145 { .io_start = 0x2209a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 146 { .io_start = 0x220a0000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true }, 147 {} 148 }; 149 150 static const struct msm_dp_desc msm_dp_desc_sm8650[] = { 151 { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 152 {} 153 }; 154 155 static const struct msm_dp_desc msm_dp_desc_x1e80100[] = { 156 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 157 { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 158 { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 159 { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true }, 160 {} 161 }; 162 163 static const struct of_device_id msm_dp_dt_match[] = { 164 { .compatible = "qcom,glymur-dp", .data = &msm_dp_desc_glymur }, 165 { .compatible = "qcom,sa8775p-dp", .data = &msm_dp_desc_sa8775p }, 166 { .compatible = "qcom,sc7180-dp", .data = &msm_dp_desc_sc7180 }, 167 { .compatible = "qcom,sc7280-dp", .data = &msm_dp_desc_sc7280 }, 168 { .compatible = "qcom,sc7280-edp", .data = &msm_dp_desc_sc7280 }, 169 { .compatible = "qcom,sc8180x-dp", .data = &msm_dp_desc_sc8180x }, 170 { .compatible = "qcom,sc8180x-edp", .data = &msm_dp_desc_sc8180x }, 171 { .compatible = "qcom,sc8280xp-dp", .data = &msm_dp_desc_sc8280xp }, 172 { .compatible = "qcom,sc8280xp-edp", .data = &msm_dp_desc_sc8280xp }, 173 { .compatible = "qcom,sdm845-dp", .data = &msm_dp_desc_sdm845 }, 174 { .compatible = "qcom,sm8350-dp", .data = &msm_dp_desc_sc7180 }, 175 { .compatible = "qcom,sm8650-dp", .data = &msm_dp_desc_sm8650 }, 176 { .compatible = "qcom,x1e80100-dp", .data = &msm_dp_desc_x1e80100 }, 177 {} 178 }; 179 MODULE_DEVICE_TABLE(of, msm_dp_dt_match); 180 181 static struct msm_dp_display_private *dev_get_dp_display_private(struct device *dev) 182 { 183 struct msm_dp *dp = dev_get_drvdata(dev); 184 185 return container_of(dp, struct msm_dp_display_private, msm_dp_display); 186 } 187 188 void msm_dp_display_signal_audio_start(struct msm_dp *msm_dp_display) 189 { 190 struct msm_dp_display_private *dp; 191 192 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 193 194 reinit_completion(&dp->audio_comp); 195 } 196 197 void msm_dp_display_signal_audio_complete(struct msm_dp *msm_dp_display) 198 { 199 struct msm_dp_display_private *dp; 200 201 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 202 203 complete_all(&dp->audio_comp); 204 } 205 206 static int msm_dp_display_bind(struct device *dev, struct device *master, 207 void *data) 208 { 209 int rc = 0; 210 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 211 struct msm_drm_private *priv = dev_get_drvdata(master); 212 struct drm_device *drm = priv->dev; 213 214 dp->msm_dp_display.drm_dev = drm; 215 priv->kms->dp[dp->id] = &dp->msm_dp_display; 216 217 dp->drm_dev = drm; 218 dp->aux->drm_dev = drm; 219 rc = msm_dp_aux_register(dp->aux); 220 if (rc) { 221 DRM_ERROR("DRM DP AUX register failed\n"); 222 goto end; 223 } 224 225 return 0; 226 end: 227 return rc; 228 } 229 230 static void msm_dp_display_unbind(struct device *dev, struct device *master, 231 void *data) 232 { 233 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 234 struct msm_drm_private *priv = dev_get_drvdata(master); 235 236 of_dp_aux_depopulate_bus(dp->aux); 237 238 msm_dp_aux_unregister(dp->aux); 239 dp->drm_dev = NULL; 240 dp->aux->drm_dev = NULL; 241 priv->kms->dp[dp->id] = NULL; 242 } 243 244 static const struct component_ops msm_dp_display_comp_ops = { 245 .bind = msm_dp_display_bind, 246 .unbind = msm_dp_display_unbind, 247 }; 248 249 static int msm_dp_display_lttpr_init(struct msm_dp_display_private *dp, u8 *dpcd) 250 { 251 int rc, lttpr_count; 252 253 if (drm_dp_read_lttpr_common_caps(dp->aux, dpcd, dp->link->lttpr_common_caps)) 254 return 0; 255 256 lttpr_count = drm_dp_lttpr_count(dp->link->lttpr_common_caps); 257 rc = drm_dp_lttpr_init(dp->aux, lttpr_count); 258 if (rc) { 259 DRM_ERROR("failed to set LTTPRs transparency mode, rc=%d\n", rc); 260 return 0; 261 } 262 263 return lttpr_count; 264 } 265 266 static int msm_dp_display_process_hpd_high(struct msm_dp_display_private *dp) 267 { 268 struct drm_connector *connector = dp->msm_dp_display.connector; 269 const struct drm_display_info *info = &connector->display_info; 270 int rc = 0; 271 u8 dpcd[DP_RECEIVER_CAP_SIZE]; 272 273 rc = drm_dp_read_dpcd_caps(dp->aux, dpcd); 274 if (rc) 275 goto end; 276 277 dp->link->lttpr_count = msm_dp_display_lttpr_init(dp, dpcd); 278 279 rc = msm_dp_panel_read_sink_caps(dp->panel, connector); 280 if (rc) 281 goto end; 282 283 msm_dp_link_process_request(dp->link); 284 285 if (!dp->msm_dp_display.is_edp) 286 drm_dp_set_subconnector_property(connector, 287 connector_status_connected, 288 dp->panel->dpcd, 289 dp->panel->downstream_ports); 290 291 dp->msm_dp_display.psr_supported = dp->panel->psr_cap.version && psr_enabled; 292 293 dp->audio_supported = info->has_audio; 294 msm_dp_panel_handle_sink_request(dp->panel); 295 296 /* 297 * set sink to normal operation mode -- D0 298 * before dpcd read 299 */ 300 msm_dp_link_psm_config(dp->link, &dp->panel->link_info, false); 301 302 msm_dp_link_reset_phy_params_vx_px(dp->link); 303 304 end: 305 return rc; 306 } 307 308 /** 309 * msm_dp_display_host_phy_init() - start up DP PHY 310 * @dp: main display data structure 311 * 312 * Prepare DP PHY for the AUX transactions to succeed. 313 * 314 * Returns: true if this call has initliazed the PHY and false if the PHY has 315 * already been setup beforehand. 316 */ 317 static bool msm_dp_display_host_phy_init(struct msm_dp_display_private *dp) 318 { 319 drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 320 dp->msm_dp_display.connector_type, dp->core_initialized, 321 dp->phy_initialized); 322 323 if (!dp->phy_initialized) { 324 msm_dp_ctrl_phy_init(dp->ctrl); 325 dp->phy_initialized = true; 326 return true; 327 } 328 329 return false; 330 } 331 332 static void msm_dp_display_host_phy_exit(struct msm_dp_display_private *dp) 333 { 334 drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 335 dp->msm_dp_display.connector_type, dp->core_initialized, 336 dp->phy_initialized); 337 338 if (dp->phy_initialized) { 339 msm_dp_ctrl_phy_exit(dp->ctrl); 340 dp->phy_initialized = false; 341 } 342 } 343 344 static void msm_dp_display_host_init(struct msm_dp_display_private *dp) 345 { 346 drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 347 dp->msm_dp_display.connector_type, dp->core_initialized, 348 dp->phy_initialized); 349 350 msm_dp_ctrl_core_clk_enable(dp->ctrl); 351 msm_dp_ctrl_reset(dp->ctrl); 352 msm_dp_ctrl_enable_irq(dp->ctrl); 353 msm_dp_aux_init(dp->aux); 354 dp->core_initialized = true; 355 } 356 357 static void msm_dp_display_host_deinit(struct msm_dp_display_private *dp) 358 { 359 drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 360 dp->msm_dp_display.connector_type, dp->core_initialized, 361 dp->phy_initialized); 362 363 msm_dp_ctrl_reset(dp->ctrl); 364 msm_dp_ctrl_disable_irq(dp->ctrl); 365 msm_dp_aux_deinit(dp->aux); 366 msm_dp_ctrl_core_clk_disable(dp->ctrl); 367 dp->core_initialized = false; 368 } 369 370 static void msm_dp_display_handle_video_request(struct msm_dp_display_private *dp) 371 { 372 if (dp->link->sink_request & DP_TEST_LINK_VIDEO_PATTERN) { 373 dp->panel->video_test = true; 374 msm_dp_link_send_test_response(dp->link); 375 } 376 } 377 378 static int msm_dp_display_handle_irq_hpd(struct msm_dp_display_private *dp) 379 { 380 u32 sink_request = dp->link->sink_request; 381 382 drm_dbg_dp(dp->drm_dev, "%d\n", sink_request); 383 384 msm_dp_ctrl_handle_sink_request(dp->ctrl); 385 386 if (sink_request & DP_TEST_LINK_VIDEO_PATTERN) 387 msm_dp_display_handle_video_request(dp); 388 389 return 0; 390 } 391 392 static int msm_dp_hpd_plug_handle(struct msm_dp_display_private *dp) 393 { 394 int ret; 395 struct platform_device *pdev = dp->msm_dp_display.pdev; 396 397 drm_dbg_dp(dp->drm_dev, "Before, type=%d sink_count=%d\n", 398 dp->msm_dp_display.connector_type, 399 dp->link->sink_count); 400 401 guard(mutex)(&dp->plugged_lock); 402 403 ret = pm_runtime_resume_and_get(&pdev->dev); 404 if (ret) { 405 DRM_ERROR("failed to pm_runtime_resume\n"); 406 return ret; 407 } 408 409 msm_dp_aux_enable_xfers(dp->aux, true); 410 411 msm_dp_display_host_phy_init(dp); 412 413 ret = msm_dp_display_process_hpd_high(dp); 414 415 drm_dbg_dp(dp->drm_dev, "After, type=%d sink_count=%d\n", 416 dp->msm_dp_display.connector_type, 417 dp->link->sink_count); 418 419 dp->plugged = true; 420 421 return ret; 422 }; 423 424 static void msm_dp_display_handle_plugged_change(struct msm_dp *msm_dp_display, 425 bool plugged) 426 { 427 struct msm_dp_display_private *dp; 428 429 dp = container_of(msm_dp_display, 430 struct msm_dp_display_private, msm_dp_display); 431 432 /* notify audio subsystem only if sink supports audio */ 433 if (dp->audio_supported) 434 drm_connector_hdmi_audio_plugged_notify(msm_dp_display->connector, 435 plugged); 436 } 437 438 static int msm_dp_hpd_unplug_handle(struct msm_dp_display_private *dp) 439 { 440 struct platform_device *pdev = dp->msm_dp_display.pdev; 441 442 dp->panel->video_test = false; 443 444 msm_dp_aux_enable_xfers(dp->aux, false); 445 446 drm_dbg_dp(dp->drm_dev, "Before, type=%d sink_count=%d\n", 447 dp->msm_dp_display.connector_type, 448 dp->link->sink_count); 449 450 guard(mutex)(&dp->plugged_lock); 451 if (!dp->plugged) 452 return 0; 453 454 /* Don't forget modes for eDP */ 455 if (!dp->msm_dp_display.is_edp) 456 msm_dp_panel_unplugged(dp->panel, dp->msm_dp_display.connector); 457 458 /* triggered by irq_hdp with sink_count = 0 */ 459 if (dp->link->sink_count == 0) 460 msm_dp_display_host_phy_exit(dp); 461 462 /* 463 * We don't need separate work for disconnect as 464 * connect/attention interrupts are disabled 465 */ 466 if (!dp->msm_dp_display.is_edp) 467 drm_dp_set_subconnector_property(dp->msm_dp_display.connector, 468 connector_status_disconnected, 469 dp->panel->dpcd, 470 dp->panel->downstream_ports); 471 472 /* signal the disconnect event early to ensure proper teardown */ 473 msm_dp_display_handle_plugged_change(&dp->msm_dp_display, false); 474 475 drm_dbg_dp(dp->drm_dev, "After, type=%d, sink_count=%d\n", 476 dp->msm_dp_display.connector_type, 477 dp->link->sink_count); 478 479 if (dp->plugged) { 480 pm_runtime_put_sync(&pdev->dev); 481 dp->plugged = false; 482 } 483 484 return 0; 485 } 486 487 static int msm_dp_irq_hpd_handle(struct msm_dp_display_private *dp) 488 { 489 u32 sink_request; 490 int rc = 0; 491 492 /* irq_hpd can happen at either connected or disconnected state */ 493 drm_dbg_dp(dp->drm_dev, "Before, type=%d, sink_count=%d\n", 494 dp->msm_dp_display.connector_type, 495 dp->link->sink_count); 496 497 /* check for any test request issued by sink */ 498 rc = msm_dp_link_process_request(dp->link); 499 if (!rc) { 500 sink_request = dp->link->sink_request; 501 drm_dbg_dp(dp->drm_dev, "sink_request=%d\n", sink_request); 502 if (sink_request & DS_PORT_STATUS_CHANGED) 503 rc = msm_dp_display_process_hpd_high(dp); 504 else 505 rc = msm_dp_display_handle_irq_hpd(dp); 506 } 507 508 drm_dbg_dp(dp->drm_dev, "After, type=%d, sink_count=%d\n", 509 dp->msm_dp_display.connector_type, 510 dp->link->sink_count); 511 512 return rc; 513 } 514 515 static void msm_dp_display_deinit_sub_modules(struct msm_dp_display_private *dp) 516 { 517 msm_dp_audio_put(dp->audio); 518 msm_dp_panel_put(dp->panel); 519 msm_dp_aux_put(dp->aux); 520 } 521 522 static int msm_dp_init_sub_modules(struct msm_dp_display_private *dp) 523 { 524 int rc = 0; 525 struct device *dev = &dp->msm_dp_display.pdev->dev; 526 struct phy *phy; 527 528 phy = devm_phy_get(dev, "dp"); 529 if (IS_ERR(phy)) 530 return PTR_ERR(phy); 531 532 rc = phy_set_mode_ext(phy, PHY_MODE_DP, 533 dp->msm_dp_display.is_edp ? PHY_SUBMODE_EDP : PHY_SUBMODE_DP); 534 if (rc) { 535 DRM_ERROR("failed to set phy submode, rc = %d\n", rc); 536 goto error; 537 } 538 539 dp->aux = msm_dp_aux_get(dev, phy, dp->msm_dp_display.is_edp, dp->aux_base); 540 if (IS_ERR(dp->aux)) { 541 rc = PTR_ERR(dp->aux); 542 DRM_ERROR("failed to initialize aux, rc = %d\n", rc); 543 dp->aux = NULL; 544 goto error; 545 } 546 547 dp->link = msm_dp_link_get(dev, dp->aux); 548 if (IS_ERR(dp->link)) { 549 rc = PTR_ERR(dp->link); 550 DRM_ERROR("failed to initialize link, rc = %d\n", rc); 551 dp->link = NULL; 552 goto error_link; 553 } 554 555 dp->panel = msm_dp_panel_get(dev, dp->aux, dp->link, dp->link_base, dp->p0_base); 556 if (IS_ERR(dp->panel)) { 557 rc = PTR_ERR(dp->panel); 558 DRM_ERROR("failed to initialize panel, rc = %d\n", rc); 559 dp->panel = NULL; 560 goto error_link; 561 } 562 563 dp->ctrl = msm_dp_ctrl_get(dev, dp->link, dp->panel, dp->aux, 564 phy, dp->ahb_base, dp->link_base); 565 if (IS_ERR(dp->ctrl)) { 566 rc = PTR_ERR(dp->ctrl); 567 DRM_ERROR("failed to initialize ctrl, rc = %d\n", rc); 568 dp->ctrl = NULL; 569 goto error_ctrl; 570 } 571 572 dp->audio = msm_dp_audio_get(dp->msm_dp_display.pdev, dp->link_base); 573 if (IS_ERR(dp->audio)) { 574 rc = PTR_ERR(dp->audio); 575 pr_err("failed to initialize audio, rc = %d\n", rc); 576 dp->audio = NULL; 577 goto error_ctrl; 578 } 579 580 return rc; 581 582 error_ctrl: 583 msm_dp_panel_put(dp->panel); 584 error_link: 585 msm_dp_aux_put(dp->aux); 586 error: 587 return rc; 588 } 589 590 static int msm_dp_display_set_mode(struct msm_dp *msm_dp_display, 591 struct msm_dp_display_mode *mode) 592 { 593 struct msm_dp_display_private *dp; 594 595 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 596 597 drm_mode_copy(&dp->panel->msm_dp_mode.drm_mode, &mode->drm_mode); 598 dp->panel->msm_dp_mode.bpp = mode->bpp; 599 dp->panel->msm_dp_mode.out_fmt_is_yuv_420 = mode->out_fmt_is_yuv_420; 600 msm_dp_panel_init_panel_info(dp->panel); 601 return 0; 602 } 603 604 static int msm_dp_display_enable(struct msm_dp_display_private *dp, bool force_link_train) 605 { 606 int rc = 0; 607 struct msm_dp *msm_dp_display = &dp->msm_dp_display; 608 609 drm_dbg_dp(dp->drm_dev, "sink_count=%d\n", dp->link->sink_count); 610 if (msm_dp_display->power_on) { 611 drm_dbg_dp(dp->drm_dev, "Link already setup, return\n"); 612 return 0; 613 } 614 615 rc = msm_dp_ctrl_on_stream(dp->ctrl, force_link_train); 616 if (!rc) 617 msm_dp_display->power_on = true; 618 619 return rc; 620 } 621 622 static int msm_dp_display_post_enable(struct msm_dp *msm_dp_display) 623 { 624 struct msm_dp_display_private *dp; 625 u32 rate; 626 627 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 628 629 rate = dp->link->link_params.rate; 630 631 if (dp->audio_supported) { 632 dp->audio->bw_code = drm_dp_link_rate_to_bw_code(rate); 633 dp->audio->lane_count = dp->link->link_params.num_lanes; 634 } 635 636 /* signal the connect event late to synchronize video and display */ 637 msm_dp_display_handle_plugged_change(msm_dp_display, true); 638 639 if (msm_dp_display->psr_supported) 640 msm_dp_ctrl_config_psr(dp->ctrl); 641 642 return 0; 643 } 644 645 static int msm_dp_display_disable(struct msm_dp_display_private *dp) 646 { 647 struct msm_dp *msm_dp_display = &dp->msm_dp_display; 648 649 if (!msm_dp_display->power_on) 650 return 0; 651 652 /* wait only if audio was enabled */ 653 if (msm_dp_display->audio_enabled) { 654 /* signal the disconnect event */ 655 msm_dp_display_handle_plugged_change(msm_dp_display, false); 656 if (!wait_for_completion_timeout(&dp->audio_comp, 657 HZ * 5)) 658 DRM_ERROR("audio comp timeout\n"); 659 } 660 661 msm_dp_display->audio_enabled = false; 662 663 if (dp->link->sink_count == 0) { 664 /* 665 * irq_hpd with sink_count = 0 666 * hdmi unplugged out of dongle 667 */ 668 msm_dp_ctrl_off_link_stream(dp->ctrl); 669 } else { 670 /* 671 * unplugged interrupt 672 * dongle unplugged out of DUT 673 */ 674 msm_dp_ctrl_off(dp->ctrl); 675 msm_dp_display_host_phy_exit(dp); 676 } 677 678 msm_dp_display->power_on = false; 679 680 drm_dbg_dp(dp->drm_dev, "sink count: %d\n", dp->link->sink_count); 681 return 0; 682 } 683 684 /** 685 * msm_dp_bridge_mode_valid - callback to determine if specified mode is valid 686 * @bridge: Pointer to drm bridge structure 687 * @info: display info 688 * @mode: Pointer to drm mode structure 689 * Returns: Validity status for specified mode 690 */ 691 enum drm_mode_status msm_dp_bridge_mode_valid(struct drm_bridge *bridge, 692 const struct drm_display_info *info, 693 const struct drm_display_mode *mode) 694 { 695 const u32 num_components = 3, default_bpp = 24; 696 struct msm_dp_display_private *msm_dp_display; 697 struct msm_dp_link_info *link_info; 698 u32 mode_rate_khz = 0, supported_rate_khz = 0, mode_bpp = 0; 699 struct msm_dp *dp; 700 int mode_pclk_khz = mode->clock; 701 702 dp = to_dp_bridge(bridge)->msm_dp_display; 703 704 if (!dp || !mode_pclk_khz || !dp->connector) { 705 DRM_ERROR("invalid params\n"); 706 return -EINVAL; 707 } 708 709 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 710 link_info = &msm_dp_display->panel->link_info; 711 712 if ((drm_mode_is_420_only(&dp->connector->display_info, mode) && 713 msm_dp_display->panel->vsc_sdp_supported) || 714 msm_dp_wide_bus_available(dp)) 715 mode_pclk_khz /= 2; 716 717 if (mode_pclk_khz > DP_MAX_PIXEL_CLK_KHZ) 718 return MODE_CLOCK_HIGH; 719 720 mode_bpp = dp->connector->display_info.bpc * num_components; 721 if (!mode_bpp) 722 mode_bpp = default_bpp; 723 724 mode_bpp = msm_dp_panel_get_mode_bpp(msm_dp_display->panel, 725 mode_bpp, mode_pclk_khz); 726 727 mode_rate_khz = mode_pclk_khz * mode_bpp; 728 supported_rate_khz = link_info->num_lanes * link_info->rate * 8; 729 730 if (mode_rate_khz > supported_rate_khz) 731 return MODE_BAD; 732 733 return MODE_OK; 734 } 735 736 int msm_dp_display_get_modes(struct msm_dp *dp) 737 { 738 struct msm_dp_display_private *msm_dp_display; 739 740 if (!dp) { 741 DRM_ERROR("invalid params\n"); 742 return 0; 743 } 744 745 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 746 747 return msm_dp_panel_get_modes(msm_dp_display->panel, 748 dp->connector); 749 } 750 751 bool msm_dp_display_check_video_test(struct msm_dp *dp) 752 { 753 struct msm_dp_display_private *msm_dp_display; 754 755 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 756 757 return msm_dp_display->panel->video_test; 758 } 759 760 int msm_dp_display_get_test_bpp(struct msm_dp *dp) 761 { 762 struct msm_dp_display_private *msm_dp_display; 763 764 if (!dp) { 765 DRM_ERROR("invalid params\n"); 766 return 0; 767 } 768 769 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 770 771 return msm_dp_link_bit_depth_to_bpp( 772 msm_dp_display->link->test_video.test_bit_depth); 773 } 774 775 void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp) 776 { 777 struct msm_dp_display_private *msm_dp_display; 778 779 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 780 781 /* 782 * if we are reading registers we need the link clocks to be on 783 * however till DP cable is connected this will not happen as we 784 * do not know the resolution to power up with. Hence check the 785 * power_on status before dumping DP registers to avoid crash due 786 * to unclocked access 787 */ 788 if (!dp->power_on) 789 return; 790 791 msm_disp_snapshot_add_block(disp_state, msm_dp_display->ahb_len, 792 msm_dp_display->ahb_base, "dp_ahb"); 793 msm_disp_snapshot_add_block(disp_state, msm_dp_display->aux_len, 794 msm_dp_display->aux_base, "dp_aux"); 795 msm_disp_snapshot_add_block(disp_state, msm_dp_display->link_len, 796 msm_dp_display->link_base, "dp_link"); 797 msm_disp_snapshot_add_block(disp_state, msm_dp_display->p0_len, 798 msm_dp_display->p0_base, "dp_p0"); 799 } 800 801 void msm_dp_display_set_psr(struct msm_dp *msm_dp_display, bool enter) 802 { 803 struct msm_dp_display_private *dp; 804 805 if (!msm_dp_display) { 806 DRM_ERROR("invalid params\n"); 807 return; 808 } 809 810 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 811 msm_dp_ctrl_set_psr(dp->ctrl, enter); 812 } 813 814 /** 815 * msm_dp_bridge_detect - callback to determine if connector is connected 816 * 817 * @bridge: Pointer to drm bridge structure 818 * @connector: Pointer to drm connector structure 819 * 820 * Returns: where there is a display connected to the DPTX (returning 821 * disconnected for branch devices without DP Sinks being connected). 822 */ 823 enum drm_connector_status msm_dp_bridge_detect(struct drm_bridge *bridge, 824 struct drm_connector *connector) 825 { 826 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(bridge); 827 struct msm_dp *dp = msm_dp_bridge->msm_dp_display; 828 int status = connector_status_disconnected; 829 struct msm_dp_display_private *priv; 830 u8 dpcd[DP_RECEIVER_CAP_SIZE]; 831 struct drm_dp_desc desc; 832 bool phy_deinit; 833 int ret; 834 835 dp = to_dp_bridge(bridge)->msm_dp_display; 836 837 priv = container_of(dp, struct msm_dp_display_private, msm_dp_display); 838 839 guard(mutex)(&priv->plugged_lock); 840 ret = pm_runtime_resume_and_get(&dp->pdev->dev); 841 if (ret) { 842 DRM_ERROR("failed to pm_runtime_resume\n"); 843 return status; 844 } 845 846 phy_deinit = msm_dp_display_host_phy_init(priv); 847 848 msm_dp_aux_enable_xfers(priv->aux, true); 849 850 ret = msm_dp_aux_is_link_connected(priv->aux); 851 DRM_DEBUG_DP("aux link status: %x\n", ret); 852 if (!priv->plugged && !ret) { 853 DRM_DEBUG_DP("aux not connected\n"); 854 priv->plugged = false; 855 goto end; 856 } 857 858 ret = drm_dp_read_dpcd_caps(priv->aux, dpcd); 859 if (ret) { 860 DRM_DEBUG_DP("failed to read caps\n"); 861 priv->plugged = false; 862 goto end; 863 } 864 865 ret = drm_dp_read_desc(priv->aux, &desc, drm_dp_is_branch(dpcd)); 866 if (ret) { 867 DRM_DEBUG_DP("failed to read desc\n"); 868 priv->plugged = false; 869 goto end; 870 } 871 872 status = connector_status_connected; 873 priv->plugged = true; 874 875 if (drm_dp_read_sink_count_cap(connector, dpcd, &desc)) { 876 int sink_count = drm_dp_read_sink_count(priv->aux); 877 878 drm_dbg_dp(dp->drm_dev, "sink_count = %d\n", sink_count); 879 880 if (sink_count <= 0) 881 status = connector_status_disconnected; 882 } 883 884 end: 885 /* 886 * If we detected the DPRX, leave the controller on so that it doesn't 887 * lose the state. 888 */ 889 if (!priv->plugged) { 890 if (phy_deinit) { 891 msm_dp_aux_enable_xfers(priv->aux, false); 892 msm_dp_display_host_phy_exit(priv); 893 } 894 895 pm_runtime_put_sync(&dp->pdev->dev); 896 } 897 898 return status; 899 } 900 901 static irqreturn_t msm_dp_display_irq_handler(int irq, void *dev_id) 902 { 903 struct msm_dp_display_private *dp = dev_id; 904 u32 hpd_isr_status; 905 unsigned long flags; 906 irqreturn_t ret = IRQ_HANDLED; 907 908 hpd_isr_status = msm_dp_aux_get_hpd_intr_status(dp->aux); 909 910 if (hpd_isr_status & 0x0F) { 911 drm_dbg_dp(dp->drm_dev, "type=%d isr=0x%x\n", 912 dp->msm_dp_display.connector_type, hpd_isr_status); 913 914 spin_lock_irqsave(&dp->irq_thread_lock, flags); 915 dp->hpd_isr_status |= hpd_isr_status; 916 ret = IRQ_WAKE_THREAD; 917 spin_unlock_irqrestore(&dp->irq_thread_lock, flags); 918 } 919 920 /* DP controller isr */ 921 ret |= msm_dp_ctrl_isr(dp->ctrl); 922 923 return ret; 924 } 925 926 static irqreturn_t msm_dp_display_irq_thread(int irq, void *dev_id) 927 { 928 struct msm_dp_display_private *dp = dev_id; 929 irqreturn_t ret = IRQ_NONE; 930 unsigned long flags; 931 u32 hpd_isr_status; 932 933 spin_lock_irqsave(&dp->irq_thread_lock, flags); 934 hpd_isr_status = dp->hpd_isr_status; 935 dp->hpd_isr_status = 0; 936 spin_unlock_irqrestore(&dp->irq_thread_lock, flags); 937 938 if (hpd_isr_status & DP_DP_HPD_UNPLUG_INT_MASK) 939 drm_bridge_hpd_notify(dp->msm_dp_display.bridge, 940 connector_status_disconnected); 941 942 if (hpd_isr_status & DP_DP_HPD_PLUG_INT_MASK) 943 drm_bridge_hpd_notify(dp->msm_dp_display.bridge, 944 connector_status_connected); 945 946 /* Send HPD as connected and distinguish it in the notifier */ 947 if (hpd_isr_status & DP_DP_IRQ_HPD_INT_MASK) 948 drm_bridge_hpd_notify(dp->msm_dp_display.bridge, 949 connector_status_connected); 950 951 ret = IRQ_HANDLED; 952 953 return ret; 954 } 955 956 static int msm_dp_display_request_irq(struct msm_dp_display_private *dp) 957 { 958 int rc = 0; 959 struct platform_device *pdev = dp->msm_dp_display.pdev; 960 961 dp->irq = platform_get_irq(pdev, 0); 962 if (dp->irq < 0) { 963 DRM_ERROR("failed to get irq\n"); 964 return dp->irq; 965 } 966 967 spin_lock_init(&dp->irq_thread_lock); 968 irq_set_status_flags(dp->irq, IRQ_NOAUTOEN); 969 rc = devm_request_threaded_irq(&pdev->dev, dp->irq, 970 msm_dp_display_irq_handler, 971 msm_dp_display_irq_thread, 972 IRQ_TYPE_LEVEL_HIGH, 973 "dp_display_isr", dp); 974 975 if (rc < 0) { 976 DRM_ERROR("failed to request IRQ%u: %d\n", 977 dp->irq, rc); 978 return rc; 979 } 980 981 return 0; 982 } 983 984 static const struct msm_dp_desc *msm_dp_display_get_desc(struct platform_device *pdev) 985 { 986 const struct msm_dp_desc *descs = of_device_get_match_data(&pdev->dev); 987 struct resource *res; 988 int i; 989 990 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 991 if (!res) 992 return NULL; 993 994 for (i = 0; i < descs[i].io_start; i++) { 995 if (descs[i].io_start == res->start) 996 return &descs[i]; 997 } 998 999 dev_err(&pdev->dev, "unknown displayport instance\n"); 1000 return NULL; 1001 } 1002 1003 static int msm_dp_display_probe_tail(struct device *dev) 1004 { 1005 struct msm_dp *dp = dev_get_drvdata(dev); 1006 int ret; 1007 1008 /* 1009 * External bridges are mandatory for eDP interfaces: one has to 1010 * provide at least an eDP panel (which gets wrapped into panel-bridge). 1011 * 1012 * For DisplayPort interfaces external bridges are optional, so 1013 * silently ignore an error if one is not present (-ENODEV). 1014 */ 1015 dp->next_bridge = devm_drm_of_get_bridge(&dp->pdev->dev, dp->pdev->dev.of_node, 1, 0); 1016 if (IS_ERR(dp->next_bridge)) { 1017 ret = PTR_ERR(dp->next_bridge); 1018 dp->next_bridge = NULL; 1019 if (dp->is_edp || ret != -ENODEV) 1020 return ret; 1021 } 1022 1023 ret = component_add(dev, &msm_dp_display_comp_ops); 1024 if (ret) 1025 DRM_ERROR("component add failed, rc=%d\n", ret); 1026 1027 return ret; 1028 } 1029 1030 static int msm_dp_auxbus_done_probe(struct drm_dp_aux *aux) 1031 { 1032 return msm_dp_display_probe_tail(aux->dev); 1033 } 1034 1035 static int msm_dp_display_get_connector_type(struct platform_device *pdev, 1036 const struct msm_dp_desc *desc) 1037 { 1038 struct device_node *node = pdev->dev.of_node; 1039 struct device_node *aux_bus = of_get_child_by_name(node, "aux-bus"); 1040 struct device_node *panel = of_get_child_by_name(aux_bus, "panel"); 1041 int connector_type; 1042 1043 if (panel) 1044 connector_type = DRM_MODE_CONNECTOR_eDP; 1045 else 1046 connector_type = DRM_MODE_SUBCONNECTOR_DisplayPort; 1047 1048 of_node_put(panel); 1049 of_node_put(aux_bus); 1050 1051 return connector_type; 1052 } 1053 1054 static void __iomem *msm_dp_ioremap(struct platform_device *pdev, int idx, size_t *len) 1055 { 1056 struct resource *res; 1057 void __iomem *base; 1058 1059 base = devm_platform_get_and_ioremap_resource(pdev, idx, &res); 1060 if (!IS_ERR(base)) 1061 *len = resource_size(res); 1062 1063 return base; 1064 } 1065 1066 #define DP_DEFAULT_AHB_OFFSET 0x0000 1067 #define DP_DEFAULT_AHB_SIZE 0x0200 1068 #define DP_DEFAULT_AUX_OFFSET 0x0200 1069 #define DP_DEFAULT_AUX_SIZE 0x0200 1070 #define DP_DEFAULT_LINK_OFFSET 0x0400 1071 #define DP_DEFAULT_LINK_SIZE 0x0C00 1072 #define DP_DEFAULT_P0_OFFSET 0x1000 1073 #define DP_DEFAULT_P0_SIZE 0x0400 1074 1075 static int msm_dp_display_get_io(struct msm_dp_display_private *display) 1076 { 1077 struct platform_device *pdev = display->msm_dp_display.pdev; 1078 1079 display->ahb_base = msm_dp_ioremap(pdev, 0, &display->ahb_len); 1080 if (IS_ERR(display->ahb_base)) 1081 return PTR_ERR(display->ahb_base); 1082 1083 display->aux_base = msm_dp_ioremap(pdev, 1, &display->aux_len); 1084 if (IS_ERR(display->aux_base)) { 1085 if (display->aux_base != ERR_PTR(-EINVAL)) { 1086 DRM_ERROR("unable to remap aux region: %pe\n", display->aux_base); 1087 return PTR_ERR(display->aux_base); 1088 } 1089 1090 /* 1091 * The initial binding had a single reg, but in order to 1092 * support variation in the sub-region sizes this was split. 1093 * msm_dp_ioremap() will fail with -EINVAL here if only a single 1094 * reg is specified, so fill in the sub-region offsets and 1095 * lengths based on this single region. 1096 */ 1097 if (display->ahb_len < DP_DEFAULT_P0_OFFSET + DP_DEFAULT_P0_SIZE) { 1098 DRM_ERROR("legacy memory region not large enough\n"); 1099 return -EINVAL; 1100 } 1101 1102 display->ahb_len = DP_DEFAULT_AHB_SIZE; 1103 display->aux_base = display->ahb_base + DP_DEFAULT_AUX_OFFSET; 1104 display->aux_len = DP_DEFAULT_AUX_SIZE; 1105 display->link_base = display->ahb_base + DP_DEFAULT_LINK_OFFSET; 1106 display->link_len = DP_DEFAULT_LINK_SIZE; 1107 display->p0_base = display->ahb_base + DP_DEFAULT_P0_OFFSET; 1108 display->p0_len = DP_DEFAULT_P0_SIZE; 1109 1110 return 0; 1111 } 1112 1113 display->link_base = msm_dp_ioremap(pdev, 2, &display->link_len); 1114 if (IS_ERR(display->link_base)) { 1115 DRM_ERROR("unable to remap link region: %pe\n", display->link_base); 1116 return PTR_ERR(display->link_base); 1117 } 1118 1119 display->p0_base = msm_dp_ioremap(pdev, 3, &display->p0_len); 1120 if (IS_ERR(display->p0_base)) { 1121 DRM_ERROR("unable to remap p0 region: %pe\n", display->p0_base); 1122 return PTR_ERR(display->p0_base); 1123 } 1124 1125 return 0; 1126 } 1127 1128 static int msm_dp_display_probe(struct platform_device *pdev) 1129 { 1130 int rc = 0; 1131 struct msm_dp_display_private *dp; 1132 const struct msm_dp_desc *desc; 1133 1134 if (!pdev || !pdev->dev.of_node) { 1135 DRM_ERROR("pdev not found\n"); 1136 return -ENODEV; 1137 } 1138 1139 dp = devm_kzalloc(&pdev->dev, sizeof(*dp), GFP_KERNEL); 1140 if (!dp) 1141 return -ENOMEM; 1142 1143 desc = msm_dp_display_get_desc(pdev); 1144 if (!desc) 1145 return -EINVAL; 1146 1147 dp->msm_dp_display.pdev = pdev; 1148 dp->id = desc->id; 1149 dp->msm_dp_display.connector_type = msm_dp_display_get_connector_type(pdev, desc); 1150 dp->wide_bus_supported = desc->wide_bus_supported; 1151 dp->msm_dp_display.is_edp = 1152 (dp->msm_dp_display.connector_type == DRM_MODE_CONNECTOR_eDP); 1153 dp->hpd_isr_status = 0; 1154 1155 mutex_init(&dp->plugged_lock); 1156 1157 rc = msm_dp_display_get_io(dp); 1158 if (rc) 1159 return rc; 1160 1161 rc = msm_dp_init_sub_modules(dp); 1162 if (rc) { 1163 DRM_ERROR("init sub module failed\n"); 1164 return -EPROBE_DEFER; 1165 } 1166 1167 /* Store DP audio handle inside DP display */ 1168 dp->msm_dp_display.msm_dp_audio = dp->audio; 1169 1170 init_completion(&dp->audio_comp); 1171 1172 platform_set_drvdata(pdev, &dp->msm_dp_display); 1173 1174 rc = devm_pm_runtime_enable(&pdev->dev); 1175 if (rc) 1176 goto err; 1177 1178 rc = msm_dp_display_request_irq(dp); 1179 if (rc) 1180 goto err; 1181 1182 if (dp->msm_dp_display.is_edp) { 1183 rc = devm_of_dp_aux_populate_bus(dp->aux, msm_dp_auxbus_done_probe); 1184 if (rc) { 1185 DRM_ERROR("eDP auxbus population failed, rc=%d\n", rc); 1186 goto err; 1187 } 1188 } else { 1189 rc = msm_dp_display_probe_tail(&pdev->dev); 1190 if (rc) 1191 goto err; 1192 } 1193 1194 return rc; 1195 1196 err: 1197 msm_dp_display_deinit_sub_modules(dp); 1198 return rc; 1199 } 1200 1201 static void msm_dp_display_remove(struct platform_device *pdev) 1202 { 1203 struct msm_dp_display_private *dp = dev_get_dp_display_private(&pdev->dev); 1204 1205 component_del(&pdev->dev, &msm_dp_display_comp_ops); 1206 msm_dp_display_deinit_sub_modules(dp); 1207 platform_set_drvdata(pdev, NULL); 1208 } 1209 1210 static int msm_dp_pm_runtime_suspend(struct device *dev) 1211 { 1212 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 1213 1214 disable_irq(dp->irq); 1215 1216 if (dp->msm_dp_display.is_edp) { 1217 msm_dp_display_host_phy_exit(dp); 1218 msm_dp_aux_hpd_disable(dp->aux); 1219 } 1220 msm_dp_display_host_deinit(dp); 1221 1222 return 0; 1223 } 1224 1225 static int msm_dp_pm_runtime_resume(struct device *dev) 1226 { 1227 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 1228 1229 /* 1230 * for eDP, host cotroller, HPD block and PHY are enabled here 1231 * but with HPD irq disabled 1232 * 1233 * for DP, only host controller is enabled here. 1234 * HPD block is enabled at msm_dp_bridge_hpd_enable() 1235 * PHY will be enabled at plugin handler later 1236 */ 1237 msm_dp_display_host_init(dp); 1238 if (dp->msm_dp_display.is_edp) { 1239 msm_dp_aux_hpd_enable(dp->aux); 1240 msm_dp_display_host_phy_init(dp); 1241 } 1242 1243 enable_irq(dp->irq); 1244 return 0; 1245 } 1246 1247 static const struct dev_pm_ops msm_dp_pm_ops = { 1248 SET_RUNTIME_PM_OPS(msm_dp_pm_runtime_suspend, msm_dp_pm_runtime_resume, NULL) 1249 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 1250 pm_runtime_force_resume) 1251 }; 1252 1253 static struct platform_driver msm_dp_display_driver = { 1254 .probe = msm_dp_display_probe, 1255 .remove = msm_dp_display_remove, 1256 .driver = { 1257 .name = "msm-dp-display", 1258 .of_match_table = msm_dp_dt_match, 1259 .suppress_bind_attrs = true, 1260 .pm = &msm_dp_pm_ops, 1261 }, 1262 }; 1263 1264 int __init msm_dp_register(void) 1265 { 1266 int ret; 1267 1268 ret = platform_driver_register(&msm_dp_display_driver); 1269 if (ret) 1270 DRM_ERROR("Dp display driver register failed"); 1271 1272 return ret; 1273 } 1274 1275 void __exit msm_dp_unregister(void) 1276 { 1277 platform_driver_unregister(&msm_dp_display_driver); 1278 } 1279 1280 bool msm_dp_is_yuv_420_enabled(const struct msm_dp *msm_dp_display, 1281 const struct drm_display_mode *mode) 1282 { 1283 struct msm_dp_display_private *dp; 1284 const struct drm_display_info *info; 1285 1286 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1287 info = &msm_dp_display->connector->display_info; 1288 1289 return dp->panel->vsc_sdp_supported && drm_mode_is_420_only(info, mode); 1290 } 1291 1292 bool msm_dp_needs_periph_flush(const struct msm_dp *msm_dp_display, 1293 const struct drm_display_mode *mode) 1294 { 1295 return msm_dp_is_yuv_420_enabled(msm_dp_display, mode); 1296 } 1297 1298 bool msm_dp_wide_bus_available(const struct msm_dp *msm_dp_display) 1299 { 1300 struct msm_dp_display_private *dp; 1301 1302 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1303 1304 if (dp->msm_dp_mode.out_fmt_is_yuv_420) 1305 return false; 1306 1307 return dp->wide_bus_supported; 1308 } 1309 1310 void msm_dp_display_debugfs_init(struct msm_dp *msm_dp_display, struct dentry *root, bool is_edp) 1311 { 1312 struct msm_dp_display_private *dp; 1313 struct device *dev; 1314 int rc; 1315 1316 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1317 dev = &dp->msm_dp_display.pdev->dev; 1318 1319 rc = msm_dp_debug_init(dev, dp->panel, dp->link, dp->msm_dp_display.connector, root, is_edp); 1320 if (rc) 1321 DRM_ERROR("failed to initialize debug, rc = %d\n", rc); 1322 } 1323 1324 int msm_dp_modeset_init(struct msm_dp *msm_dp_display, struct drm_device *dev, 1325 struct drm_encoder *encoder, bool yuv_supported) 1326 { 1327 struct msm_dp_display_private *msm_dp_priv; 1328 int ret; 1329 1330 msm_dp_display->drm_dev = dev; 1331 1332 msm_dp_priv = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1333 1334 ret = msm_dp_bridge_init(msm_dp_display, dev, encoder, yuv_supported); 1335 if (ret) { 1336 DRM_DEV_ERROR(dev->dev, 1337 "failed to create dp bridge: %d\n", ret); 1338 return ret; 1339 } 1340 1341 msm_dp_display->connector = msm_dp_drm_connector_init(msm_dp_display, encoder); 1342 if (IS_ERR(msm_dp_display->connector)) { 1343 ret = PTR_ERR(msm_dp_display->connector); 1344 DRM_DEV_ERROR(dev->dev, 1345 "failed to create dp connector: %d\n", ret); 1346 msm_dp_display->connector = NULL; 1347 return ret; 1348 } 1349 1350 msm_dp_priv->panel->connector = msm_dp_display->connector; 1351 1352 return 0; 1353 } 1354 1355 void msm_dp_bridge_atomic_enable(struct drm_bridge *drm_bridge, 1356 struct drm_atomic_commit *state) 1357 { 1358 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(drm_bridge); 1359 struct msm_dp *dp = msm_dp_bridge->msm_dp_display; 1360 int rc = 0; 1361 struct msm_dp_display_private *msm_dp_display; 1362 bool force_link_train = false; 1363 1364 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 1365 if (!msm_dp_display->msm_dp_mode.drm_mode.clock) { 1366 DRM_ERROR("invalid params\n"); 1367 return; 1368 } 1369 1370 if (dp->is_edp) 1371 msm_dp_hpd_plug_handle(msm_dp_display); 1372 1373 if (pm_runtime_resume_and_get(&dp->pdev->dev)) { 1374 DRM_ERROR("failed to pm_runtime_resume\n"); 1375 return; 1376 } 1377 1378 if (msm_dp_display->link->sink_count == 0) 1379 return; 1380 1381 rc = msm_dp_display_set_mode(dp, &msm_dp_display->msm_dp_mode); 1382 if (rc) { 1383 DRM_ERROR("Failed to perform a mode set, rc=%d\n", rc); 1384 return; 1385 } 1386 1387 if (!dp->power_on) { 1388 msm_dp_display_host_phy_init(msm_dp_display); 1389 force_link_train = true; 1390 } 1391 1392 rc = msm_dp_ctrl_on_link(msm_dp_display->ctrl); 1393 if (rc) { 1394 DRM_ERROR("Failed link training (rc=%d)\n", rc); 1395 // TODO: schedule drm_connector_set_link_status_property() 1396 return; 1397 } 1398 1399 msm_dp_display_enable(msm_dp_display, force_link_train); 1400 1401 rc = msm_dp_display_post_enable(dp); 1402 if (rc) { 1403 DRM_ERROR("DP display post enable failed, rc=%d\n", rc); 1404 msm_dp_display_disable(msm_dp_display); 1405 } 1406 1407 drm_dbg_dp(dp->drm_dev, "type=%d Done\n", dp->connector_type); 1408 } 1409 1410 void msm_dp_bridge_atomic_disable(struct drm_bridge *drm_bridge, 1411 struct drm_atomic_commit *state) 1412 { 1413 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(drm_bridge); 1414 struct msm_dp *dp = msm_dp_bridge->msm_dp_display; 1415 struct msm_dp_display_private *msm_dp_display; 1416 1417 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 1418 1419 msm_dp_ctrl_push_idle(msm_dp_display->ctrl); 1420 } 1421 1422 void msm_dp_bridge_atomic_post_disable(struct drm_bridge *drm_bridge, 1423 struct drm_atomic_commit *state) 1424 { 1425 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(drm_bridge); 1426 struct msm_dp *dp = msm_dp_bridge->msm_dp_display; 1427 struct msm_dp_display_private *msm_dp_display; 1428 1429 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 1430 1431 if (dp->is_edp) 1432 msm_dp_hpd_unplug_handle(msm_dp_display); 1433 1434 msm_dp_display_disable(msm_dp_display); 1435 1436 drm_dbg_dp(dp->drm_dev, "type=%d Done\n", dp->connector_type); 1437 1438 pm_runtime_put_sync(&dp->pdev->dev); 1439 } 1440 1441 void msm_dp_bridge_mode_set(struct drm_bridge *drm_bridge, 1442 const struct drm_display_mode *mode, 1443 const struct drm_display_mode *adjusted_mode) 1444 { 1445 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(drm_bridge); 1446 struct msm_dp *dp = msm_dp_bridge->msm_dp_display; 1447 struct msm_dp_display_private *msm_dp_display; 1448 struct msm_dp_panel *msm_dp_panel; 1449 1450 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 1451 msm_dp_panel = msm_dp_display->panel; 1452 1453 memset(&msm_dp_display->msm_dp_mode, 0x0, sizeof(struct msm_dp_display_mode)); 1454 1455 if (msm_dp_display_check_video_test(dp)) 1456 msm_dp_display->msm_dp_mode.bpp = msm_dp_display_get_test_bpp(dp); 1457 else /* Default num_components per pixel = 3 */ 1458 msm_dp_display->msm_dp_mode.bpp = dp->connector->display_info.bpc * 3; 1459 1460 if (!msm_dp_display->msm_dp_mode.bpp) 1461 msm_dp_display->msm_dp_mode.bpp = 24; /* Default bpp */ 1462 1463 drm_mode_copy(&msm_dp_display->msm_dp_mode.drm_mode, adjusted_mode); 1464 1465 msm_dp_display->msm_dp_mode.v_active_low = 1466 !!(msm_dp_display->msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NVSYNC); 1467 1468 msm_dp_display->msm_dp_mode.h_active_low = 1469 !!(msm_dp_display->msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC); 1470 1471 msm_dp_display->msm_dp_mode.out_fmt_is_yuv_420 = 1472 drm_mode_is_420_only(&dp->connector->display_info, adjusted_mode) && 1473 msm_dp_panel->vsc_sdp_supported; 1474 1475 /* populate wide_bus_support to different layers */ 1476 msm_dp_display->ctrl->wide_bus_en = 1477 msm_dp_display->msm_dp_mode.out_fmt_is_yuv_420 ? false : msm_dp_display->wide_bus_supported; 1478 } 1479 1480 void msm_dp_bridge_hpd_enable(struct drm_bridge *bridge) 1481 { 1482 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(bridge); 1483 struct msm_dp *msm_dp_display = msm_dp_bridge->msm_dp_display; 1484 struct msm_dp_display_private *dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1485 1486 /* 1487 * this is for external DP with hpd irq enabled case, 1488 * step-1: msm_dp_pm_runtime_resume() enable dp host only 1489 * step-2: enable hdp block and have hpd irq enabled here 1490 * step-3: waiting for plugin irq while phy is not initialized 1491 * step-4: DP PHY is initialized at plugin handler before link training 1492 * 1493 */ 1494 if (pm_runtime_resume_and_get(&msm_dp_display->pdev->dev)) { 1495 DRM_ERROR("failed to resume power\n"); 1496 return; 1497 } 1498 1499 msm_dp_aux_hpd_enable(dp->aux); 1500 msm_dp_aux_hpd_intr_enable(dp->aux); 1501 } 1502 1503 void msm_dp_bridge_hpd_disable(struct drm_bridge *bridge) 1504 { 1505 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(bridge); 1506 struct msm_dp *msm_dp_display = msm_dp_bridge->msm_dp_display; 1507 struct msm_dp_display_private *dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1508 1509 msm_dp_aux_hpd_intr_disable(dp->aux); 1510 msm_dp_aux_hpd_disable(dp->aux); 1511 1512 pm_runtime_put_sync(&msm_dp_display->pdev->dev); 1513 } 1514 1515 void msm_dp_bridge_hpd_notify(struct drm_bridge *bridge, 1516 struct drm_connector *connector, 1517 enum drm_connector_status status) 1518 { 1519 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(bridge); 1520 struct msm_dp *msm_dp_display = msm_dp_bridge->msm_dp_display; 1521 struct msm_dp_display_private *dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1522 u32 hpd_link_status = 0; 1523 1524 if (pm_runtime_resume_and_get(&msm_dp_display->pdev->dev)) { 1525 DRM_ERROR("failed to pm_runtime_resume\n"); 1526 return; 1527 } 1528 1529 hpd_link_status = msm_dp_aux_is_link_connected(dp->aux); 1530 1531 drm_dbg_dp(dp->drm_dev, "type=%d link hpd_link_status=0x%x, status=%d\n", 1532 msm_dp_display->connector_type, hpd_link_status, status); 1533 1534 if (status == connector_status_connected) { 1535 if (hpd_link_status == ISR_HPD_REPLUG_COUNT) { 1536 msm_dp_hpd_unplug_handle(dp); 1537 msm_dp_hpd_plug_handle(dp); 1538 } else if (hpd_link_status == ISR_IRQ_HPD_PULSE_COUNT) { 1539 msm_dp_irq_hpd_handle(dp); 1540 } else { 1541 msm_dp_hpd_plug_handle(dp); 1542 } 1543 } else { 1544 msm_dp_hpd_unplug_handle(dp); 1545 } 1546 1547 pm_runtime_put_sync(&msm_dp_display->pdev->dev); 1548 } 1549