1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/slab.h> 8 #include <linux/uaccess.h> 9 #include <linux/debugfs.h> 10 #include <linux/component.h> 11 #include <linux/of_irq.h> 12 #include <linux/phy/phy.h> 13 #include <linux/delay.h> 14 #include <linux/string_choices.h> 15 #include <drm/display/drm_dp_aux_bus.h> 16 #include <drm/display/drm_hdmi_audio_helper.h> 17 #include <drm/drm_edid.h> 18 19 #include "msm_drv.h" 20 #include "msm_kms.h" 21 #include "dp_ctrl.h" 22 #include "dp_aux.h" 23 #include "dp_reg.h" 24 #include "dp_link.h" 25 #include "dp_panel.h" 26 #include "dp_display.h" 27 #include "dp_drm.h" 28 #include "dp_audio.h" 29 #include "dp_debug.h" 30 31 static bool psr_enabled = false; 32 module_param(psr_enabled, bool, 0); 33 MODULE_PARM_DESC(psr_enabled, "enable PSR for eDP and DP displays"); 34 35 #define HPD_STRING_SIZE 30 36 37 enum { 38 ISR_DISCONNECTED, 39 ISR_CONNECT_PENDING, 40 ISR_CONNECTED, 41 ISR_HPD_REPLUG_COUNT, 42 ISR_IRQ_HPD_PULSE_COUNT, 43 ISR_HPD_LO_GLITH_COUNT, 44 }; 45 46 /* event thread connection state */ 47 enum { 48 ST_DISCONNECTED, 49 ST_MAINLINK_READY, 50 ST_CONNECTED, 51 ST_DISCONNECT_PENDING, 52 ST_DISPLAY_OFF, 53 }; 54 55 enum { 56 EV_NO_EVENT, 57 /* hpd events */ 58 EV_HPD_PLUG_INT, 59 EV_IRQ_HPD_INT, 60 EV_HPD_UNPLUG_INT, 61 EV_USER_NOTIFICATION, 62 }; 63 64 #define EVENT_TIMEOUT (HZ/10) /* 100ms */ 65 #define DP_EVENT_Q_MAX 8 66 67 #define DP_TIMEOUT_NONE 0 68 69 #define WAIT_FOR_RESUME_TIMEOUT_JIFFIES (HZ / 2) 70 71 struct msm_dp_event { 72 u32 event_id; 73 u32 data; 74 u32 delay; 75 }; 76 77 struct msm_dp_display_private { 78 int irq; 79 80 unsigned int id; 81 82 /* state variables */ 83 bool core_initialized; 84 bool phy_initialized; 85 bool audio_supported; 86 87 struct drm_device *drm_dev; 88 89 struct drm_dp_aux *aux; 90 struct msm_dp_link *link; 91 struct msm_dp_panel *panel; 92 struct msm_dp_ctrl *ctrl; 93 94 struct msm_dp_display_mode msm_dp_mode; 95 struct msm_dp msm_dp_display; 96 97 /* wait for audio signaling */ 98 struct completion audio_comp; 99 100 /* event related only access by event thread */ 101 struct mutex event_mutex; 102 wait_queue_head_t event_q; 103 u32 hpd_state; 104 u32 event_pndx; 105 u32 event_gndx; 106 struct task_struct *ev_tsk; 107 struct msm_dp_event event_list[DP_EVENT_Q_MAX]; 108 spinlock_t event_lock; 109 110 bool wide_bus_supported; 111 112 struct msm_dp_audio *audio; 113 114 void __iomem *ahb_base; 115 size_t ahb_len; 116 117 void __iomem *aux_base; 118 size_t aux_len; 119 120 void __iomem *link_base; 121 size_t link_len; 122 123 void __iomem *p0_base; 124 size_t p0_len; 125 }; 126 127 struct msm_dp_desc { 128 phys_addr_t io_start; 129 unsigned int id; 130 bool wide_bus_supported; 131 }; 132 133 static const struct msm_dp_desc msm_dp_desc_glymur[] = { 134 { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 135 { .io_start = 0x0af5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 136 { .io_start = 0x0af64000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 137 { .io_start = 0x0af6c000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true }, 138 {} 139 }; 140 141 static const struct msm_dp_desc msm_dp_desc_sa8775p[] = { 142 { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 143 { .io_start = 0x0af5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 144 { .io_start = 0x22154000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 145 { .io_start = 0x2215c000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true }, 146 {} 147 }; 148 149 static const struct msm_dp_desc msm_dp_desc_sdm845[] = { 150 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0 }, 151 {} 152 }; 153 154 static const struct msm_dp_desc msm_dp_desc_sc7180[] = { 155 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 156 {} 157 }; 158 159 static const struct msm_dp_desc msm_dp_desc_sc7280[] = { 160 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 161 { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 162 {} 163 }; 164 165 static const struct msm_dp_desc msm_dp_desc_sc8180x[] = { 166 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 167 { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 168 { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 169 {} 170 }; 171 172 static const struct msm_dp_desc msm_dp_desc_sc8280xp[] = { 173 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 174 { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 175 { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 176 { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true }, 177 { .io_start = 0x22090000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 178 { .io_start = 0x22098000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 179 { .io_start = 0x2209a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 180 { .io_start = 0x220a0000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true }, 181 {} 182 }; 183 184 static const struct msm_dp_desc msm_dp_desc_sm8650[] = { 185 { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 186 {} 187 }; 188 189 static const struct msm_dp_desc msm_dp_desc_x1e80100[] = { 190 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, 191 { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, 192 { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, 193 { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true }, 194 {} 195 }; 196 197 static const struct of_device_id msm_dp_dt_match[] = { 198 { .compatible = "qcom,glymur-dp", .data = &msm_dp_desc_glymur }, 199 { .compatible = "qcom,sa8775p-dp", .data = &msm_dp_desc_sa8775p }, 200 { .compatible = "qcom,sc7180-dp", .data = &msm_dp_desc_sc7180 }, 201 { .compatible = "qcom,sc7280-dp", .data = &msm_dp_desc_sc7280 }, 202 { .compatible = "qcom,sc7280-edp", .data = &msm_dp_desc_sc7280 }, 203 { .compatible = "qcom,sc8180x-dp", .data = &msm_dp_desc_sc8180x }, 204 { .compatible = "qcom,sc8180x-edp", .data = &msm_dp_desc_sc8180x }, 205 { .compatible = "qcom,sc8280xp-dp", .data = &msm_dp_desc_sc8280xp }, 206 { .compatible = "qcom,sc8280xp-edp", .data = &msm_dp_desc_sc8280xp }, 207 { .compatible = "qcom,sdm845-dp", .data = &msm_dp_desc_sdm845 }, 208 { .compatible = "qcom,sm8350-dp", .data = &msm_dp_desc_sc7180 }, 209 { .compatible = "qcom,sm8650-dp", .data = &msm_dp_desc_sm8650 }, 210 { .compatible = "qcom,x1e80100-dp", .data = &msm_dp_desc_x1e80100 }, 211 {} 212 }; 213 214 static struct msm_dp_display_private *dev_get_dp_display_private(struct device *dev) 215 { 216 struct msm_dp *dp = dev_get_drvdata(dev); 217 218 return container_of(dp, struct msm_dp_display_private, msm_dp_display); 219 } 220 221 static int msm_dp_add_event(struct msm_dp_display_private *msm_dp_priv, u32 event, 222 u32 data, u32 delay) 223 { 224 unsigned long flag; 225 struct msm_dp_event *todo; 226 int pndx; 227 228 spin_lock_irqsave(&msm_dp_priv->event_lock, flag); 229 pndx = msm_dp_priv->event_pndx + 1; 230 pndx %= DP_EVENT_Q_MAX; 231 if (pndx == msm_dp_priv->event_gndx) { 232 pr_err("event_q is full: pndx=%d gndx=%d\n", 233 msm_dp_priv->event_pndx, msm_dp_priv->event_gndx); 234 spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag); 235 return -EPERM; 236 } 237 todo = &msm_dp_priv->event_list[msm_dp_priv->event_pndx++]; 238 msm_dp_priv->event_pndx %= DP_EVENT_Q_MAX; 239 todo->event_id = event; 240 todo->data = data; 241 todo->delay = delay; 242 wake_up(&msm_dp_priv->event_q); 243 spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag); 244 245 return 0; 246 } 247 248 static int msm_dp_del_event(struct msm_dp_display_private *msm_dp_priv, u32 event) 249 { 250 unsigned long flag; 251 struct msm_dp_event *todo; 252 u32 gndx; 253 254 spin_lock_irqsave(&msm_dp_priv->event_lock, flag); 255 if (msm_dp_priv->event_pndx == msm_dp_priv->event_gndx) { 256 spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag); 257 return -ENOENT; 258 } 259 260 gndx = msm_dp_priv->event_gndx; 261 while (msm_dp_priv->event_pndx != gndx) { 262 todo = &msm_dp_priv->event_list[gndx]; 263 if (todo->event_id == event) { 264 todo->event_id = EV_NO_EVENT; /* deleted */ 265 todo->delay = 0; 266 } 267 gndx++; 268 gndx %= DP_EVENT_Q_MAX; 269 } 270 spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag); 271 272 return 0; 273 } 274 275 void msm_dp_display_signal_audio_start(struct msm_dp *msm_dp_display) 276 { 277 struct msm_dp_display_private *dp; 278 279 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 280 281 reinit_completion(&dp->audio_comp); 282 } 283 284 void msm_dp_display_signal_audio_complete(struct msm_dp *msm_dp_display) 285 { 286 struct msm_dp_display_private *dp; 287 288 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 289 290 complete_all(&dp->audio_comp); 291 } 292 293 static int msm_dp_hpd_event_thread_start(struct msm_dp_display_private *msm_dp_priv); 294 295 static int msm_dp_display_bind(struct device *dev, struct device *master, 296 void *data) 297 { 298 int rc = 0; 299 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 300 struct msm_drm_private *priv = dev_get_drvdata(master); 301 struct drm_device *drm = priv->dev; 302 303 dp->msm_dp_display.drm_dev = drm; 304 priv->kms->dp[dp->id] = &dp->msm_dp_display; 305 306 dp->drm_dev = drm; 307 dp->aux->drm_dev = drm; 308 rc = msm_dp_aux_register(dp->aux); 309 if (rc) { 310 DRM_ERROR("DRM DP AUX register failed\n"); 311 goto end; 312 } 313 314 rc = msm_dp_hpd_event_thread_start(dp); 315 if (rc) { 316 DRM_ERROR("Event thread create failed\n"); 317 goto end; 318 } 319 320 return 0; 321 end: 322 return rc; 323 } 324 325 static void msm_dp_display_unbind(struct device *dev, struct device *master, 326 void *data) 327 { 328 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 329 struct msm_drm_private *priv = dev_get_drvdata(master); 330 331 kthread_stop(dp->ev_tsk); 332 333 of_dp_aux_depopulate_bus(dp->aux); 334 335 msm_dp_aux_unregister(dp->aux); 336 dp->drm_dev = NULL; 337 dp->aux->drm_dev = NULL; 338 priv->kms->dp[dp->id] = NULL; 339 } 340 341 static const struct component_ops msm_dp_display_comp_ops = { 342 .bind = msm_dp_display_bind, 343 .unbind = msm_dp_display_unbind, 344 }; 345 346 static void msm_dp_display_send_hpd_event(struct msm_dp *msm_dp_display) 347 { 348 struct msm_dp_display_private *dp; 349 struct drm_connector *connector; 350 351 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 352 353 connector = dp->msm_dp_display.connector; 354 drm_helper_hpd_irq_event(connector->dev); 355 } 356 357 static int msm_dp_display_send_hpd_notification(struct msm_dp_display_private *dp, 358 bool hpd) 359 { 360 if ((hpd && dp->msm_dp_display.link_ready) || 361 (!hpd && !dp->msm_dp_display.link_ready)) { 362 drm_dbg_dp(dp->drm_dev, "HPD already %s\n", str_on_off(hpd)); 363 return 0; 364 } 365 366 /* reset video pattern flag on disconnect */ 367 if (!hpd) { 368 dp->panel->video_test = false; 369 if (!dp->msm_dp_display.is_edp) 370 drm_dp_set_subconnector_property(dp->msm_dp_display.connector, 371 connector_status_disconnected, 372 dp->panel->dpcd, 373 dp->panel->downstream_ports); 374 } 375 376 dp->msm_dp_display.link_ready = hpd; 377 378 drm_dbg_dp(dp->drm_dev, "type=%d hpd=%d\n", 379 dp->msm_dp_display.connector_type, hpd); 380 msm_dp_display_send_hpd_event(&dp->msm_dp_display); 381 382 return 0; 383 } 384 385 static int msm_dp_display_lttpr_init(struct msm_dp_display_private *dp, u8 *dpcd) 386 { 387 int rc, lttpr_count; 388 389 if (drm_dp_read_lttpr_common_caps(dp->aux, dpcd, dp->link->lttpr_common_caps)) 390 return 0; 391 392 lttpr_count = drm_dp_lttpr_count(dp->link->lttpr_common_caps); 393 rc = drm_dp_lttpr_init(dp->aux, lttpr_count); 394 if (rc) { 395 DRM_ERROR("failed to set LTTPRs transparency mode, rc=%d\n", rc); 396 return 0; 397 } 398 399 return lttpr_count; 400 } 401 402 static int msm_dp_display_process_hpd_high(struct msm_dp_display_private *dp) 403 { 404 struct drm_connector *connector = dp->msm_dp_display.connector; 405 const struct drm_display_info *info = &connector->display_info; 406 int rc = 0; 407 u8 dpcd[DP_RECEIVER_CAP_SIZE]; 408 409 rc = drm_dp_read_dpcd_caps(dp->aux, dpcd); 410 if (rc) 411 goto end; 412 413 dp->link->lttpr_count = msm_dp_display_lttpr_init(dp, dpcd); 414 415 rc = msm_dp_panel_read_sink_caps(dp->panel, connector); 416 if (rc) 417 goto end; 418 419 msm_dp_link_process_request(dp->link); 420 421 if (!dp->msm_dp_display.is_edp) 422 drm_dp_set_subconnector_property(connector, 423 connector_status_connected, 424 dp->panel->dpcd, 425 dp->panel->downstream_ports); 426 427 dp->msm_dp_display.psr_supported = dp->panel->psr_cap.version && psr_enabled; 428 429 dp->audio_supported = info->has_audio; 430 msm_dp_panel_handle_sink_request(dp->panel); 431 432 /* 433 * set sink to normal operation mode -- D0 434 * before dpcd read 435 */ 436 msm_dp_link_psm_config(dp->link, &dp->panel->link_info, false); 437 438 msm_dp_link_reset_phy_params_vx_px(dp->link); 439 rc = msm_dp_ctrl_on_link(dp->ctrl); 440 if (rc) { 441 DRM_ERROR("failed to complete DP link training\n"); 442 goto end; 443 } 444 445 msm_dp_add_event(dp, EV_USER_NOTIFICATION, true, 0); 446 447 end: 448 return rc; 449 } 450 451 static void msm_dp_display_host_phy_init(struct msm_dp_display_private *dp) 452 { 453 drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 454 dp->msm_dp_display.connector_type, dp->core_initialized, 455 dp->phy_initialized); 456 457 if (!dp->phy_initialized) { 458 msm_dp_ctrl_phy_init(dp->ctrl); 459 dp->phy_initialized = true; 460 } 461 } 462 463 static void msm_dp_display_host_phy_exit(struct msm_dp_display_private *dp) 464 { 465 drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 466 dp->msm_dp_display.connector_type, dp->core_initialized, 467 dp->phy_initialized); 468 469 if (dp->phy_initialized) { 470 msm_dp_ctrl_phy_exit(dp->ctrl); 471 dp->phy_initialized = false; 472 } 473 } 474 475 static void msm_dp_display_host_init(struct msm_dp_display_private *dp) 476 { 477 drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 478 dp->msm_dp_display.connector_type, dp->core_initialized, 479 dp->phy_initialized); 480 481 msm_dp_ctrl_core_clk_enable(dp->ctrl); 482 msm_dp_ctrl_reset(dp->ctrl); 483 msm_dp_ctrl_enable_irq(dp->ctrl); 484 msm_dp_aux_init(dp->aux); 485 dp->core_initialized = true; 486 } 487 488 static void msm_dp_display_host_deinit(struct msm_dp_display_private *dp) 489 { 490 drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 491 dp->msm_dp_display.connector_type, dp->core_initialized, 492 dp->phy_initialized); 493 494 msm_dp_ctrl_reset(dp->ctrl); 495 msm_dp_ctrl_disable_irq(dp->ctrl); 496 msm_dp_aux_deinit(dp->aux); 497 msm_dp_ctrl_core_clk_disable(dp->ctrl); 498 dp->core_initialized = false; 499 } 500 501 static int msm_dp_display_usbpd_configure_cb(struct device *dev) 502 { 503 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 504 505 msm_dp_display_host_phy_init(dp); 506 507 return msm_dp_display_process_hpd_high(dp); 508 } 509 510 static int msm_dp_display_notify_disconnect(struct device *dev) 511 { 512 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 513 514 msm_dp_add_event(dp, EV_USER_NOTIFICATION, false, 0); 515 516 return 0; 517 } 518 519 static void msm_dp_display_handle_video_request(struct msm_dp_display_private *dp) 520 { 521 if (dp->link->sink_request & DP_TEST_LINK_VIDEO_PATTERN) { 522 dp->panel->video_test = true; 523 msm_dp_link_send_test_response(dp->link); 524 } 525 } 526 527 static int msm_dp_display_handle_port_status_changed(struct msm_dp_display_private *dp) 528 { 529 int rc = 0; 530 531 if (drm_dp_is_branch(dp->panel->dpcd) && dp->link->sink_count == 0) { 532 drm_dbg_dp(dp->drm_dev, "sink count is zero, nothing to do\n"); 533 if (dp->hpd_state != ST_DISCONNECTED) { 534 dp->hpd_state = ST_DISCONNECT_PENDING; 535 msm_dp_add_event(dp, EV_USER_NOTIFICATION, false, 0); 536 } 537 } else { 538 if (dp->hpd_state == ST_DISCONNECTED) { 539 dp->hpd_state = ST_MAINLINK_READY; 540 rc = msm_dp_display_process_hpd_high(dp); 541 if (rc) 542 dp->hpd_state = ST_DISCONNECTED; 543 } 544 } 545 546 return rc; 547 } 548 549 static int msm_dp_display_handle_irq_hpd(struct msm_dp_display_private *dp) 550 { 551 u32 sink_request = dp->link->sink_request; 552 553 drm_dbg_dp(dp->drm_dev, "%d\n", sink_request); 554 if (dp->hpd_state == ST_DISCONNECTED) { 555 if (sink_request & DP_LINK_STATUS_UPDATED) { 556 drm_dbg_dp(dp->drm_dev, "Disconnected sink_request: %d\n", 557 sink_request); 558 DRM_ERROR("Disconnected, no DP_LINK_STATUS_UPDATED\n"); 559 return -EINVAL; 560 } 561 } 562 563 msm_dp_ctrl_handle_sink_request(dp->ctrl); 564 565 if (sink_request & DP_TEST_LINK_VIDEO_PATTERN) 566 msm_dp_display_handle_video_request(dp); 567 568 return 0; 569 } 570 571 static int msm_dp_display_usbpd_attention_cb(struct device *dev) 572 { 573 int rc = 0; 574 u32 sink_request; 575 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 576 577 /* check for any test request issued by sink */ 578 rc = msm_dp_link_process_request(dp->link); 579 if (!rc) { 580 sink_request = dp->link->sink_request; 581 drm_dbg_dp(dp->drm_dev, "hpd_state=%d sink_request=%d\n", 582 dp->hpd_state, sink_request); 583 if (sink_request & DS_PORT_STATUS_CHANGED) 584 rc = msm_dp_display_handle_port_status_changed(dp); 585 else 586 rc = msm_dp_display_handle_irq_hpd(dp); 587 } 588 589 return rc; 590 } 591 592 static int msm_dp_hpd_plug_handle(struct msm_dp_display_private *dp, u32 data) 593 { 594 u32 state; 595 int ret; 596 struct platform_device *pdev = dp->msm_dp_display.pdev; 597 598 msm_dp_aux_enable_xfers(dp->aux, true); 599 600 mutex_lock(&dp->event_mutex); 601 602 state = dp->hpd_state; 603 drm_dbg_dp(dp->drm_dev, "Before, type=%d hpd_state=%d\n", 604 dp->msm_dp_display.connector_type, state); 605 606 if (state == ST_DISPLAY_OFF) { 607 mutex_unlock(&dp->event_mutex); 608 return 0; 609 } 610 611 if (state == ST_MAINLINK_READY || state == ST_CONNECTED) { 612 mutex_unlock(&dp->event_mutex); 613 return 0; 614 } 615 616 if (state == ST_DISCONNECT_PENDING) { 617 /* wait until ST_DISCONNECTED */ 618 msm_dp_add_event(dp, EV_HPD_PLUG_INT, 0, 1); /* delay = 1 */ 619 mutex_unlock(&dp->event_mutex); 620 return 0; 621 } 622 623 ret = pm_runtime_resume_and_get(&pdev->dev); 624 if (ret) { 625 DRM_ERROR("failed to pm_runtime_resume\n"); 626 mutex_unlock(&dp->event_mutex); 627 return ret; 628 } 629 630 ret = msm_dp_display_usbpd_configure_cb(&pdev->dev); 631 if (ret) { /* link train failed */ 632 dp->hpd_state = ST_DISCONNECTED; 633 pm_runtime_put_sync(&pdev->dev); 634 } else { 635 dp->hpd_state = ST_MAINLINK_READY; 636 } 637 638 drm_dbg_dp(dp->drm_dev, "After, type=%d hpd_state=%d\n", 639 dp->msm_dp_display.connector_type, state); 640 mutex_unlock(&dp->event_mutex); 641 642 /* uevent will complete connection part */ 643 return 0; 644 }; 645 646 static void msm_dp_display_handle_plugged_change(struct msm_dp *msm_dp_display, 647 bool plugged) 648 { 649 struct msm_dp_display_private *dp; 650 651 dp = container_of(msm_dp_display, 652 struct msm_dp_display_private, msm_dp_display); 653 654 /* notify audio subsystem only if sink supports audio */ 655 if (dp->audio_supported) 656 drm_connector_hdmi_audio_plugged_notify(msm_dp_display->connector, 657 plugged); 658 } 659 660 static int msm_dp_hpd_unplug_handle(struct msm_dp_display_private *dp, u32 data) 661 { 662 u32 state; 663 struct platform_device *pdev = dp->msm_dp_display.pdev; 664 665 msm_dp_aux_enable_xfers(dp->aux, false); 666 667 mutex_lock(&dp->event_mutex); 668 669 state = dp->hpd_state; 670 671 drm_dbg_dp(dp->drm_dev, "Before, type=%d hpd_state=%d\n", 672 dp->msm_dp_display.connector_type, state); 673 674 /* unplugged, no more irq_hpd handle */ 675 msm_dp_del_event(dp, EV_IRQ_HPD_INT); 676 677 if (state == ST_DISCONNECTED) { 678 /* triggered by irq_hdp with sink_count = 0 */ 679 if (dp->link->sink_count == 0) { 680 msm_dp_display_host_phy_exit(dp); 681 } 682 msm_dp_display_notify_disconnect(&dp->msm_dp_display.pdev->dev); 683 mutex_unlock(&dp->event_mutex); 684 return 0; 685 } else if (state == ST_DISCONNECT_PENDING) { 686 mutex_unlock(&dp->event_mutex); 687 return 0; 688 } else if (state == ST_MAINLINK_READY) { 689 msm_dp_ctrl_off_link(dp->ctrl); 690 msm_dp_display_host_phy_exit(dp); 691 dp->hpd_state = ST_DISCONNECTED; 692 msm_dp_display_notify_disconnect(&dp->msm_dp_display.pdev->dev); 693 pm_runtime_put_sync(&pdev->dev); 694 mutex_unlock(&dp->event_mutex); 695 return 0; 696 } 697 698 /* 699 * We don't need separate work for disconnect as 700 * connect/attention interrupts are disabled 701 */ 702 msm_dp_display_notify_disconnect(&dp->msm_dp_display.pdev->dev); 703 704 if (state == ST_DISPLAY_OFF) { 705 dp->hpd_state = ST_DISCONNECTED; 706 } else { 707 dp->hpd_state = ST_DISCONNECT_PENDING; 708 } 709 710 /* signal the disconnect event early to ensure proper teardown */ 711 msm_dp_display_handle_plugged_change(&dp->msm_dp_display, false); 712 713 drm_dbg_dp(dp->drm_dev, "After, type=%d hpd_state=%d\n", 714 dp->msm_dp_display.connector_type, state); 715 716 /* uevent will complete disconnection part */ 717 pm_runtime_put_sync(&pdev->dev); 718 mutex_unlock(&dp->event_mutex); 719 return 0; 720 } 721 722 static int msm_dp_irq_hpd_handle(struct msm_dp_display_private *dp, u32 data) 723 { 724 u32 state; 725 726 mutex_lock(&dp->event_mutex); 727 728 /* irq_hpd can happen at either connected or disconnected state */ 729 state = dp->hpd_state; 730 drm_dbg_dp(dp->drm_dev, "Before, type=%d hpd_state=%d\n", 731 dp->msm_dp_display.connector_type, state); 732 733 if (state == ST_DISPLAY_OFF) { 734 mutex_unlock(&dp->event_mutex); 735 return 0; 736 } 737 738 if (state == ST_MAINLINK_READY || state == ST_DISCONNECT_PENDING) { 739 /* wait until ST_CONNECTED */ 740 msm_dp_add_event(dp, EV_IRQ_HPD_INT, 0, 1); /* delay = 1 */ 741 mutex_unlock(&dp->event_mutex); 742 return 0; 743 } 744 745 msm_dp_display_usbpd_attention_cb(&dp->msm_dp_display.pdev->dev); 746 747 drm_dbg_dp(dp->drm_dev, "After, type=%d hpd_state=%d\n", 748 dp->msm_dp_display.connector_type, state); 749 750 mutex_unlock(&dp->event_mutex); 751 752 return 0; 753 } 754 755 static void msm_dp_display_deinit_sub_modules(struct msm_dp_display_private *dp) 756 { 757 msm_dp_audio_put(dp->audio); 758 msm_dp_panel_put(dp->panel); 759 msm_dp_aux_put(dp->aux); 760 } 761 762 static int msm_dp_init_sub_modules(struct msm_dp_display_private *dp) 763 { 764 int rc = 0; 765 struct device *dev = &dp->msm_dp_display.pdev->dev; 766 struct phy *phy; 767 768 phy = devm_phy_get(dev, "dp"); 769 if (IS_ERR(phy)) 770 return PTR_ERR(phy); 771 772 rc = phy_set_mode_ext(phy, PHY_MODE_DP, 773 dp->msm_dp_display.is_edp ? PHY_SUBMODE_EDP : PHY_SUBMODE_DP); 774 if (rc) { 775 DRM_ERROR("failed to set phy submode, rc = %d\n", rc); 776 goto error; 777 } 778 779 dp->aux = msm_dp_aux_get(dev, phy, dp->msm_dp_display.is_edp, dp->aux_base); 780 if (IS_ERR(dp->aux)) { 781 rc = PTR_ERR(dp->aux); 782 DRM_ERROR("failed to initialize aux, rc = %d\n", rc); 783 dp->aux = NULL; 784 goto error; 785 } 786 787 dp->link = msm_dp_link_get(dev, dp->aux); 788 if (IS_ERR(dp->link)) { 789 rc = PTR_ERR(dp->link); 790 DRM_ERROR("failed to initialize link, rc = %d\n", rc); 791 dp->link = NULL; 792 goto error_link; 793 } 794 795 dp->panel = msm_dp_panel_get(dev, dp->aux, dp->link, dp->link_base, dp->p0_base); 796 if (IS_ERR(dp->panel)) { 797 rc = PTR_ERR(dp->panel); 798 DRM_ERROR("failed to initialize panel, rc = %d\n", rc); 799 dp->panel = NULL; 800 goto error_link; 801 } 802 803 dp->ctrl = msm_dp_ctrl_get(dev, dp->link, dp->panel, dp->aux, 804 phy, dp->ahb_base, dp->link_base); 805 if (IS_ERR(dp->ctrl)) { 806 rc = PTR_ERR(dp->ctrl); 807 DRM_ERROR("failed to initialize ctrl, rc = %d\n", rc); 808 dp->ctrl = NULL; 809 goto error_ctrl; 810 } 811 812 dp->audio = msm_dp_audio_get(dp->msm_dp_display.pdev, dp->link_base); 813 if (IS_ERR(dp->audio)) { 814 rc = PTR_ERR(dp->audio); 815 pr_err("failed to initialize audio, rc = %d\n", rc); 816 dp->audio = NULL; 817 goto error_ctrl; 818 } 819 820 return rc; 821 822 error_ctrl: 823 msm_dp_panel_put(dp->panel); 824 error_link: 825 msm_dp_aux_put(dp->aux); 826 error: 827 return rc; 828 } 829 830 static int msm_dp_display_set_mode(struct msm_dp *msm_dp_display, 831 struct msm_dp_display_mode *mode) 832 { 833 struct msm_dp_display_private *dp; 834 835 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 836 837 drm_mode_copy(&dp->panel->msm_dp_mode.drm_mode, &mode->drm_mode); 838 dp->panel->msm_dp_mode.bpp = mode->bpp; 839 dp->panel->msm_dp_mode.out_fmt_is_yuv_420 = mode->out_fmt_is_yuv_420; 840 msm_dp_panel_init_panel_info(dp->panel); 841 return 0; 842 } 843 844 static int msm_dp_display_enable(struct msm_dp_display_private *dp, bool force_link_train) 845 { 846 int rc = 0; 847 struct msm_dp *msm_dp_display = &dp->msm_dp_display; 848 849 drm_dbg_dp(dp->drm_dev, "sink_count=%d\n", dp->link->sink_count); 850 if (msm_dp_display->power_on) { 851 drm_dbg_dp(dp->drm_dev, "Link already setup, return\n"); 852 return 0; 853 } 854 855 rc = msm_dp_ctrl_on_stream(dp->ctrl, force_link_train); 856 if (!rc) 857 msm_dp_display->power_on = true; 858 859 return rc; 860 } 861 862 static int msm_dp_display_post_enable(struct msm_dp *msm_dp_display) 863 { 864 struct msm_dp_display_private *dp; 865 u32 rate; 866 867 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 868 869 rate = dp->link->link_params.rate; 870 871 if (dp->audio_supported) { 872 dp->audio->bw_code = drm_dp_link_rate_to_bw_code(rate); 873 dp->audio->lane_count = dp->link->link_params.num_lanes; 874 } 875 876 /* signal the connect event late to synchronize video and display */ 877 msm_dp_display_handle_plugged_change(msm_dp_display, true); 878 879 if (msm_dp_display->psr_supported) 880 msm_dp_ctrl_config_psr(dp->ctrl); 881 882 return 0; 883 } 884 885 static int msm_dp_display_disable(struct msm_dp_display_private *dp) 886 { 887 struct msm_dp *msm_dp_display = &dp->msm_dp_display; 888 889 if (!msm_dp_display->power_on) 890 return 0; 891 892 /* wait only if audio was enabled */ 893 if (msm_dp_display->audio_enabled) { 894 /* signal the disconnect event */ 895 msm_dp_display_handle_plugged_change(msm_dp_display, false); 896 if (!wait_for_completion_timeout(&dp->audio_comp, 897 HZ * 5)) 898 DRM_ERROR("audio comp timeout\n"); 899 } 900 901 msm_dp_display->audio_enabled = false; 902 903 if (dp->link->sink_count == 0) { 904 /* 905 * irq_hpd with sink_count = 0 906 * hdmi unplugged out of dongle 907 */ 908 msm_dp_ctrl_off_link_stream(dp->ctrl); 909 } else { 910 /* 911 * unplugged interrupt 912 * dongle unplugged out of DUT 913 */ 914 msm_dp_ctrl_off(dp->ctrl); 915 msm_dp_display_host_phy_exit(dp); 916 } 917 918 msm_dp_display->power_on = false; 919 920 drm_dbg_dp(dp->drm_dev, "sink count: %d\n", dp->link->sink_count); 921 return 0; 922 } 923 924 /** 925 * msm_dp_bridge_mode_valid - callback to determine if specified mode is valid 926 * @bridge: Pointer to drm bridge structure 927 * @info: display info 928 * @mode: Pointer to drm mode structure 929 * Returns: Validity status for specified mode 930 */ 931 enum drm_mode_status msm_dp_bridge_mode_valid(struct drm_bridge *bridge, 932 const struct drm_display_info *info, 933 const struct drm_display_mode *mode) 934 { 935 const u32 num_components = 3, default_bpp = 24; 936 struct msm_dp_display_private *msm_dp_display; 937 struct msm_dp_link_info *link_info; 938 u32 mode_rate_khz = 0, supported_rate_khz = 0, mode_bpp = 0; 939 struct msm_dp *dp; 940 int mode_pclk_khz = mode->clock; 941 942 dp = to_dp_bridge(bridge)->msm_dp_display; 943 944 if (!dp || !mode_pclk_khz || !dp->connector) { 945 DRM_ERROR("invalid params\n"); 946 return -EINVAL; 947 } 948 949 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 950 link_info = &msm_dp_display->panel->link_info; 951 952 if ((drm_mode_is_420_only(&dp->connector->display_info, mode) && 953 msm_dp_display->panel->vsc_sdp_supported) || 954 msm_dp_wide_bus_available(dp)) 955 mode_pclk_khz /= 2; 956 957 if (mode_pclk_khz > DP_MAX_PIXEL_CLK_KHZ) 958 return MODE_CLOCK_HIGH; 959 960 mode_bpp = dp->connector->display_info.bpc * num_components; 961 if (!mode_bpp) 962 mode_bpp = default_bpp; 963 964 mode_bpp = msm_dp_panel_get_mode_bpp(msm_dp_display->panel, 965 mode_bpp, mode_pclk_khz); 966 967 mode_rate_khz = mode_pclk_khz * mode_bpp; 968 supported_rate_khz = link_info->num_lanes * link_info->rate * 8; 969 970 if (mode_rate_khz > supported_rate_khz) 971 return MODE_BAD; 972 973 return MODE_OK; 974 } 975 976 int msm_dp_display_get_modes(struct msm_dp *dp) 977 { 978 struct msm_dp_display_private *msm_dp_display; 979 980 if (!dp) { 981 DRM_ERROR("invalid params\n"); 982 return 0; 983 } 984 985 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 986 987 return msm_dp_panel_get_modes(msm_dp_display->panel, 988 dp->connector); 989 } 990 991 bool msm_dp_display_check_video_test(struct msm_dp *dp) 992 { 993 struct msm_dp_display_private *msm_dp_display; 994 995 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 996 997 return msm_dp_display->panel->video_test; 998 } 999 1000 int msm_dp_display_get_test_bpp(struct msm_dp *dp) 1001 { 1002 struct msm_dp_display_private *msm_dp_display; 1003 1004 if (!dp) { 1005 DRM_ERROR("invalid params\n"); 1006 return 0; 1007 } 1008 1009 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 1010 1011 return msm_dp_link_bit_depth_to_bpp( 1012 msm_dp_display->link->test_video.test_bit_depth); 1013 } 1014 1015 void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp) 1016 { 1017 struct msm_dp_display_private *msm_dp_display; 1018 1019 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 1020 1021 /* 1022 * if we are reading registers we need the link clocks to be on 1023 * however till DP cable is connected this will not happen as we 1024 * do not know the resolution to power up with. Hence check the 1025 * power_on status before dumping DP registers to avoid crash due 1026 * to unclocked access 1027 */ 1028 mutex_lock(&msm_dp_display->event_mutex); 1029 1030 if (!dp->power_on) { 1031 mutex_unlock(&msm_dp_display->event_mutex); 1032 return; 1033 } 1034 1035 msm_disp_snapshot_add_block(disp_state, msm_dp_display->ahb_len, 1036 msm_dp_display->ahb_base, "dp_ahb"); 1037 msm_disp_snapshot_add_block(disp_state, msm_dp_display->aux_len, 1038 msm_dp_display->aux_base, "dp_aux"); 1039 msm_disp_snapshot_add_block(disp_state, msm_dp_display->link_len, 1040 msm_dp_display->link_base, "dp_link"); 1041 msm_disp_snapshot_add_block(disp_state, msm_dp_display->p0_len, 1042 msm_dp_display->p0_base, "dp_p0"); 1043 1044 mutex_unlock(&msm_dp_display->event_mutex); 1045 } 1046 1047 void msm_dp_display_set_psr(struct msm_dp *msm_dp_display, bool enter) 1048 { 1049 struct msm_dp_display_private *dp; 1050 1051 if (!msm_dp_display) { 1052 DRM_ERROR("invalid params\n"); 1053 return; 1054 } 1055 1056 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1057 msm_dp_ctrl_set_psr(dp->ctrl, enter); 1058 } 1059 1060 static int hpd_event_thread(void *data) 1061 { 1062 struct msm_dp_display_private *msm_dp_priv; 1063 unsigned long flag; 1064 struct msm_dp_event *todo; 1065 int timeout_mode = 0; 1066 1067 msm_dp_priv = (struct msm_dp_display_private *)data; 1068 1069 while (1) { 1070 if (timeout_mode) { 1071 wait_event_timeout(msm_dp_priv->event_q, 1072 (msm_dp_priv->event_pndx == msm_dp_priv->event_gndx) || 1073 kthread_should_stop(), EVENT_TIMEOUT); 1074 } else { 1075 wait_event_interruptible(msm_dp_priv->event_q, 1076 (msm_dp_priv->event_pndx != msm_dp_priv->event_gndx) || 1077 kthread_should_stop()); 1078 } 1079 1080 if (kthread_should_stop()) 1081 break; 1082 1083 spin_lock_irqsave(&msm_dp_priv->event_lock, flag); 1084 todo = &msm_dp_priv->event_list[msm_dp_priv->event_gndx]; 1085 if (todo->delay) { 1086 struct msm_dp_event *todo_next; 1087 1088 msm_dp_priv->event_gndx++; 1089 msm_dp_priv->event_gndx %= DP_EVENT_Q_MAX; 1090 1091 /* re enter delay event into q */ 1092 todo_next = &msm_dp_priv->event_list[msm_dp_priv->event_pndx++]; 1093 msm_dp_priv->event_pndx %= DP_EVENT_Q_MAX; 1094 todo_next->event_id = todo->event_id; 1095 todo_next->data = todo->data; 1096 todo_next->delay = todo->delay - 1; 1097 1098 /* clean up older event */ 1099 todo->event_id = EV_NO_EVENT; 1100 todo->delay = 0; 1101 1102 /* switch to timeout mode */ 1103 timeout_mode = 1; 1104 spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag); 1105 continue; 1106 } 1107 1108 /* timeout with no events in q */ 1109 if (msm_dp_priv->event_pndx == msm_dp_priv->event_gndx) { 1110 spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag); 1111 continue; 1112 } 1113 1114 msm_dp_priv->event_gndx++; 1115 msm_dp_priv->event_gndx %= DP_EVENT_Q_MAX; 1116 timeout_mode = 0; 1117 spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag); 1118 1119 switch (todo->event_id) { 1120 case EV_HPD_PLUG_INT: 1121 msm_dp_hpd_plug_handle(msm_dp_priv, todo->data); 1122 break; 1123 case EV_HPD_UNPLUG_INT: 1124 msm_dp_hpd_unplug_handle(msm_dp_priv, todo->data); 1125 break; 1126 case EV_IRQ_HPD_INT: 1127 msm_dp_irq_hpd_handle(msm_dp_priv, todo->data); 1128 break; 1129 case EV_USER_NOTIFICATION: 1130 msm_dp_display_send_hpd_notification(msm_dp_priv, 1131 todo->data); 1132 break; 1133 default: 1134 break; 1135 } 1136 } 1137 1138 return 0; 1139 } 1140 1141 static int msm_dp_hpd_event_thread_start(struct msm_dp_display_private *msm_dp_priv) 1142 { 1143 /* set event q to empty */ 1144 msm_dp_priv->event_gndx = 0; 1145 msm_dp_priv->event_pndx = 0; 1146 1147 msm_dp_priv->ev_tsk = kthread_run(hpd_event_thread, msm_dp_priv, "dp_hpd_handler"); 1148 if (IS_ERR(msm_dp_priv->ev_tsk)) 1149 return PTR_ERR(msm_dp_priv->ev_tsk); 1150 1151 return 0; 1152 } 1153 1154 static irqreturn_t msm_dp_display_irq_handler(int irq, void *dev_id) 1155 { 1156 struct msm_dp_display_private *dp = dev_id; 1157 irqreturn_t ret = IRQ_NONE; 1158 u32 hpd_isr_status; 1159 1160 if (!dp) { 1161 DRM_ERROR("invalid data\n"); 1162 return IRQ_NONE; 1163 } 1164 1165 hpd_isr_status = msm_dp_aux_get_hpd_intr_status(dp->aux); 1166 1167 if (hpd_isr_status & 0x0F) { 1168 drm_dbg_dp(dp->drm_dev, "type=%d isr=0x%x\n", 1169 dp->msm_dp_display.connector_type, hpd_isr_status); 1170 /* hpd related interrupts */ 1171 if (hpd_isr_status & DP_DP_HPD_PLUG_INT_MASK) 1172 msm_dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0); 1173 1174 if (hpd_isr_status & DP_DP_IRQ_HPD_INT_MASK) { 1175 msm_dp_add_event(dp, EV_IRQ_HPD_INT, 0, 0); 1176 } 1177 1178 if (hpd_isr_status & DP_DP_HPD_REPLUG_INT_MASK) { 1179 msm_dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0); 1180 msm_dp_add_event(dp, EV_HPD_PLUG_INT, 0, 3); 1181 } 1182 1183 if (hpd_isr_status & DP_DP_HPD_UNPLUG_INT_MASK) 1184 msm_dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0); 1185 1186 ret = IRQ_HANDLED; 1187 } 1188 1189 /* DP controller isr */ 1190 ret |= msm_dp_ctrl_isr(dp->ctrl); 1191 1192 return ret; 1193 } 1194 1195 static int msm_dp_display_request_irq(struct msm_dp_display_private *dp) 1196 { 1197 int rc = 0; 1198 struct platform_device *pdev = dp->msm_dp_display.pdev; 1199 1200 dp->irq = platform_get_irq(pdev, 0); 1201 if (dp->irq < 0) { 1202 DRM_ERROR("failed to get irq\n"); 1203 return dp->irq; 1204 } 1205 1206 rc = devm_request_irq(&pdev->dev, dp->irq, msm_dp_display_irq_handler, 1207 IRQF_TRIGGER_HIGH|IRQF_NO_AUTOEN, 1208 "dp_display_isr", dp); 1209 1210 if (rc < 0) { 1211 DRM_ERROR("failed to request IRQ%u: %d\n", 1212 dp->irq, rc); 1213 return rc; 1214 } 1215 1216 return 0; 1217 } 1218 1219 static const struct msm_dp_desc *msm_dp_display_get_desc(struct platform_device *pdev) 1220 { 1221 const struct msm_dp_desc *descs = of_device_get_match_data(&pdev->dev); 1222 struct resource *res; 1223 int i; 1224 1225 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1226 if (!res) 1227 return NULL; 1228 1229 for (i = 0; i < descs[i].io_start; i++) { 1230 if (descs[i].io_start == res->start) 1231 return &descs[i]; 1232 } 1233 1234 dev_err(&pdev->dev, "unknown displayport instance\n"); 1235 return NULL; 1236 } 1237 1238 static int msm_dp_display_probe_tail(struct device *dev) 1239 { 1240 struct msm_dp *dp = dev_get_drvdata(dev); 1241 int ret; 1242 1243 /* 1244 * External bridges are mandatory for eDP interfaces: one has to 1245 * provide at least an eDP panel (which gets wrapped into panel-bridge). 1246 * 1247 * For DisplayPort interfaces external bridges are optional, so 1248 * silently ignore an error if one is not present (-ENODEV). 1249 */ 1250 dp->next_bridge = devm_drm_of_get_bridge(&dp->pdev->dev, dp->pdev->dev.of_node, 1, 0); 1251 if (IS_ERR(dp->next_bridge)) { 1252 ret = PTR_ERR(dp->next_bridge); 1253 dp->next_bridge = NULL; 1254 if (dp->is_edp || ret != -ENODEV) 1255 return ret; 1256 } 1257 1258 ret = component_add(dev, &msm_dp_display_comp_ops); 1259 if (ret) 1260 DRM_ERROR("component add failed, rc=%d\n", ret); 1261 1262 return ret; 1263 } 1264 1265 static int msm_dp_auxbus_done_probe(struct drm_dp_aux *aux) 1266 { 1267 return msm_dp_display_probe_tail(aux->dev); 1268 } 1269 1270 static int msm_dp_display_get_connector_type(struct platform_device *pdev, 1271 const struct msm_dp_desc *desc) 1272 { 1273 struct device_node *node = pdev->dev.of_node; 1274 struct device_node *aux_bus = of_get_child_by_name(node, "aux-bus"); 1275 struct device_node *panel = of_get_child_by_name(aux_bus, "panel"); 1276 int connector_type; 1277 1278 if (panel) 1279 connector_type = DRM_MODE_CONNECTOR_eDP; 1280 else 1281 connector_type = DRM_MODE_SUBCONNECTOR_DisplayPort; 1282 1283 of_node_put(panel); 1284 of_node_put(aux_bus); 1285 1286 return connector_type; 1287 } 1288 1289 static void __iomem *msm_dp_ioremap(struct platform_device *pdev, int idx, size_t *len) 1290 { 1291 struct resource *res; 1292 void __iomem *base; 1293 1294 base = devm_platform_get_and_ioremap_resource(pdev, idx, &res); 1295 if (!IS_ERR(base)) 1296 *len = resource_size(res); 1297 1298 return base; 1299 } 1300 1301 #define DP_DEFAULT_AHB_OFFSET 0x0000 1302 #define DP_DEFAULT_AHB_SIZE 0x0200 1303 #define DP_DEFAULT_AUX_OFFSET 0x0200 1304 #define DP_DEFAULT_AUX_SIZE 0x0200 1305 #define DP_DEFAULT_LINK_OFFSET 0x0400 1306 #define DP_DEFAULT_LINK_SIZE 0x0C00 1307 #define DP_DEFAULT_P0_OFFSET 0x1000 1308 #define DP_DEFAULT_P0_SIZE 0x0400 1309 1310 static int msm_dp_display_get_io(struct msm_dp_display_private *display) 1311 { 1312 struct platform_device *pdev = display->msm_dp_display.pdev; 1313 1314 display->ahb_base = msm_dp_ioremap(pdev, 0, &display->ahb_len); 1315 if (IS_ERR(display->ahb_base)) 1316 return PTR_ERR(display->ahb_base); 1317 1318 display->aux_base = msm_dp_ioremap(pdev, 1, &display->aux_len); 1319 if (IS_ERR(display->aux_base)) { 1320 if (display->aux_base != ERR_PTR(-EINVAL)) { 1321 DRM_ERROR("unable to remap aux region: %pe\n", display->aux_base); 1322 return PTR_ERR(display->aux_base); 1323 } 1324 1325 /* 1326 * The initial binding had a single reg, but in order to 1327 * support variation in the sub-region sizes this was split. 1328 * msm_dp_ioremap() will fail with -EINVAL here if only a single 1329 * reg is specified, so fill in the sub-region offsets and 1330 * lengths based on this single region. 1331 */ 1332 if (display->ahb_len < DP_DEFAULT_P0_OFFSET + DP_DEFAULT_P0_SIZE) { 1333 DRM_ERROR("legacy memory region not large enough\n"); 1334 return -EINVAL; 1335 } 1336 1337 display->ahb_len = DP_DEFAULT_AHB_SIZE; 1338 display->aux_base = display->ahb_base + DP_DEFAULT_AUX_OFFSET; 1339 display->aux_len = DP_DEFAULT_AUX_SIZE; 1340 display->link_base = display->ahb_base + DP_DEFAULT_LINK_OFFSET; 1341 display->link_len = DP_DEFAULT_LINK_SIZE; 1342 display->p0_base = display->ahb_base + DP_DEFAULT_P0_OFFSET; 1343 display->p0_len = DP_DEFAULT_P0_SIZE; 1344 1345 return 0; 1346 } 1347 1348 display->link_base = msm_dp_ioremap(pdev, 2, &display->link_len); 1349 if (IS_ERR(display->link_base)) { 1350 DRM_ERROR("unable to remap link region: %pe\n", display->link_base); 1351 return PTR_ERR(display->link_base); 1352 } 1353 1354 display->p0_base = msm_dp_ioremap(pdev, 3, &display->p0_len); 1355 if (IS_ERR(display->p0_base)) { 1356 DRM_ERROR("unable to remap p0 region: %pe\n", display->p0_base); 1357 return PTR_ERR(display->p0_base); 1358 } 1359 1360 return 0; 1361 } 1362 1363 static int msm_dp_display_probe(struct platform_device *pdev) 1364 { 1365 int rc = 0; 1366 struct msm_dp_display_private *dp; 1367 const struct msm_dp_desc *desc; 1368 1369 if (!pdev || !pdev->dev.of_node) { 1370 DRM_ERROR("pdev not found\n"); 1371 return -ENODEV; 1372 } 1373 1374 dp = devm_kzalloc(&pdev->dev, sizeof(*dp), GFP_KERNEL); 1375 if (!dp) 1376 return -ENOMEM; 1377 1378 desc = msm_dp_display_get_desc(pdev); 1379 if (!desc) 1380 return -EINVAL; 1381 1382 dp->msm_dp_display.pdev = pdev; 1383 dp->id = desc->id; 1384 dp->msm_dp_display.connector_type = msm_dp_display_get_connector_type(pdev, desc); 1385 dp->wide_bus_supported = desc->wide_bus_supported; 1386 dp->msm_dp_display.is_edp = 1387 (dp->msm_dp_display.connector_type == DRM_MODE_CONNECTOR_eDP); 1388 1389 rc = msm_dp_display_get_io(dp); 1390 if (rc) 1391 return rc; 1392 1393 rc = msm_dp_init_sub_modules(dp); 1394 if (rc) { 1395 DRM_ERROR("init sub module failed\n"); 1396 return -EPROBE_DEFER; 1397 } 1398 1399 /* setup event q */ 1400 mutex_init(&dp->event_mutex); 1401 init_waitqueue_head(&dp->event_q); 1402 spin_lock_init(&dp->event_lock); 1403 1404 /* Store DP audio handle inside DP display */ 1405 dp->msm_dp_display.msm_dp_audio = dp->audio; 1406 1407 init_completion(&dp->audio_comp); 1408 1409 platform_set_drvdata(pdev, &dp->msm_dp_display); 1410 1411 rc = devm_pm_runtime_enable(&pdev->dev); 1412 if (rc) 1413 goto err; 1414 1415 rc = msm_dp_display_request_irq(dp); 1416 if (rc) 1417 goto err; 1418 1419 if (dp->msm_dp_display.is_edp) { 1420 rc = devm_of_dp_aux_populate_bus(dp->aux, msm_dp_auxbus_done_probe); 1421 if (rc) { 1422 DRM_ERROR("eDP auxbus population failed, rc=%d\n", rc); 1423 goto err; 1424 } 1425 } else { 1426 rc = msm_dp_display_probe_tail(&pdev->dev); 1427 if (rc) 1428 goto err; 1429 } 1430 1431 return rc; 1432 1433 err: 1434 msm_dp_display_deinit_sub_modules(dp); 1435 return rc; 1436 } 1437 1438 static void msm_dp_display_remove(struct platform_device *pdev) 1439 { 1440 struct msm_dp_display_private *dp = dev_get_dp_display_private(&pdev->dev); 1441 1442 component_del(&pdev->dev, &msm_dp_display_comp_ops); 1443 msm_dp_display_deinit_sub_modules(dp); 1444 platform_set_drvdata(pdev, NULL); 1445 } 1446 1447 static int msm_dp_pm_runtime_suspend(struct device *dev) 1448 { 1449 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 1450 1451 disable_irq(dp->irq); 1452 1453 if (dp->msm_dp_display.is_edp) { 1454 msm_dp_display_host_phy_exit(dp); 1455 msm_dp_aux_hpd_disable(dp->aux); 1456 } 1457 msm_dp_display_host_deinit(dp); 1458 1459 return 0; 1460 } 1461 1462 static int msm_dp_pm_runtime_resume(struct device *dev) 1463 { 1464 struct msm_dp_display_private *dp = dev_get_dp_display_private(dev); 1465 1466 /* 1467 * for eDP, host cotroller, HPD block and PHY are enabled here 1468 * but with HPD irq disabled 1469 * 1470 * for DP, only host controller is enabled here. 1471 * HPD block is enabled at msm_dp_bridge_hpd_enable() 1472 * PHY will be enabled at plugin handler later 1473 */ 1474 msm_dp_display_host_init(dp); 1475 if (dp->msm_dp_display.is_edp) { 1476 msm_dp_aux_hpd_enable(dp->aux); 1477 msm_dp_display_host_phy_init(dp); 1478 } 1479 1480 enable_irq(dp->irq); 1481 return 0; 1482 } 1483 1484 static const struct dev_pm_ops msm_dp_pm_ops = { 1485 SET_RUNTIME_PM_OPS(msm_dp_pm_runtime_suspend, msm_dp_pm_runtime_resume, NULL) 1486 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 1487 pm_runtime_force_resume) 1488 }; 1489 1490 static struct platform_driver msm_dp_display_driver = { 1491 .probe = msm_dp_display_probe, 1492 .remove = msm_dp_display_remove, 1493 .driver = { 1494 .name = "msm-dp-display", 1495 .of_match_table = msm_dp_dt_match, 1496 .suppress_bind_attrs = true, 1497 .pm = &msm_dp_pm_ops, 1498 }, 1499 }; 1500 1501 int __init msm_dp_register(void) 1502 { 1503 int ret; 1504 1505 ret = platform_driver_register(&msm_dp_display_driver); 1506 if (ret) 1507 DRM_ERROR("Dp display driver register failed"); 1508 1509 return ret; 1510 } 1511 1512 void __exit msm_dp_unregister(void) 1513 { 1514 platform_driver_unregister(&msm_dp_display_driver); 1515 } 1516 1517 bool msm_dp_is_yuv_420_enabled(const struct msm_dp *msm_dp_display, 1518 const struct drm_display_mode *mode) 1519 { 1520 struct msm_dp_display_private *dp; 1521 const struct drm_display_info *info; 1522 1523 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1524 info = &msm_dp_display->connector->display_info; 1525 1526 return dp->panel->vsc_sdp_supported && drm_mode_is_420_only(info, mode); 1527 } 1528 1529 bool msm_dp_needs_periph_flush(const struct msm_dp *msm_dp_display, 1530 const struct drm_display_mode *mode) 1531 { 1532 return msm_dp_is_yuv_420_enabled(msm_dp_display, mode); 1533 } 1534 1535 bool msm_dp_wide_bus_available(const struct msm_dp *msm_dp_display) 1536 { 1537 struct msm_dp_display_private *dp; 1538 1539 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1540 1541 if (dp->msm_dp_mode.out_fmt_is_yuv_420) 1542 return false; 1543 1544 return dp->wide_bus_supported; 1545 } 1546 1547 void msm_dp_display_debugfs_init(struct msm_dp *msm_dp_display, struct dentry *root, bool is_edp) 1548 { 1549 struct msm_dp_display_private *dp; 1550 struct device *dev; 1551 int rc; 1552 1553 dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1554 dev = &dp->msm_dp_display.pdev->dev; 1555 1556 rc = msm_dp_debug_init(dev, dp->panel, dp->link, dp->msm_dp_display.connector, root, is_edp); 1557 if (rc) 1558 DRM_ERROR("failed to initialize debug, rc = %d\n", rc); 1559 } 1560 1561 int msm_dp_modeset_init(struct msm_dp *msm_dp_display, struct drm_device *dev, 1562 struct drm_encoder *encoder, bool yuv_supported) 1563 { 1564 struct msm_dp_display_private *msm_dp_priv; 1565 int ret; 1566 1567 msm_dp_display->drm_dev = dev; 1568 1569 msm_dp_priv = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1570 1571 ret = msm_dp_bridge_init(msm_dp_display, dev, encoder, yuv_supported); 1572 if (ret) { 1573 DRM_DEV_ERROR(dev->dev, 1574 "failed to create dp bridge: %d\n", ret); 1575 return ret; 1576 } 1577 1578 msm_dp_display->connector = msm_dp_drm_connector_init(msm_dp_display, encoder); 1579 if (IS_ERR(msm_dp_display->connector)) { 1580 ret = PTR_ERR(msm_dp_display->connector); 1581 DRM_DEV_ERROR(dev->dev, 1582 "failed to create dp connector: %d\n", ret); 1583 msm_dp_display->connector = NULL; 1584 return ret; 1585 } 1586 1587 msm_dp_priv->panel->connector = msm_dp_display->connector; 1588 1589 return 0; 1590 } 1591 1592 void msm_dp_bridge_atomic_enable(struct drm_bridge *drm_bridge, 1593 struct drm_atomic_state *state) 1594 { 1595 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(drm_bridge); 1596 struct msm_dp *dp = msm_dp_bridge->msm_dp_display; 1597 int rc = 0; 1598 struct msm_dp_display_private *msm_dp_display; 1599 u32 hpd_state; 1600 bool force_link_train = false; 1601 1602 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 1603 if (!msm_dp_display->msm_dp_mode.drm_mode.clock) { 1604 DRM_ERROR("invalid params\n"); 1605 return; 1606 } 1607 1608 if (dp->is_edp) 1609 msm_dp_hpd_plug_handle(msm_dp_display, 0); 1610 1611 mutex_lock(&msm_dp_display->event_mutex); 1612 if (pm_runtime_resume_and_get(&dp->pdev->dev)) { 1613 DRM_ERROR("failed to pm_runtime_resume\n"); 1614 mutex_unlock(&msm_dp_display->event_mutex); 1615 return; 1616 } 1617 1618 hpd_state = msm_dp_display->hpd_state; 1619 if (hpd_state != ST_DISPLAY_OFF && hpd_state != ST_MAINLINK_READY) { 1620 mutex_unlock(&msm_dp_display->event_mutex); 1621 return; 1622 } 1623 1624 rc = msm_dp_display_set_mode(dp, &msm_dp_display->msm_dp_mode); 1625 if (rc) { 1626 DRM_ERROR("Failed to perform a mode set, rc=%d\n", rc); 1627 mutex_unlock(&msm_dp_display->event_mutex); 1628 return; 1629 } 1630 1631 hpd_state = msm_dp_display->hpd_state; 1632 1633 if (hpd_state == ST_DISPLAY_OFF) { 1634 msm_dp_display_host_phy_init(msm_dp_display); 1635 force_link_train = true; 1636 } 1637 1638 msm_dp_display_enable(msm_dp_display, force_link_train); 1639 1640 rc = msm_dp_display_post_enable(dp); 1641 if (rc) { 1642 DRM_ERROR("DP display post enable failed, rc=%d\n", rc); 1643 msm_dp_display_disable(msm_dp_display); 1644 } 1645 1646 /* completed connection */ 1647 msm_dp_display->hpd_state = ST_CONNECTED; 1648 1649 drm_dbg_dp(dp->drm_dev, "type=%d Done\n", dp->connector_type); 1650 mutex_unlock(&msm_dp_display->event_mutex); 1651 } 1652 1653 void msm_dp_bridge_atomic_disable(struct drm_bridge *drm_bridge, 1654 struct drm_atomic_state *state) 1655 { 1656 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(drm_bridge); 1657 struct msm_dp *dp = msm_dp_bridge->msm_dp_display; 1658 struct msm_dp_display_private *msm_dp_display; 1659 1660 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 1661 1662 msm_dp_ctrl_push_idle(msm_dp_display->ctrl); 1663 } 1664 1665 void msm_dp_bridge_atomic_post_disable(struct drm_bridge *drm_bridge, 1666 struct drm_atomic_state *state) 1667 { 1668 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(drm_bridge); 1669 struct msm_dp *dp = msm_dp_bridge->msm_dp_display; 1670 u32 hpd_state; 1671 struct msm_dp_display_private *msm_dp_display; 1672 1673 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 1674 1675 if (dp->is_edp) 1676 msm_dp_hpd_unplug_handle(msm_dp_display, 0); 1677 1678 mutex_lock(&msm_dp_display->event_mutex); 1679 1680 hpd_state = msm_dp_display->hpd_state; 1681 if (hpd_state != ST_DISCONNECT_PENDING && hpd_state != ST_CONNECTED) 1682 drm_dbg_dp(dp->drm_dev, "type=%d wrong hpd_state=%d\n", 1683 dp->connector_type, hpd_state); 1684 1685 msm_dp_display_disable(msm_dp_display); 1686 1687 hpd_state = msm_dp_display->hpd_state; 1688 if (hpd_state == ST_DISCONNECT_PENDING) { 1689 /* completed disconnection */ 1690 msm_dp_display->hpd_state = ST_DISCONNECTED; 1691 } else { 1692 msm_dp_display->hpd_state = ST_DISPLAY_OFF; 1693 } 1694 1695 drm_dbg_dp(dp->drm_dev, "type=%d Done\n", dp->connector_type); 1696 1697 pm_runtime_put_sync(&dp->pdev->dev); 1698 mutex_unlock(&msm_dp_display->event_mutex); 1699 } 1700 1701 void msm_dp_bridge_mode_set(struct drm_bridge *drm_bridge, 1702 const struct drm_display_mode *mode, 1703 const struct drm_display_mode *adjusted_mode) 1704 { 1705 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(drm_bridge); 1706 struct msm_dp *dp = msm_dp_bridge->msm_dp_display; 1707 struct msm_dp_display_private *msm_dp_display; 1708 struct msm_dp_panel *msm_dp_panel; 1709 1710 msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); 1711 msm_dp_panel = msm_dp_display->panel; 1712 1713 memset(&msm_dp_display->msm_dp_mode, 0x0, sizeof(struct msm_dp_display_mode)); 1714 1715 if (msm_dp_display_check_video_test(dp)) 1716 msm_dp_display->msm_dp_mode.bpp = msm_dp_display_get_test_bpp(dp); 1717 else /* Default num_components per pixel = 3 */ 1718 msm_dp_display->msm_dp_mode.bpp = dp->connector->display_info.bpc * 3; 1719 1720 if (!msm_dp_display->msm_dp_mode.bpp) 1721 msm_dp_display->msm_dp_mode.bpp = 24; /* Default bpp */ 1722 1723 drm_mode_copy(&msm_dp_display->msm_dp_mode.drm_mode, adjusted_mode); 1724 1725 msm_dp_display->msm_dp_mode.v_active_low = 1726 !!(msm_dp_display->msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NVSYNC); 1727 1728 msm_dp_display->msm_dp_mode.h_active_low = 1729 !!(msm_dp_display->msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC); 1730 1731 msm_dp_display->msm_dp_mode.out_fmt_is_yuv_420 = 1732 drm_mode_is_420_only(&dp->connector->display_info, adjusted_mode) && 1733 msm_dp_panel->vsc_sdp_supported; 1734 1735 /* populate wide_bus_support to different layers */ 1736 msm_dp_display->ctrl->wide_bus_en = 1737 msm_dp_display->msm_dp_mode.out_fmt_is_yuv_420 ? false : msm_dp_display->wide_bus_supported; 1738 } 1739 1740 void msm_dp_bridge_hpd_enable(struct drm_bridge *bridge) 1741 { 1742 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(bridge); 1743 struct msm_dp *msm_dp_display = msm_dp_bridge->msm_dp_display; 1744 struct msm_dp_display_private *dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1745 1746 /* 1747 * this is for external DP with hpd irq enabled case, 1748 * step-1: msm_dp_pm_runtime_resume() enable dp host only 1749 * step-2: enable hdp block and have hpd irq enabled here 1750 * step-3: waiting for plugin irq while phy is not initialized 1751 * step-4: DP PHY is initialized at plugin handler before link training 1752 * 1753 */ 1754 mutex_lock(&dp->event_mutex); 1755 if (pm_runtime_resume_and_get(&msm_dp_display->pdev->dev)) { 1756 DRM_ERROR("failed to resume power\n"); 1757 mutex_unlock(&dp->event_mutex); 1758 return; 1759 } 1760 1761 msm_dp_aux_hpd_enable(dp->aux); 1762 msm_dp_aux_hpd_intr_enable(dp->aux); 1763 1764 msm_dp_display->internal_hpd = true; 1765 mutex_unlock(&dp->event_mutex); 1766 } 1767 1768 void msm_dp_bridge_hpd_disable(struct drm_bridge *bridge) 1769 { 1770 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(bridge); 1771 struct msm_dp *msm_dp_display = msm_dp_bridge->msm_dp_display; 1772 struct msm_dp_display_private *dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1773 1774 mutex_lock(&dp->event_mutex); 1775 1776 msm_dp_aux_hpd_intr_disable(dp->aux); 1777 msm_dp_aux_hpd_disable(dp->aux); 1778 1779 msm_dp_display->internal_hpd = false; 1780 1781 pm_runtime_put_sync(&msm_dp_display->pdev->dev); 1782 mutex_unlock(&dp->event_mutex); 1783 } 1784 1785 void msm_dp_bridge_hpd_notify(struct drm_bridge *bridge, 1786 enum drm_connector_status status) 1787 { 1788 struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(bridge); 1789 struct msm_dp *msm_dp_display = msm_dp_bridge->msm_dp_display; 1790 struct msm_dp_display_private *dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); 1791 1792 /* Without next_bridge interrupts are handled by the DP core directly */ 1793 if (msm_dp_display->internal_hpd) 1794 return; 1795 1796 if (!msm_dp_display->link_ready && status == connector_status_connected) 1797 msm_dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0); 1798 else if (msm_dp_display->link_ready && status == connector_status_disconnected) 1799 msm_dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0); 1800 } 1801