xref: /linux/drivers/gpu/drm/msm/dp/dp_catalog.h (revision a1c3be890440a1769ed6f822376a3e3ab0d42994)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef _DP_CATALOG_H_
7 #define _DP_CATALOG_H_
8 
9 #include <drm/drm_modes.h>
10 
11 #include "dp_parser.h"
12 
13 /* interrupts */
14 #define DP_INTR_HPD		BIT(0)
15 #define DP_INTR_AUX_I2C_DONE	BIT(3)
16 #define DP_INTR_WRONG_ADDR	BIT(6)
17 #define DP_INTR_TIMEOUT		BIT(9)
18 #define DP_INTR_NACK_DEFER	BIT(12)
19 #define DP_INTR_WRONG_DATA_CNT	BIT(15)
20 #define DP_INTR_I2C_NACK	BIT(18)
21 #define DP_INTR_I2C_DEFER	BIT(21)
22 #define DP_INTR_PLL_UNLOCKED	BIT(24)
23 #define DP_INTR_AUX_ERROR	BIT(27)
24 
25 #define DP_INTR_READY_FOR_VIDEO		BIT(0)
26 #define DP_INTR_IDLE_PATTERN_SENT	BIT(3)
27 #define DP_INTR_FRAME_END		BIT(6)
28 #define DP_INTR_CRC_UPDATED		BIT(9)
29 
30 #define DP_AUX_CFG_MAX_VALUE_CNT 3
31 
32 /* PHY AUX config registers */
33 enum dp_phy_aux_config_type {
34 	PHY_AUX_CFG0,
35 	PHY_AUX_CFG1,
36 	PHY_AUX_CFG2,
37 	PHY_AUX_CFG3,
38 	PHY_AUX_CFG4,
39 	PHY_AUX_CFG5,
40 	PHY_AUX_CFG6,
41 	PHY_AUX_CFG7,
42 	PHY_AUX_CFG8,
43 	PHY_AUX_CFG9,
44 	PHY_AUX_CFG_MAX,
45 };
46 
47 enum dp_catalog_audio_sdp_type {
48 	DP_AUDIO_SDP_STREAM,
49 	DP_AUDIO_SDP_TIMESTAMP,
50 	DP_AUDIO_SDP_INFOFRAME,
51 	DP_AUDIO_SDP_COPYMANAGEMENT,
52 	DP_AUDIO_SDP_ISRC,
53 	DP_AUDIO_SDP_MAX,
54 };
55 
56 enum dp_catalog_audio_header_type {
57 	DP_AUDIO_SDP_HEADER_1,
58 	DP_AUDIO_SDP_HEADER_2,
59 	DP_AUDIO_SDP_HEADER_3,
60 	DP_AUDIO_SDP_HEADER_MAX,
61 };
62 
63 struct dp_catalog {
64 	u32 aux_data;
65 	u32 total;
66 	u32 sync_start;
67 	u32 width_blanking;
68 	u32 dp_active;
69 	enum dp_catalog_audio_sdp_type sdp_type;
70 	enum dp_catalog_audio_header_type sdp_header;
71 	u32 audio_data;
72 };
73 
74 /* AUX APIs */
75 u32 dp_catalog_aux_read_data(struct dp_catalog *dp_catalog);
76 int dp_catalog_aux_write_data(struct dp_catalog *dp_catalog);
77 int dp_catalog_aux_write_trans(struct dp_catalog *dp_catalog);
78 int dp_catalog_aux_clear_trans(struct dp_catalog *dp_catalog, bool read);
79 int dp_catalog_aux_clear_hw_interrupts(struct dp_catalog *dp_catalog);
80 void dp_catalog_aux_reset(struct dp_catalog *dp_catalog);
81 void dp_catalog_aux_enable(struct dp_catalog *dp_catalog, bool enable);
82 void dp_catalog_aux_update_cfg(struct dp_catalog *dp_catalog);
83 int dp_catalog_aux_get_irq(struct dp_catalog *dp_catalog);
84 
85 /* DP Controller APIs */
86 void dp_catalog_ctrl_state_ctrl(struct dp_catalog *dp_catalog, u32 state);
87 void dp_catalog_ctrl_config_ctrl(struct dp_catalog *dp_catalog, u32 config);
88 void dp_catalog_ctrl_lane_mapping(struct dp_catalog *dp_catalog);
89 void dp_catalog_ctrl_mainlink_ctrl(struct dp_catalog *dp_catalog, bool enable);
90 void dp_catalog_ctrl_config_misc(struct dp_catalog *dp_catalog, u32 cc, u32 tb);
91 void dp_catalog_ctrl_config_msa(struct dp_catalog *dp_catalog, u32 rate,
92 				u32 stream_rate_khz, bool fixed_nvid);
93 int dp_catalog_ctrl_set_pattern(struct dp_catalog *dp_catalog, u32 pattern);
94 void dp_catalog_ctrl_reset(struct dp_catalog *dp_catalog);
95 bool dp_catalog_ctrl_mainlink_ready(struct dp_catalog *dp_catalog);
96 void dp_catalog_ctrl_enable_irq(struct dp_catalog *dp_catalog, bool enable);
97 void dp_catalog_hpd_config_intr(struct dp_catalog *dp_catalog,
98 			u32 intr_mask, bool en);
99 void dp_catalog_ctrl_hpd_config(struct dp_catalog *dp_catalog);
100 u32 dp_catalog_link_is_connected(struct dp_catalog *dp_catalog);
101 u32 dp_catalog_hpd_get_intr_status(struct dp_catalog *dp_catalog);
102 void dp_catalog_ctrl_phy_reset(struct dp_catalog *dp_catalog);
103 int dp_catalog_ctrl_update_vx_px(struct dp_catalog *dp_catalog, u8 v_level,
104 				u8 p_level);
105 int dp_catalog_ctrl_get_interrupt(struct dp_catalog *dp_catalog);
106 void dp_catalog_ctrl_update_transfer_unit(struct dp_catalog *dp_catalog,
107 				u32 dp_tu, u32 valid_boundary,
108 				u32 valid_boundary2);
109 void dp_catalog_ctrl_send_phy_pattern(struct dp_catalog *dp_catalog,
110 				u32 pattern);
111 u32 dp_catalog_ctrl_read_phy_pattern(struct dp_catalog *dp_catalog);
112 
113 /* DP Panel APIs */
114 int dp_catalog_panel_timing_cfg(struct dp_catalog *dp_catalog);
115 void dp_catalog_dump_regs(struct dp_catalog *dp_catalog);
116 void dp_catalog_panel_tpg_enable(struct dp_catalog *dp_catalog,
117 				struct drm_display_mode *drm_mode);
118 void dp_catalog_panel_tpg_disable(struct dp_catalog *dp_catalog);
119 
120 struct dp_catalog *dp_catalog_get(struct device *dev, struct dp_io *io);
121 
122 /* DP Audio APIs */
123 void dp_catalog_audio_get_header(struct dp_catalog *catalog);
124 void dp_catalog_audio_set_header(struct dp_catalog *catalog);
125 void dp_catalog_audio_config_acr(struct dp_catalog *catalog);
126 void dp_catalog_audio_enable(struct dp_catalog *catalog);
127 void dp_catalog_audio_enable(struct dp_catalog *catalog);
128 void dp_catalog_audio_config_sdp(struct dp_catalog *catalog);
129 void dp_catalog_audio_init(struct dp_catalog *catalog);
130 void dp_catalog_audio_sfe_level(struct dp_catalog *catalog);
131 
132 #endif /* _DP_CATALOG_H_ */
133