xref: /linux/drivers/gpu/drm/msm/disp/mdp_kms.h (revision 249ebf3f65f8530beb2cbfb91bff1d83ba88d23c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2013 Red Hat
4  * Author: Rob Clark <robdclark@gmail.com>
5  */
6 
7 #ifndef __MDP_KMS_H__
8 #define __MDP_KMS_H__
9 
10 #include <linux/clk.h>
11 #include <linux/platform_device.h>
12 #include <linux/regulator/consumer.h>
13 
14 #include "mdp_format.h"
15 #include "msm_drv.h"
16 #include "msm_kms.h"
17 #include "mdp_common.xml.h"
18 
19 struct mdp_kms;
20 
21 struct mdp_kms_funcs {
22 	struct msm_kms_funcs base;
23 	void (*set_irqmask)(struct mdp_kms *mdp_kms, uint32_t irqmask,
24 		uint32_t old_irqmask);
25 };
26 
27 struct mdp_kms {
28 	struct msm_kms base;
29 
30 	const struct mdp_kms_funcs *funcs;
31 
32 	/* irq handling: */
33 	bool in_irq;
34 	struct list_head irq_list;    /* list of mdp4_irq */
35 	uint32_t vblank_mask;         /* irq bits set for userspace vblank */
36 	uint32_t cur_irq_mask;        /* current irq mask */
37 };
38 #define to_mdp_kms(x) container_of(x, struct mdp_kms, base)
39 
40 static inline int mdp_kms_init(struct mdp_kms *mdp_kms,
41 		const struct mdp_kms_funcs *funcs)
42 {
43 	mdp_kms->funcs = funcs;
44 	INIT_LIST_HEAD(&mdp_kms->irq_list);
45 	return msm_kms_init(&mdp_kms->base, &funcs->base);
46 }
47 
48 static inline void mdp_kms_destroy(struct mdp_kms *mdp_kms)
49 {
50 	msm_kms_destroy(&mdp_kms->base);
51 }
52 
53 /*
54  * irq helpers:
55  */
56 
57 /* For transiently registering for different MDP irqs that various parts
58  * of the KMS code need during setup/configuration.  These are not
59  * necessarily the same as what drm_vblank_get/put() are requesting, and
60  * the hysteresis in drm_vblank_put() is not necessarily desirable for
61  * internal housekeeping related irq usage.
62  */
63 struct mdp_irq {
64 	struct list_head node;
65 	uint32_t irqmask;
66 	bool registered;
67 	void (*irq)(struct mdp_irq *irq, uint32_t irqstatus);
68 };
69 
70 void mdp_dispatch_irqs(struct mdp_kms *mdp_kms, uint32_t status);
71 void mdp_update_vblank_mask(struct mdp_kms *mdp_kms, uint32_t mask, bool enable);
72 void mdp_irq_wait(struct mdp_kms *mdp_kms, uint32_t irqmask);
73 void mdp_irq_register(struct mdp_kms *mdp_kms, struct mdp_irq *irq);
74 void mdp_irq_unregister(struct mdp_kms *mdp_kms, struct mdp_irq *irq);
75 void mdp_irq_update(struct mdp_kms *mdp_kms);
76 
77 /*
78  * pixel format helpers:
79  */
80 
81 /* MDP capabilities */
82 #define MDP_CAP_SMP		BIT(0)	/* Shared Memory Pool                 */
83 #define MDP_CAP_DSC		BIT(1)	/* VESA Display Stream Compression    */
84 #define MDP_CAP_CDM		BIT(2)	/* Chroma Down Module (HDMI 2.0 YUV)  */
85 #define MDP_CAP_SRC_SPLIT	BIT(3)	/* Source Split of SSPPs */
86 
87 /* MDP pipe capabilities */
88 #define MDP_PIPE_CAP_HFLIP			BIT(0)
89 #define MDP_PIPE_CAP_VFLIP			BIT(1)
90 #define MDP_PIPE_CAP_SCALE			BIT(2)
91 #define MDP_PIPE_CAP_CSC			BIT(3)
92 #define MDP_PIPE_CAP_DECIMATION			BIT(4)
93 #define MDP_PIPE_CAP_SW_PIX_EXT			BIT(5)
94 #define MDP_PIPE_CAP_CURSOR			BIT(6)
95 
96 /* MDP layer mixer caps */
97 #define MDP_LM_CAP_DISPLAY			BIT(0)
98 #define MDP_LM_CAP_WB				BIT(1)
99 #define MDP_LM_CAP_PAIR				BIT(2)
100 
101 static inline bool pipe_supports_yuv(uint32_t pipe_caps)
102 {
103 	return (pipe_caps & MDP_PIPE_CAP_SCALE) &&
104 		(pipe_caps & MDP_PIPE_CAP_CSC);
105 }
106 
107 enum csc_type {
108 	CSC_RGB2RGB = 0,
109 	CSC_YUV2RGB,
110 	CSC_RGB2YUV,
111 	CSC_YUV2YUV,
112 	CSC_MAX
113 };
114 
115 struct csc_cfg {
116 	enum csc_type type;
117 	uint32_t matrix[9];
118 	uint32_t pre_bias[3];
119 	uint32_t post_bias[3];
120 	uint32_t pre_clamp[6];
121 	uint32_t post_clamp[6];
122 };
123 
124 struct csc_cfg *mdp_get_default_csc_cfg(enum csc_type);
125 
126 #endif /* __MDP_KMS_H__ */
127