1 /* 2 * Copyright (C) 2013 Red Hat 3 * Author: Rob Clark <robdclark@gmail.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 as published by 7 * the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "mdp4_kms.h" 19 20 #define DOWN_SCALE_MAX 8 21 #define UP_SCALE_MAX 8 22 23 struct mdp4_plane { 24 struct drm_plane base; 25 const char *name; 26 27 enum mdp4_pipe pipe; 28 29 uint32_t caps; 30 uint32_t nformats; 31 uint32_t formats[32]; 32 33 bool enabled; 34 }; 35 #define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base) 36 37 /* MDP format helper functions */ 38 static inline 39 enum mdp4_frame_format mdp4_get_frame_format(struct drm_framebuffer *fb) 40 { 41 bool is_tile = false; 42 43 if (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) 44 is_tile = true; 45 46 if (fb->format->format == DRM_FORMAT_NV12 && is_tile) 47 return FRAME_TILE_YCBCR_420; 48 49 return FRAME_LINEAR; 50 } 51 52 static void mdp4_plane_set_scanout(struct drm_plane *plane, 53 struct drm_framebuffer *fb); 54 static int mdp4_plane_mode_set(struct drm_plane *plane, 55 struct drm_crtc *crtc, struct drm_framebuffer *fb, 56 int crtc_x, int crtc_y, 57 unsigned int crtc_w, unsigned int crtc_h, 58 uint32_t src_x, uint32_t src_y, 59 uint32_t src_w, uint32_t src_h); 60 61 static struct mdp4_kms *get_kms(struct drm_plane *plane) 62 { 63 struct msm_drm_private *priv = plane->dev->dev_private; 64 return to_mdp4_kms(to_mdp_kms(priv->kms)); 65 } 66 67 static void mdp4_plane_destroy(struct drm_plane *plane) 68 { 69 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 70 71 drm_plane_helper_disable(plane); 72 drm_plane_cleanup(plane); 73 74 kfree(mdp4_plane); 75 } 76 77 /* helper to install properties which are common to planes and crtcs */ 78 static void mdp4_plane_install_properties(struct drm_plane *plane, 79 struct drm_mode_object *obj) 80 { 81 // XXX 82 } 83 84 static int mdp4_plane_set_property(struct drm_plane *plane, 85 struct drm_property *property, uint64_t val) 86 { 87 // XXX 88 return -EINVAL; 89 } 90 91 static const struct drm_plane_funcs mdp4_plane_funcs = { 92 .update_plane = drm_atomic_helper_update_plane, 93 .disable_plane = drm_atomic_helper_disable_plane, 94 .destroy = mdp4_plane_destroy, 95 .set_property = mdp4_plane_set_property, 96 .reset = drm_atomic_helper_plane_reset, 97 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, 98 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, 99 }; 100 101 static void mdp4_plane_cleanup_fb(struct drm_plane *plane, 102 struct drm_plane_state *old_state) 103 { 104 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 105 struct mdp4_kms *mdp4_kms = get_kms(plane); 106 struct msm_kms *kms = &mdp4_kms->base.base; 107 struct drm_framebuffer *fb = old_state->fb; 108 109 if (!fb) 110 return; 111 112 DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id); 113 msm_framebuffer_cleanup(fb, kms->aspace); 114 } 115 116 117 static int mdp4_plane_atomic_check(struct drm_plane *plane, 118 struct drm_plane_state *state) 119 { 120 return 0; 121 } 122 123 static void mdp4_plane_atomic_update(struct drm_plane *plane, 124 struct drm_plane_state *old_state) 125 { 126 struct drm_plane_state *state = plane->state; 127 int ret; 128 129 ret = mdp4_plane_mode_set(plane, 130 state->crtc, state->fb, 131 state->crtc_x, state->crtc_y, 132 state->crtc_w, state->crtc_h, 133 state->src_x, state->src_y, 134 state->src_w, state->src_h); 135 /* atomic_check should have ensured that this doesn't fail */ 136 WARN_ON(ret < 0); 137 } 138 139 static const struct drm_plane_helper_funcs mdp4_plane_helper_funcs = { 140 .prepare_fb = msm_atomic_prepare_fb, 141 .cleanup_fb = mdp4_plane_cleanup_fb, 142 .atomic_check = mdp4_plane_atomic_check, 143 .atomic_update = mdp4_plane_atomic_update, 144 }; 145 146 static void mdp4_plane_set_scanout(struct drm_plane *plane, 147 struct drm_framebuffer *fb) 148 { 149 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 150 struct mdp4_kms *mdp4_kms = get_kms(plane); 151 struct msm_kms *kms = &mdp4_kms->base.base; 152 enum mdp4_pipe pipe = mdp4_plane->pipe; 153 154 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe), 155 MDP4_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) | 156 MDP4_PIPE_SRC_STRIDE_A_P1(fb->pitches[1])); 157 158 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe), 159 MDP4_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) | 160 MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3])); 161 162 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe), 163 msm_framebuffer_iova(fb, kms->aspace, 0)); 164 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe), 165 msm_framebuffer_iova(fb, kms->aspace, 1)); 166 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe), 167 msm_framebuffer_iova(fb, kms->aspace, 2)); 168 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe), 169 msm_framebuffer_iova(fb, kms->aspace, 3)); 170 171 plane->fb = fb; 172 } 173 174 static void mdp4_write_csc_config(struct mdp4_kms *mdp4_kms, 175 enum mdp4_pipe pipe, struct csc_cfg *csc) 176 { 177 int i; 178 179 for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) { 180 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_MV(pipe, i), 181 csc->matrix[i]); 182 } 183 184 for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) { 185 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_BV(pipe, i), 186 csc->pre_bias[i]); 187 188 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_BV(pipe, i), 189 csc->post_bias[i]); 190 } 191 192 for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) { 193 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_LV(pipe, i), 194 csc->pre_clamp[i]); 195 196 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_LV(pipe, i), 197 csc->post_clamp[i]); 198 } 199 } 200 201 #define MDP4_VG_PHASE_STEP_DEFAULT 0x20000000 202 203 static int mdp4_plane_mode_set(struct drm_plane *plane, 204 struct drm_crtc *crtc, struct drm_framebuffer *fb, 205 int crtc_x, int crtc_y, 206 unsigned int crtc_w, unsigned int crtc_h, 207 uint32_t src_x, uint32_t src_y, 208 uint32_t src_w, uint32_t src_h) 209 { 210 struct drm_device *dev = plane->dev; 211 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 212 struct mdp4_kms *mdp4_kms = get_kms(plane); 213 enum mdp4_pipe pipe = mdp4_plane->pipe; 214 const struct mdp_format *format; 215 uint32_t op_mode = 0; 216 uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT; 217 uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT; 218 enum mdp4_frame_format frame_type; 219 220 if (!(crtc && fb)) { 221 DBG("%s: disabled!", mdp4_plane->name); 222 return 0; 223 } 224 225 frame_type = mdp4_get_frame_format(fb); 226 227 /* src values are in Q16 fixed point, convert to integer: */ 228 src_x = src_x >> 16; 229 src_y = src_y >> 16; 230 src_w = src_w >> 16; 231 src_h = src_h >> 16; 232 233 DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", mdp4_plane->name, 234 fb->base.id, src_x, src_y, src_w, src_h, 235 crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h); 236 237 format = to_mdp_format(msm_framebuffer_format(fb)); 238 239 if (src_w > (crtc_w * DOWN_SCALE_MAX)) { 240 dev_err(dev->dev, "Width down scaling exceeds limits!\n"); 241 return -ERANGE; 242 } 243 244 if (src_h > (crtc_h * DOWN_SCALE_MAX)) { 245 dev_err(dev->dev, "Height down scaling exceeds limits!\n"); 246 return -ERANGE; 247 } 248 249 if (crtc_w > (src_w * UP_SCALE_MAX)) { 250 dev_err(dev->dev, "Width up scaling exceeds limits!\n"); 251 return -ERANGE; 252 } 253 254 if (crtc_h > (src_h * UP_SCALE_MAX)) { 255 dev_err(dev->dev, "Height up scaling exceeds limits!\n"); 256 return -ERANGE; 257 } 258 259 if (src_w != crtc_w) { 260 uint32_t sel_unit = SCALE_FIR; 261 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_EN; 262 263 if (MDP_FORMAT_IS_YUV(format)) { 264 if (crtc_w > src_w) 265 sel_unit = SCALE_PIXEL_RPT; 266 else if (crtc_w <= (src_w / 4)) 267 sel_unit = SCALE_MN_PHASE; 268 269 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_UNIT_SEL(sel_unit); 270 phasex_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT, 271 src_w, crtc_w); 272 } 273 } 274 275 if (src_h != crtc_h) { 276 uint32_t sel_unit = SCALE_FIR; 277 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_EN; 278 279 if (MDP_FORMAT_IS_YUV(format)) { 280 281 if (crtc_h > src_h) 282 sel_unit = SCALE_PIXEL_RPT; 283 else if (crtc_h <= (src_h / 4)) 284 sel_unit = SCALE_MN_PHASE; 285 286 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_UNIT_SEL(sel_unit); 287 phasey_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT, 288 src_h, crtc_h); 289 } 290 } 291 292 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe), 293 MDP4_PIPE_SRC_SIZE_WIDTH(src_w) | 294 MDP4_PIPE_SRC_SIZE_HEIGHT(src_h)); 295 296 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe), 297 MDP4_PIPE_SRC_XY_X(src_x) | 298 MDP4_PIPE_SRC_XY_Y(src_y)); 299 300 mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe), 301 MDP4_PIPE_DST_SIZE_WIDTH(crtc_w) | 302 MDP4_PIPE_DST_SIZE_HEIGHT(crtc_h)); 303 304 mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe), 305 MDP4_PIPE_DST_XY_X(crtc_x) | 306 MDP4_PIPE_DST_XY_Y(crtc_y)); 307 308 mdp4_plane_set_scanout(plane, fb); 309 310 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe), 311 MDP4_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) | 312 MDP4_PIPE_SRC_FORMAT_R_BPC(format->bpc_r) | 313 MDP4_PIPE_SRC_FORMAT_G_BPC(format->bpc_g) | 314 MDP4_PIPE_SRC_FORMAT_B_BPC(format->bpc_b) | 315 COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) | 316 MDP4_PIPE_SRC_FORMAT_CPP(format->cpp - 1) | 317 MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) | 318 MDP4_PIPE_SRC_FORMAT_FETCH_PLANES(format->fetch_type) | 319 MDP4_PIPE_SRC_FORMAT_CHROMA_SAMP(format->chroma_sample) | 320 MDP4_PIPE_SRC_FORMAT_FRAME_FORMAT(frame_type) | 321 COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT)); 322 323 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe), 324 MDP4_PIPE_SRC_UNPACK_ELEM0(format->unpack[0]) | 325 MDP4_PIPE_SRC_UNPACK_ELEM1(format->unpack[1]) | 326 MDP4_PIPE_SRC_UNPACK_ELEM2(format->unpack[2]) | 327 MDP4_PIPE_SRC_UNPACK_ELEM3(format->unpack[3])); 328 329 if (MDP_FORMAT_IS_YUV(format)) { 330 struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB); 331 332 op_mode |= MDP4_PIPE_OP_MODE_SRC_YCBCR; 333 op_mode |= MDP4_PIPE_OP_MODE_CSC_EN; 334 mdp4_write_csc_config(mdp4_kms, pipe, csc); 335 } 336 337 mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode); 338 mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step); 339 mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step); 340 341 if (frame_type != FRAME_LINEAR) 342 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SSTILE_FRAME_SIZE(pipe), 343 MDP4_PIPE_SSTILE_FRAME_SIZE_WIDTH(src_w) | 344 MDP4_PIPE_SSTILE_FRAME_SIZE_HEIGHT(src_h)); 345 346 return 0; 347 } 348 349 static const char *pipe_names[] = { 350 "VG1", "VG2", 351 "RGB1", "RGB2", "RGB3", 352 "VG3", "VG4", 353 }; 354 355 enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane) 356 { 357 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 358 return mdp4_plane->pipe; 359 } 360 361 /* initialize plane */ 362 struct drm_plane *mdp4_plane_init(struct drm_device *dev, 363 enum mdp4_pipe pipe_id, bool private_plane) 364 { 365 struct drm_plane *plane = NULL; 366 struct mdp4_plane *mdp4_plane; 367 int ret; 368 enum drm_plane_type type; 369 370 mdp4_plane = kzalloc(sizeof(*mdp4_plane), GFP_KERNEL); 371 if (!mdp4_plane) { 372 ret = -ENOMEM; 373 goto fail; 374 } 375 376 plane = &mdp4_plane->base; 377 378 mdp4_plane->pipe = pipe_id; 379 mdp4_plane->name = pipe_names[pipe_id]; 380 mdp4_plane->caps = mdp4_pipe_caps(pipe_id); 381 382 mdp4_plane->nformats = mdp_get_formats(mdp4_plane->formats, 383 ARRAY_SIZE(mdp4_plane->formats), 384 !pipe_supports_yuv(mdp4_plane->caps)); 385 386 type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY; 387 ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs, 388 mdp4_plane->formats, mdp4_plane->nformats, 389 NULL, type, NULL); 390 if (ret) 391 goto fail; 392 393 drm_plane_helper_add(plane, &mdp4_plane_helper_funcs); 394 395 mdp4_plane_install_properties(plane, &plane->base); 396 397 return plane; 398 399 fail: 400 if (plane) 401 mdp4_plane_destroy(plane); 402 403 return ERR_PTR(ret); 404 } 405