1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. 3 */ 4 5 #if !defined(_DPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) 6 #define _DPU_TRACE_H_ 7 8 #include <linux/stringify.h> 9 #include <linux/types.h> 10 #include <linux/tracepoint.h> 11 12 #include <drm/drm_rect.h> 13 #include "dpu_crtc.h" 14 #include "dpu_encoder_phys.h" 15 #include "dpu_hw_mdss.h" 16 #include "dpu_hw_vbif.h" 17 #include "dpu_plane.h" 18 19 #undef TRACE_SYSTEM 20 #define TRACE_SYSTEM dpu 21 #undef TRACE_INCLUDE_FILE 22 #define TRACE_INCLUDE_FILE dpu_trace 23 24 TRACE_EVENT(dpu_perf_set_qos_luts, 25 TP_PROTO(u32 pnum, u32 fmt, bool rt, u32 fl, 26 u32 lut, u32 lut_usage), 27 TP_ARGS(pnum, fmt, rt, fl, lut, lut_usage), 28 TP_STRUCT__entry( 29 __field(u32, pnum) 30 __field(u32, fmt) 31 __field(bool, rt) 32 __field(u32, fl) 33 __field(u64, lut) 34 __field(u32, lut_usage) 35 ), 36 TP_fast_assign( 37 __entry->pnum = pnum; 38 __entry->fmt = fmt; 39 __entry->rt = rt; 40 __entry->fl = fl; 41 __entry->lut = lut; 42 __entry->lut_usage = lut_usage; 43 ), 44 TP_printk("pnum=%d fmt=%x rt=%d fl=%d lut=0x%llx lut_usage=%d", 45 __entry->pnum, __entry->fmt, 46 __entry->rt, __entry->fl, 47 __entry->lut, __entry->lut_usage) 48 ); 49 50 TRACE_EVENT(dpu_perf_set_danger_luts, 51 TP_PROTO(u32 pnum, u32 fmt, u32 mode, u32 danger_lut, 52 u32 safe_lut), 53 TP_ARGS(pnum, fmt, mode, danger_lut, safe_lut), 54 TP_STRUCT__entry( 55 __field(u32, pnum) 56 __field(u32, fmt) 57 __field(u32, mode) 58 __field(u32, danger_lut) 59 __field(u32, safe_lut) 60 ), 61 TP_fast_assign( 62 __entry->pnum = pnum; 63 __entry->fmt = fmt; 64 __entry->mode = mode; 65 __entry->danger_lut = danger_lut; 66 __entry->safe_lut = safe_lut; 67 ), 68 TP_printk("pnum=%d fmt=%x mode=%d luts[0x%x, 0x%x]", 69 __entry->pnum, __entry->fmt, 70 __entry->mode, __entry->danger_lut, 71 __entry->safe_lut) 72 ); 73 74 TRACE_EVENT(dpu_perf_set_ot, 75 TP_PROTO(u32 pnum, u32 xin_id, u32 rd_lim), 76 TP_ARGS(pnum, xin_id, rd_lim), 77 TP_STRUCT__entry( 78 __field(u32, pnum) 79 __field(u32, xin_id) 80 __field(u32, rd_lim) 81 ), 82 TP_fast_assign( 83 __entry->pnum = pnum; 84 __entry->xin_id = xin_id; 85 __entry->rd_lim = rd_lim; 86 ), 87 TP_printk("pnum:%d xin_id:%d ot:%d", 88 __entry->pnum, __entry->xin_id, __entry->rd_lim) 89 ) 90 91 TRACE_EVENT(dpu_cmd_release_bw, 92 TP_PROTO(u32 crtc_id), 93 TP_ARGS(crtc_id), 94 TP_STRUCT__entry( 95 __field(u32, crtc_id) 96 ), 97 TP_fast_assign( 98 __entry->crtc_id = crtc_id; 99 ), 100 TP_printk("crtc:%d", __entry->crtc_id) 101 ); 102 103 TRACE_EVENT(tracing_mark_write, 104 TP_PROTO(int pid, const char *name, bool trace_begin), 105 TP_ARGS(pid, name, trace_begin), 106 TP_STRUCT__entry( 107 __field(int, pid) 108 __string(trace_name, name) 109 __field(bool, trace_begin) 110 ), 111 TP_fast_assign( 112 __entry->pid = pid; 113 __assign_str(trace_name); 114 __entry->trace_begin = trace_begin; 115 ), 116 TP_printk("%s|%d|%s", __entry->trace_begin ? "B" : "E", 117 __entry->pid, __get_str(trace_name)) 118 ) 119 120 TRACE_EVENT(dpu_trace_counter, 121 TP_PROTO(int pid, char *name, int value), 122 TP_ARGS(pid, name, value), 123 TP_STRUCT__entry( 124 __field(int, pid) 125 __string(counter_name, name) 126 __field(int, value) 127 ), 128 TP_fast_assign( 129 __entry->pid = current->tgid; 130 __assign_str(counter_name); 131 __entry->value = value; 132 ), 133 TP_printk("%d|%s|%d", __entry->pid, 134 __get_str(counter_name), __entry->value) 135 ) 136 137 TRACE_EVENT(dpu_perf_crtc_update, 138 TP_PROTO(u32 crtc, u64 bw_ctl, u32 core_clk_rate, 139 bool stop_req, bool update_bus, bool update_clk), 140 TP_ARGS(crtc, bw_ctl, core_clk_rate, stop_req, update_bus, update_clk), 141 TP_STRUCT__entry( 142 __field(u32, crtc) 143 __field(u64, bw_ctl) 144 __field(u32, core_clk_rate) 145 __field(bool, stop_req) 146 __field(u32, update_bus) 147 __field(u32, update_clk) 148 ), 149 TP_fast_assign( 150 __entry->crtc = crtc; 151 __entry->bw_ctl = bw_ctl; 152 __entry->core_clk_rate = core_clk_rate; 153 __entry->stop_req = stop_req; 154 __entry->update_bus = update_bus; 155 __entry->update_clk = update_clk; 156 ), 157 TP_printk( 158 "crtc=%d bw_ctl=%llu clk_rate=%u stop_req=%d u_bus=%d u_clk=%d", 159 __entry->crtc, 160 __entry->bw_ctl, 161 __entry->core_clk_rate, 162 __entry->stop_req, 163 __entry->update_bus, 164 __entry->update_clk) 165 ); 166 167 DECLARE_EVENT_CLASS(dpu_irq_template, 168 TP_PROTO(unsigned int irq_reg, unsigned int irq_bit), 169 TP_ARGS(irq_reg, irq_bit), 170 TP_STRUCT__entry( 171 __field( unsigned int, irq_reg ) 172 __field( unsigned int, irq_bit ) 173 ), 174 TP_fast_assign( 175 __entry->irq_reg = irq_reg; 176 __entry->irq_bit = irq_bit; 177 ), 178 TP_printk("IRQ=[%d, %d]", __entry->irq_reg, __entry->irq_bit) 179 ); 180 DEFINE_EVENT(dpu_irq_template, dpu_irq_register_success, 181 TP_PROTO(unsigned int irq_reg, unsigned int irq_bit), 182 TP_ARGS(irq_reg, irq_bit) 183 ); 184 DEFINE_EVENT(dpu_irq_template, dpu_irq_unregister_success, 185 TP_PROTO(unsigned int irq_reg, unsigned int irq_bit), 186 TP_ARGS(irq_reg, irq_bit) 187 ); 188 189 TRACE_EVENT(dpu_enc_irq_wait_success, 190 TP_PROTO(uint32_t drm_id, void *func, 191 unsigned int irq_reg, unsigned int irq_bit, enum dpu_pingpong pp_idx, int atomic_cnt), 192 TP_ARGS(drm_id, func, irq_reg, irq_bit, pp_idx, atomic_cnt), 193 TP_STRUCT__entry( 194 __field( uint32_t, drm_id ) 195 __field( void *, func ) 196 __field( unsigned int, irq_reg ) 197 __field( unsigned int, irq_bit ) 198 __field( enum dpu_pingpong, pp_idx ) 199 __field( int, atomic_cnt ) 200 ), 201 TP_fast_assign( 202 __entry->drm_id = drm_id; 203 __entry->func = func; 204 __entry->irq_reg = irq_reg; 205 __entry->irq_bit = irq_bit; 206 __entry->pp_idx = pp_idx; 207 __entry->atomic_cnt = atomic_cnt; 208 ), 209 TP_printk("id=%u, callback=%ps, IRQ=[%d, %d], pp=%d, atomic_cnt=%d", 210 __entry->drm_id, __entry->func, 211 __entry->irq_reg, __entry->irq_bit, __entry->pp_idx, __entry->atomic_cnt) 212 ); 213 214 DECLARE_EVENT_CLASS(dpu_drm_obj_template, 215 TP_PROTO(uint32_t drm_id), 216 TP_ARGS(drm_id), 217 TP_STRUCT__entry( 218 __field( uint32_t, drm_id ) 219 ), 220 TP_fast_assign( 221 __entry->drm_id = drm_id; 222 ), 223 TP_printk("id=%u", __entry->drm_id) 224 ); 225 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_atomic_check, 226 TP_PROTO(uint32_t drm_id), 227 TP_ARGS(drm_id) 228 ); 229 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_mode_set, 230 TP_PROTO(uint32_t drm_id), 231 TP_ARGS(drm_id) 232 ); 233 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_disable, 234 TP_PROTO(uint32_t drm_id), 235 TP_ARGS(drm_id) 236 ); 237 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_kickoff, 238 TP_PROTO(uint32_t drm_id), 239 TP_ARGS(drm_id) 240 ); 241 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff, 242 TP_PROTO(uint32_t drm_id), 243 TP_ARGS(drm_id) 244 ); 245 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff_reset, 246 TP_PROTO(uint32_t drm_id), 247 TP_ARGS(drm_id) 248 ); 249 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_flip, 250 TP_PROTO(uint32_t drm_id), 251 TP_ARGS(drm_id) 252 ); 253 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_vblank_cb, 254 TP_PROTO(uint32_t drm_id), 255 TP_ARGS(drm_id) 256 ); 257 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_commit, 258 TP_PROTO(uint32_t drm_id), 259 TP_ARGS(drm_id) 260 ); 261 DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_commit, 262 TP_PROTO(uint32_t drm_id), 263 TP_ARGS(drm_id) 264 ); 265 DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_wait_for_commit_done, 266 TP_PROTO(uint32_t drm_id), 267 TP_ARGS(drm_id) 268 ); 269 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_runtime_resume, 270 TP_PROTO(uint32_t drm_id), 271 TP_ARGS(drm_id) 272 ); 273 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_rc_enable, 274 TP_PROTO(uint32_t drm_id), 275 TP_ARGS(drm_id) 276 ); 277 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_rc_disable, 278 TP_PROTO(uint32_t drm_id), 279 TP_ARGS(drm_id) 280 ); 281 282 TRACE_EVENT(dpu_enc_enable, 283 TP_PROTO(uint32_t drm_id, int hdisplay, int vdisplay), 284 TP_ARGS(drm_id, hdisplay, vdisplay), 285 TP_STRUCT__entry( 286 __field( uint32_t, drm_id ) 287 __field( int, hdisplay ) 288 __field( int, vdisplay ) 289 ), 290 TP_fast_assign( 291 __entry->drm_id = drm_id; 292 __entry->hdisplay = hdisplay; 293 __entry->vdisplay = vdisplay; 294 ), 295 TP_printk("id=%u, mode=%dx%d", 296 __entry->drm_id, __entry->hdisplay, __entry->vdisplay) 297 ); 298 299 DECLARE_EVENT_CLASS(dpu_enc_keyval_template, 300 TP_PROTO(uint32_t drm_id, int val), 301 TP_ARGS(drm_id, val), 302 TP_STRUCT__entry( 303 __field( uint32_t, drm_id ) 304 __field( int, val ) 305 ), 306 TP_fast_assign( 307 __entry->drm_id = drm_id; 308 __entry->val = val; 309 ), 310 TP_printk("id=%u, val=%d", __entry->drm_id, __entry->val) 311 ); 312 DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_underrun_cb, 313 TP_PROTO(uint32_t drm_id, int count), 314 TP_ARGS(drm_id, count) 315 ); 316 DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_trigger_start, 317 TP_PROTO(uint32_t drm_id, int ctl_idx), 318 TP_ARGS(drm_id, ctl_idx) 319 ); 320 321 TRACE_EVENT(dpu_enc_atomic_check_flags, 322 TP_PROTO(uint32_t drm_id, unsigned int flags), 323 TP_ARGS(drm_id, flags), 324 TP_STRUCT__entry( 325 __field( uint32_t, drm_id ) 326 __field( unsigned int, flags ) 327 ), 328 TP_fast_assign( 329 __entry->drm_id = drm_id; 330 __entry->flags = flags; 331 ), 332 TP_printk("id=%u, flags=%u", 333 __entry->drm_id, __entry->flags) 334 ); 335 336 DECLARE_EVENT_CLASS(dpu_enc_id_enable_template, 337 TP_PROTO(uint32_t drm_id, bool enable), 338 TP_ARGS(drm_id, enable), 339 TP_STRUCT__entry( 340 __field( uint32_t, drm_id ) 341 __field( bool, enable ) 342 ), 343 TP_fast_assign( 344 __entry->drm_id = drm_id; 345 __entry->enable = enable; 346 ), 347 TP_printk("id=%u, enable=%s", 348 __entry->drm_id, __entry->enable ? "true" : "false") 349 ); 350 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_vblank_cb, 351 TP_PROTO(uint32_t drm_id, bool enable), 352 TP_ARGS(drm_id, enable) 353 ); 354 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_phys_cmd_connect_te, 355 TP_PROTO(uint32_t drm_id, bool enable), 356 TP_ARGS(drm_id, enable) 357 ); 358 359 TRACE_EVENT(dpu_enc_rc, 360 TP_PROTO(uint32_t drm_id, u32 sw_event, bool idle_pc_supported, 361 int rc_state, const char *stage), 362 TP_ARGS(drm_id, sw_event, idle_pc_supported, rc_state, stage), 363 TP_STRUCT__entry( 364 __field( uint32_t, drm_id ) 365 __field( u32, sw_event ) 366 __field( bool, idle_pc_supported ) 367 __field( int, rc_state ) 368 __string( stage_str, stage ) 369 ), 370 TP_fast_assign( 371 __entry->drm_id = drm_id; 372 __entry->sw_event = sw_event; 373 __entry->idle_pc_supported = idle_pc_supported; 374 __entry->rc_state = rc_state; 375 __assign_str(stage_str); 376 ), 377 TP_printk("%s: id:%u, sw_event:%d, idle_pc_supported:%s, rc_state:%d", 378 __get_str(stage_str), __entry->drm_id, __entry->sw_event, 379 __entry->idle_pc_supported ? "true" : "false", 380 __entry->rc_state) 381 ); 382 383 TRACE_EVENT(dpu_enc_frame_done_cb_not_busy, 384 TP_PROTO(uint32_t drm_id, u32 event, char *intf_mode, enum dpu_intf intf_idx, 385 enum dpu_wb wb_idx), 386 TP_ARGS(drm_id, event, intf_mode, intf_idx, wb_idx), 387 TP_STRUCT__entry( 388 __field( uint32_t, drm_id ) 389 __field( u32, event ) 390 __string( intf_mode_str, intf_mode ) 391 __field( enum dpu_intf, intf_idx ) 392 __field( enum dpu_wb, wb_idx ) 393 ), 394 TP_fast_assign( 395 __entry->drm_id = drm_id; 396 __entry->event = event; 397 __assign_str(intf_mode_str); 398 __entry->intf_idx = intf_idx; 399 __entry->wb_idx = wb_idx; 400 ), 401 TP_printk("id=%u, event=%u, intf_mode=%s intf=%d wb=%d", __entry->drm_id, 402 __entry->event, __get_str(intf_mode_str), 403 __entry->intf_idx, __entry->wb_idx) 404 ); 405 406 TRACE_EVENT(dpu_enc_frame_done_cb, 407 TP_PROTO(uint32_t drm_id, unsigned int idx, 408 unsigned long frame_busy_mask), 409 TP_ARGS(drm_id, idx, frame_busy_mask), 410 TP_STRUCT__entry( 411 __field( uint32_t, drm_id ) 412 __field( unsigned int, idx ) 413 __field( unsigned long, frame_busy_mask ) 414 ), 415 TP_fast_assign( 416 __entry->drm_id = drm_id; 417 __entry->idx = idx; 418 __entry->frame_busy_mask = frame_busy_mask; 419 ), 420 TP_printk("id=%u, idx=%u, frame_busy_mask=%lx", __entry->drm_id, 421 __entry->idx, __entry->frame_busy_mask) 422 ); 423 424 TRACE_EVENT(dpu_enc_trigger_flush, 425 TP_PROTO(uint32_t drm_id, char *intf_mode, enum dpu_intf intf_idx, enum dpu_wb wb_idx, 426 int pending_kickoff_cnt, int ctl_idx, u32 extra_flush_bits, 427 u32 pending_flush_ret), 428 TP_ARGS(drm_id, intf_mode, intf_idx, wb_idx, pending_kickoff_cnt, ctl_idx, 429 extra_flush_bits, pending_flush_ret), 430 TP_STRUCT__entry( 431 __field( uint32_t, drm_id ) 432 __string( intf_mode_str, intf_mode ) 433 __field( enum dpu_intf, intf_idx ) 434 __field( enum dpu_wb, wb_idx ) 435 __field( int, pending_kickoff_cnt ) 436 __field( int, ctl_idx ) 437 __field( u32, extra_flush_bits ) 438 __field( u32, pending_flush_ret ) 439 ), 440 TP_fast_assign( 441 __entry->drm_id = drm_id; 442 __assign_str(intf_mode_str); 443 __entry->intf_idx = intf_idx; 444 __entry->wb_idx = wb_idx; 445 __entry->pending_kickoff_cnt = pending_kickoff_cnt; 446 __entry->ctl_idx = ctl_idx; 447 __entry->extra_flush_bits = extra_flush_bits; 448 __entry->pending_flush_ret = pending_flush_ret; 449 ), 450 TP_printk("id=%u, intf_mode=%s, intf_idx=%d, wb_idx=%d, pending_kickoff_cnt=%d ctl_idx=%d " 451 "extra_flush_bits=0x%x pending_flush_ret=0x%x", 452 __entry->drm_id, __get_str(intf_mode_str), __entry->intf_idx, __entry->wb_idx, 453 __entry->pending_kickoff_cnt, __entry->ctl_idx, 454 __entry->extra_flush_bits, __entry->pending_flush_ret) 455 ); 456 457 DECLARE_EVENT_CLASS(dpu_id_event_template, 458 TP_PROTO(uint32_t drm_id, u32 event), 459 TP_ARGS(drm_id, event), 460 TP_STRUCT__entry( 461 __field( uint32_t, drm_id ) 462 __field( u32, event ) 463 ), 464 TP_fast_assign( 465 __entry->drm_id = drm_id; 466 __entry->event = event; 467 ), 468 TP_printk("id=%u, event=%u", __entry->drm_id, __entry->event) 469 ); 470 DEFINE_EVENT(dpu_id_event_template, dpu_enc_frame_done_timeout, 471 TP_PROTO(uint32_t drm_id, u32 event), 472 TP_ARGS(drm_id, event) 473 ); 474 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_cb, 475 TP_PROTO(uint32_t drm_id, u32 event), 476 TP_ARGS(drm_id, event) 477 ); 478 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_done, 479 TP_PROTO(uint32_t drm_id, u32 event), 480 TP_ARGS(drm_id, event) 481 ); 482 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_more_pending, 483 TP_PROTO(uint32_t drm_id, u32 event), 484 TP_ARGS(drm_id, event) 485 ); 486 487 TRACE_EVENT(dpu_enc_wait_event_timeout, 488 TP_PROTO(uint32_t drm_id, unsigned int irq_reg, unsigned int irq_bit, int rc, s64 time, 489 s64 expected_time, int atomic_cnt), 490 TP_ARGS(drm_id, irq_reg, irq_bit, rc, time, expected_time, atomic_cnt), 491 TP_STRUCT__entry( 492 __field( uint32_t, drm_id ) 493 __field( unsigned int, irq_reg ) 494 __field( unsigned int, irq_bit ) 495 __field( int, rc ) 496 __field( s64, time ) 497 __field( s64, expected_time ) 498 __field( int, atomic_cnt ) 499 ), 500 TP_fast_assign( 501 __entry->drm_id = drm_id; 502 __entry->irq_reg = irq_reg; 503 __entry->irq_bit = irq_bit; 504 __entry->rc = rc; 505 __entry->time = time; 506 __entry->expected_time = expected_time; 507 __entry->atomic_cnt = atomic_cnt; 508 ), 509 TP_printk("id=%u, IRQ=[%d, %d], rc=%d, time=%lld, expected=%lld cnt=%d", 510 __entry->drm_id, __entry->irq_reg, __entry->irq_bit, __entry->rc, __entry->time, 511 __entry->expected_time, __entry->atomic_cnt) 512 ); 513 514 TRACE_EVENT(dpu_enc_phys_cmd_irq_enable, 515 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, 516 int refcnt), 517 TP_ARGS(drm_id, pp, refcnt), 518 TP_STRUCT__entry( 519 __field( uint32_t, drm_id ) 520 __field( enum dpu_pingpong, pp ) 521 __field( int, refcnt ) 522 ), 523 TP_fast_assign( 524 __entry->drm_id = drm_id; 525 __entry->pp = pp; 526 __entry->refcnt = refcnt; 527 ), 528 TP_printk("id=%u, pp=%d, refcnt=%d", __entry->drm_id, 529 __entry->pp, 530 __entry->refcnt) 531 ); 532 533 TRACE_EVENT(dpu_enc_phys_cmd_irq_disable, 534 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, 535 int refcnt), 536 TP_ARGS(drm_id, pp, refcnt), 537 TP_STRUCT__entry( 538 __field( uint32_t, drm_id ) 539 __field( enum dpu_pingpong, pp ) 540 __field( int, refcnt ) 541 ), 542 TP_fast_assign( 543 __entry->drm_id = drm_id; 544 __entry->pp = pp; 545 __entry->refcnt = refcnt; 546 ), 547 TP_printk("id=%u, pp=%d, refcnt=%d", __entry->drm_id, 548 __entry->pp, 549 __entry->refcnt) 550 ); 551 552 TRACE_EVENT(dpu_enc_phys_cmd_pp_tx_done, 553 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, int new_count, 554 u32 event), 555 TP_ARGS(drm_id, pp, new_count, event), 556 TP_STRUCT__entry( 557 __field( uint32_t, drm_id ) 558 __field( enum dpu_pingpong, pp ) 559 __field( int, new_count ) 560 __field( u32, event ) 561 ), 562 TP_fast_assign( 563 __entry->drm_id = drm_id; 564 __entry->pp = pp; 565 __entry->new_count = new_count; 566 __entry->event = event; 567 ), 568 TP_printk("id=%u, pp=%d, new_count=%d, event=%u", __entry->drm_id, 569 __entry->pp, __entry->new_count, __entry->event) 570 ); 571 572 TRACE_EVENT(dpu_enc_phys_cmd_pdone_timeout, 573 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, int timeout_count, 574 int kickoff_count, u32 event), 575 TP_ARGS(drm_id, pp, timeout_count, kickoff_count, event), 576 TP_STRUCT__entry( 577 __field( uint32_t, drm_id ) 578 __field( enum dpu_pingpong, pp ) 579 __field( int, timeout_count ) 580 __field( int, kickoff_count ) 581 __field( u32, event ) 582 ), 583 TP_fast_assign( 584 __entry->drm_id = drm_id; 585 __entry->pp = pp; 586 __entry->timeout_count = timeout_count; 587 __entry->kickoff_count = kickoff_count; 588 __entry->event = event; 589 ), 590 TP_printk("id=%u, pp=%d, timeout_count=%d, kickoff_count=%d, event=%u", 591 __entry->drm_id, __entry->pp, __entry->timeout_count, 592 __entry->kickoff_count, __entry->event) 593 ); 594 595 TRACE_EVENT(dpu_enc_phys_vid_post_kickoff, 596 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx), 597 TP_ARGS(drm_id, intf_idx), 598 TP_STRUCT__entry( 599 __field( uint32_t, drm_id ) 600 __field( enum dpu_intf, intf_idx ) 601 ), 602 TP_fast_assign( 603 __entry->drm_id = drm_id; 604 __entry->intf_idx = intf_idx; 605 ), 606 TP_printk("id=%u, intf_idx=%d", __entry->drm_id, __entry->intf_idx) 607 ); 608 609 TRACE_EVENT(dpu_enc_phys_vid_irq_enable, 610 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx, 611 int refcnt), 612 TP_ARGS(drm_id, intf_idx, refcnt), 613 TP_STRUCT__entry( 614 __field( uint32_t, drm_id ) 615 __field( enum dpu_intf, intf_idx ) 616 __field( int, refcnt ) 617 ), 618 TP_fast_assign( 619 __entry->drm_id = drm_id; 620 __entry->intf_idx = intf_idx; 621 __entry->refcnt = refcnt; 622 ), 623 TP_printk("id=%u, intf_idx=%d refcnt=%d", __entry->drm_id, 624 __entry->intf_idx, 625 __entry->drm_id) 626 ); 627 628 TRACE_EVENT(dpu_enc_phys_vid_irq_disable, 629 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx, 630 int refcnt), 631 TP_ARGS(drm_id, intf_idx, refcnt), 632 TP_STRUCT__entry( 633 __field( uint32_t, drm_id ) 634 __field( enum dpu_intf, intf_idx ) 635 __field( int, refcnt ) 636 ), 637 TP_fast_assign( 638 __entry->drm_id = drm_id; 639 __entry->intf_idx = intf_idx; 640 __entry->refcnt = refcnt; 641 ), 642 TP_printk("id=%u, intf_idx=%d refcnt=%d", __entry->drm_id, 643 __entry->intf_idx, 644 __entry->drm_id) 645 ); 646 647 TRACE_EVENT(dpu_crtc_setup_mixer, 648 TP_PROTO(uint32_t crtc_id, uint32_t plane_id, 649 struct drm_plane_state *state, struct dpu_plane_state *pstate, 650 uint32_t stage_idx, uint32_t pixel_format, 651 struct dpu_sw_pipe *pipe, uint64_t modifier), 652 TP_ARGS(crtc_id, plane_id, state, pstate, stage_idx, 653 pixel_format, pipe, modifier), 654 TP_STRUCT__entry( 655 __field( uint32_t, crtc_id ) 656 __field( uint32_t, plane_id ) 657 __field( uint32_t, fb_id ) 658 __field_struct( struct drm_rect, src_rect ) 659 __field_struct( struct drm_rect, dst_rect ) 660 __field( uint32_t, stage_idx ) 661 __field( enum dpu_stage, stage ) 662 __field( enum dpu_sspp, sspp ) 663 __field( uint32_t, multirect_idx ) 664 __field( uint32_t, multirect_mode ) 665 __field( uint32_t, pixel_format ) 666 __field( uint64_t, modifier ) 667 ), 668 TP_fast_assign( 669 __entry->crtc_id = crtc_id; 670 __entry->plane_id = plane_id; 671 __entry->fb_id = state ? state->fb->base.id : 0; 672 __entry->src_rect = drm_plane_state_src(state); 673 __entry->dst_rect = drm_plane_state_dest(state); 674 __entry->stage_idx = stage_idx; 675 __entry->stage = pstate->stage; 676 __entry->sspp = pipe->sspp->idx; 677 __entry->multirect_idx = pipe->multirect_index; 678 __entry->multirect_mode = pipe->multirect_mode; 679 __entry->pixel_format = pixel_format; 680 __entry->modifier = modifier; 681 ), 682 TP_printk("crtc_id:%u plane_id:%u fb_id:%u src:" DRM_RECT_FP_FMT 683 " dst:" DRM_RECT_FMT " stage_idx:%u stage:%d, sspp:%d " 684 "multirect_index:%d multirect_mode:%u pix_format:%u " 685 "modifier:%llu", 686 __entry->crtc_id, __entry->plane_id, __entry->fb_id, 687 DRM_RECT_FP_ARG(&__entry->src_rect), 688 DRM_RECT_ARG(&__entry->dst_rect), 689 __entry->stage_idx, __entry->stage, __entry->sspp, 690 __entry->multirect_idx, __entry->multirect_mode, 691 __entry->pixel_format, __entry->modifier) 692 ); 693 694 TRACE_EVENT(dpu_crtc_setup_lm_bounds, 695 TP_PROTO(uint32_t drm_id, int mixer, struct drm_rect *bounds), 696 TP_ARGS(drm_id, mixer, bounds), 697 TP_STRUCT__entry( 698 __field( uint32_t, drm_id ) 699 __field( int, mixer ) 700 __field_struct( struct drm_rect, bounds ) 701 ), 702 TP_fast_assign( 703 __entry->drm_id = drm_id; 704 __entry->mixer = mixer; 705 __entry->bounds = *bounds; 706 ), 707 TP_printk("id:%u mixer:%d bounds:" DRM_RECT_FMT, __entry->drm_id, 708 __entry->mixer, DRM_RECT_ARG(&__entry->bounds)) 709 ); 710 711 TRACE_EVENT(dpu_crtc_vblank_enable, 712 TP_PROTO(uint32_t drm_id, uint32_t enc_id, bool enable, 713 struct dpu_crtc *crtc), 714 TP_ARGS(drm_id, enc_id, enable, crtc), 715 TP_STRUCT__entry( 716 __field( uint32_t, drm_id ) 717 __field( uint32_t, enc_id ) 718 __field( bool, enable ) 719 __field( bool, enabled ) 720 ), 721 TP_fast_assign( 722 __entry->drm_id = drm_id; 723 __entry->enc_id = enc_id; 724 __entry->enable = enable; 725 __entry->enabled = crtc->enabled; 726 ), 727 TP_printk("id:%u encoder:%u enable:%s state{enabled:%s}", 728 __entry->drm_id, __entry->enc_id, 729 __entry->enable ? "true" : "false", 730 __entry->enabled ? "true" : "false") 731 ); 732 733 DECLARE_EVENT_CLASS(dpu_crtc_enable_template, 734 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), 735 TP_ARGS(drm_id, enable, crtc), 736 TP_STRUCT__entry( 737 __field( uint32_t, drm_id ) 738 __field( bool, enable ) 739 __field( bool, enabled ) 740 ), 741 TP_fast_assign( 742 __entry->drm_id = drm_id; 743 __entry->enable = enable; 744 __entry->enabled = crtc->enabled; 745 ), 746 TP_printk("id:%u enable:%s state{enabled:%s}", 747 __entry->drm_id, __entry->enable ? "true" : "false", 748 __entry->enabled ? "true" : "false") 749 ); 750 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_enable, 751 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), 752 TP_ARGS(drm_id, enable, crtc) 753 ); 754 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_disable, 755 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), 756 TP_ARGS(drm_id, enable, crtc) 757 ); 758 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_vblank, 759 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), 760 TP_ARGS(drm_id, enable, crtc) 761 ); 762 763 TRACE_EVENT(dpu_crtc_disable_frame_pending, 764 TP_PROTO(uint32_t drm_id, int frame_pending), 765 TP_ARGS(drm_id, frame_pending), 766 TP_STRUCT__entry( 767 __field( uint32_t, drm_id ) 768 __field( int, frame_pending ) 769 ), 770 TP_fast_assign( 771 __entry->drm_id = drm_id; 772 __entry->frame_pending = frame_pending; 773 ), 774 TP_printk("id:%u frame_pending:%d", __entry->drm_id, 775 __entry->frame_pending) 776 ); 777 778 TRACE_EVENT(dpu_plane_set_scanout, 779 TP_PROTO(struct dpu_sw_pipe *pipe, struct dpu_hw_fmt_layout *layout), 780 TP_ARGS(pipe, layout), 781 TP_STRUCT__entry( 782 __field( enum dpu_sspp, index ) 783 __field_struct( struct dpu_hw_fmt_layout, layout ) 784 __field( enum dpu_sspp_multirect_index, multirect_index) 785 ), 786 TP_fast_assign( 787 __entry->index = pipe->sspp->idx; 788 __entry->layout = *layout; 789 __entry->multirect_index = pipe->multirect_index; 790 ), 791 TP_printk("index:%d layout:{%ux%u @ [%u/%u, %u/%u, %u/%u, %u/%u]} " 792 "multirect_index:%d", __entry->index, __entry->layout.width, 793 __entry->layout.height, __entry->layout.plane_addr[0], 794 __entry->layout.plane_size[0], 795 __entry->layout.plane_addr[1], 796 __entry->layout.plane_size[1], 797 __entry->layout.plane_addr[2], 798 __entry->layout.plane_size[2], 799 __entry->layout.plane_addr[3], 800 __entry->layout.plane_size[3], __entry->multirect_index) 801 ); 802 803 TRACE_EVENT(dpu_plane_disable, 804 TP_PROTO(uint32_t drm_id, bool is_virtual, uint32_t multirect_mode), 805 TP_ARGS(drm_id, is_virtual, multirect_mode), 806 TP_STRUCT__entry( 807 __field( uint32_t, drm_id ) 808 __field( bool, is_virtual ) 809 __field( uint32_t, multirect_mode ) 810 ), 811 TP_fast_assign( 812 __entry->drm_id = drm_id; 813 __entry->is_virtual = is_virtual; 814 __entry->multirect_mode = multirect_mode; 815 ), 816 TP_printk("id:%u is_virtual:%s multirect_mode:%u", __entry->drm_id, 817 __entry->is_virtual ? "true" : "false", 818 __entry->multirect_mode) 819 ); 820 821 DECLARE_EVENT_CLASS(dpu_rm_iter_template, 822 TP_PROTO(uint32_t id, uint32_t enc_id), 823 TP_ARGS(id, enc_id), 824 TP_STRUCT__entry( 825 __field( uint32_t, id ) 826 __field( uint32_t, enc_id ) 827 ), 828 TP_fast_assign( 829 __entry->id = id; 830 __entry->enc_id = enc_id; 831 ), 832 TP_printk("id:%d enc_id:%u", __entry->id, __entry->enc_id) 833 ); 834 DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_intf, 835 TP_PROTO(uint32_t id, uint32_t enc_id), 836 TP_ARGS(id, enc_id) 837 ); 838 DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_ctls, 839 TP_PROTO(uint32_t id, uint32_t enc_id), 840 TP_ARGS(id, enc_id) 841 ); 842 843 TRACE_EVENT(dpu_rm_reserve_lms, 844 TP_PROTO(uint32_t id, uint32_t enc_id, uint32_t pp_id), 845 TP_ARGS(id, enc_id, pp_id), 846 TP_STRUCT__entry( 847 __field( uint32_t, id ) 848 __field( uint32_t, enc_id ) 849 __field( uint32_t, pp_id ) 850 ), 851 TP_fast_assign( 852 __entry->id = id; 853 __entry->enc_id = enc_id; 854 __entry->pp_id = pp_id; 855 ), 856 TP_printk("id:%d enc_id:%u pp_id:%u", __entry->id, 857 __entry->enc_id, __entry->pp_id) 858 ); 859 860 TRACE_EVENT(dpu_vbif_wait_xin_halt_fail, 861 TP_PROTO(u32 xin_id), 862 TP_ARGS(xin_id), 863 TP_STRUCT__entry( 864 __field( u32, xin_id ) 865 ), 866 TP_fast_assign( 867 __entry->xin_id = xin_id; 868 ), 869 TP_printk("xin_id:%u", __entry->xin_id) 870 ); 871 872 TRACE_EVENT(dpu_pp_connect_ext_te, 873 TP_PROTO(enum dpu_pingpong pp, u32 cfg), 874 TP_ARGS(pp, cfg), 875 TP_STRUCT__entry( 876 __field( enum dpu_pingpong, pp ) 877 __field( u32, cfg ) 878 ), 879 TP_fast_assign( 880 __entry->pp = pp; 881 __entry->cfg = cfg; 882 ), 883 TP_printk("pp:%d cfg:%u", __entry->pp, __entry->cfg) 884 ); 885 886 TRACE_EVENT(dpu_intf_connect_ext_te, 887 TP_PROTO(enum dpu_intf intf, u32 cfg), 888 TP_ARGS(intf, cfg), 889 TP_STRUCT__entry( 890 __field( enum dpu_intf, intf ) 891 __field( u32, cfg ) 892 ), 893 TP_fast_assign( 894 __entry->intf = intf; 895 __entry->cfg = cfg; 896 ), 897 TP_printk("intf:%d cfg:%u", __entry->intf, __entry->cfg) 898 ); 899 900 TRACE_EVENT(dpu_core_irq_register_callback, 901 TP_PROTO(unsigned int irq_reg, unsigned int irq_bit, void *callback), 902 TP_ARGS(irq_reg, irq_bit, callback), 903 TP_STRUCT__entry( 904 __field( unsigned int, irq_reg ) 905 __field( unsigned int, irq_bit ) 906 __field( void *, callback) 907 ), 908 TP_fast_assign( 909 __entry->irq_reg = irq_reg; 910 __entry->irq_bit = irq_bit; 911 __entry->callback = callback; 912 ), 913 TP_printk("IRQ=[%d, %d] callback:%ps", __entry->irq_reg, __entry->irq_bit, 914 __entry->callback) 915 ); 916 917 TRACE_EVENT(dpu_core_irq_unregister_callback, 918 TP_PROTO(unsigned int irq_reg, unsigned int irq_bit), 919 TP_ARGS(irq_reg, irq_bit), 920 TP_STRUCT__entry( 921 __field( unsigned int, irq_reg ) 922 __field( unsigned int, irq_bit ) 923 ), 924 TP_fast_assign( 925 __entry->irq_reg = irq_reg; 926 __entry->irq_bit = irq_bit; 927 ), 928 TP_printk("IRQ=[%d, %d]", __entry->irq_reg, __entry->irq_bit) 929 ); 930 931 TRACE_EVENT(dpu_core_perf_update_clk, 932 TP_PROTO(struct drm_device *dev, bool stop_req, u64 clk_rate), 933 TP_ARGS(dev, stop_req, clk_rate), 934 TP_STRUCT__entry( 935 __string( dev_name, dev->unique ) 936 __field( bool, stop_req ) 937 __field( u64, clk_rate ) 938 ), 939 TP_fast_assign( 940 __assign_str(dev_name); 941 __entry->stop_req = stop_req; 942 __entry->clk_rate = clk_rate; 943 ), 944 TP_printk("dev:%s stop_req:%s clk_rate:%llu", __get_str(dev_name), 945 __entry->stop_req ? "true" : "false", __entry->clk_rate) 946 ); 947 948 TRACE_EVENT(dpu_hw_ctl_update_pending_flush, 949 TP_PROTO(u32 new_bits, u32 pending_mask), 950 TP_ARGS(new_bits, pending_mask), 951 TP_STRUCT__entry( 952 __field( u32, new_bits ) 953 __field( u32, pending_mask ) 954 ), 955 TP_fast_assign( 956 __entry->new_bits = new_bits; 957 __entry->pending_mask = pending_mask; 958 ), 959 TP_printk("new=%x existing=%x", __entry->new_bits, 960 __entry->pending_mask) 961 ); 962 963 DECLARE_EVENT_CLASS(dpu_hw_ctl_pending_flush_template, 964 TP_PROTO(u32 pending_mask, u32 ctl_flush), 965 TP_ARGS(pending_mask, ctl_flush), 966 TP_STRUCT__entry( 967 __field( u32, pending_mask ) 968 __field( u32, ctl_flush ) 969 ), 970 TP_fast_assign( 971 __entry->pending_mask = pending_mask; 972 __entry->ctl_flush = ctl_flush; 973 ), 974 TP_printk("pending_mask=%x CTL_FLUSH=%x", __entry->pending_mask, 975 __entry->ctl_flush) 976 ); 977 DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_clear_pending_flush, 978 TP_PROTO(u32 pending_mask, u32 ctl_flush), 979 TP_ARGS(pending_mask, ctl_flush) 980 ); 981 DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, 982 dpu_hw_ctl_trigger_pending_flush, 983 TP_PROTO(u32 pending_mask, u32 ctl_flush), 984 TP_ARGS(pending_mask, ctl_flush) 985 ); 986 DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_trigger_prepare, 987 TP_PROTO(u32 pending_mask, u32 ctl_flush), 988 TP_ARGS(pending_mask, ctl_flush) 989 ); 990 DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_trigger_start, 991 TP_PROTO(u32 pending_mask, u32 ctl_flush), 992 TP_ARGS(pending_mask, ctl_flush) 993 ); 994 995 #define DPU_ATRACE_END(name) trace_tracing_mark_write(current->tgid, name, 0) 996 #define DPU_ATRACE_BEGIN(name) trace_tracing_mark_write(current->tgid, name, 1) 997 #define DPU_ATRACE_FUNC() DPU_ATRACE_BEGIN(__func__) 998 999 #define DPU_ATRACE_INT(name, value) \ 1000 trace_dpu_trace_counter(current->tgid, name, value) 1001 1002 #endif /* _DPU_TRACE_H_ */ 1003 1004 /* This part must be outside protection */ 1005 #undef TRACE_INCLUDE_PATH 1006 #define TRACE_INCLUDE_PATH . 1007 #include <trace/define_trace.h> 1008